mirror of
https://github.com/hanwckf/immortalwrt-mt798x.git
synced 2025-01-10 11:09:57 +08:00
775f71487a
Tested on NanoPi R2S Signed-off-by: David Bauer <mail@david-bauer.net> (cherry picked from commit e68e80ead9a0f700701ca494282756454719d7de)
173 lines
4.4 KiB
Diff
173 lines
4.4 KiB
Diff
--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -109,6 +109,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
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dtb-$(CONFIG_ROCKCHIP_RK3328) += \
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rk3328-evb.dtb \
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rk3328-nanopi-r2s.dtb \
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+ rk3328-orangepi-r1-plus.dtb \
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rk3328-roc-cc.dtb \
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rk3328-rock64.dtb \
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rk3328-rock-pi-e.dtb
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--- /dev/null
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+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
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@@ -0,0 +1,1 @@
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+#include "rk3328-nanopi-r2s-u-boot.dtsi"
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--- /dev/null
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+++ b/arch/arm/dts/rk3328-orangepi-r1-plus.dts
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@@ -0,0 +1,38 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+#include "rk3328-nanopi-r2s.dts"
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+
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+/ {
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+ model = "Xunlong Orange Pi R1 Plus";
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+ compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328";
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+};
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+
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+&lan_led {
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+ label = "orangepi-r1-plus:green:lan";
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+};
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+
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+&spi0 {
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+ status = "okay";
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+
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+ flash@0 {
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+ compatible = "jedec,spi-nor";
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+ reg = <0>;
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+ spi-max-frequency = <10000000>;
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+ };
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+};
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+
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+&sys_led {
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+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
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+ label = "orangepi-r1-plus:red:sys";
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+};
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+
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+&sys_led_pin {
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+ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
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+};
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+
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+&uart1 {
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+ status = "okay";
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+};
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+
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+&wan_led {
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+ label = "orangepi-r1-plus:green:wan";
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+};
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--- a/board/rockchip/evb_rk3328/MAINTAINERS
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+++ b/board/rockchip/evb_rk3328/MAINTAINERS
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@@ -12,6 +12,13 @@ F: configs/nanopi-r2s-rk3328_defconfig
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F: arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
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F: arch/arm/dts/rk3328-nanopi-r2s.dts
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+ORANGEPI-R1-PLUS-RK3328
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+M: Shenzhen Xunlong Software CO.,Limited <zhao_steven@263.net>
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+S: Maintained
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+F: configs/orangepi-r1-plus-rk3328_defconfig
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+F: arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
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+F: arch/arm/dts/rk3328-orangepi-r1-plus.dts
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+
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ROC-RK3328-CC
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M: Loic Devulder <ldevulder@suse.com>
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M: Chen-Yu Tsai <wens@csie.org>
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--- /dev/null
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+++ b/configs/orangepi-r1-plus-rk3328_defconfig
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@@ -0,0 +1,98 @@
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+CONFIG_ARM=y
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+CONFIG_ARCH_ROCKCHIP=y
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+CONFIG_SYS_TEXT_BASE=0x00200000
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+CONFIG_SPL_GPIO_SUPPORT=y
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+CONFIG_ENV_OFFSET=0x3F8000
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+CONFIG_ROCKCHIP_RK3328=y
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+CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
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+CONFIG_TPL_LIBCOMMON_SUPPORT=y
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+CONFIG_TPL_LIBGENERIC_SUPPORT=y
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+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
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+CONFIG_SPL_STACK_R_ADDR=0x600000
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+CONFIG_NR_DRAM_BANKS=1
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+CONFIG_DEBUG_UART_BASE=0xFF130000
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+CONFIG_DEBUG_UART_CLOCK=24000000
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+CONFIG_SYSINFO=y
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+CONFIG_DEBUG_UART=y
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+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
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+# CONFIG_ANDROID_BOOT_IMAGE is not set
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+CONFIG_FIT=y
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+CONFIG_FIT_VERBOSE=y
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+CONFIG_SPL_LOAD_FIT=y
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+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus.dtb"
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+CONFIG_MISC_INIT_R=y
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+# CONFIG_DISPLAY_CPUINFO is not set
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+CONFIG_DISPLAY_BOARDINFO_LATE=y
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+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
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+CONFIG_SPL_STACK_R=y
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+CONFIG_SPL_I2C_SUPPORT=y
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+CONFIG_SPL_POWER_SUPPORT=y
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+CONFIG_SPL_ATF=y
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+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
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+CONFIG_CMD_BOOTZ=y
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+CONFIG_CMD_GPT=y
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+CONFIG_CMD_MMC=y
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+CONFIG_CMD_USB=y
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+# CONFIG_CMD_SETEXPR is not set
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+CONFIG_CMD_TIME=y
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+CONFIG_SPL_OF_CONTROL=y
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+CONFIG_TPL_OF_CONTROL=y
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+CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus"
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+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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+CONFIG_TPL_OF_PLATDATA=y
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+CONFIG_ENV_IS_IN_MMC=y
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+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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+CONFIG_NET_RANDOM_ETHADDR=y
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+CONFIG_TPL_DM=y
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+CONFIG_REGMAP=y
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+CONFIG_SPL_REGMAP=y
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+CONFIG_TPL_REGMAP=y
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+CONFIG_SYSCON=y
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+CONFIG_SPL_SYSCON=y
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+CONFIG_TPL_SYSCON=y
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+CONFIG_CLK=y
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+CONFIG_SPL_CLK=y
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+CONFIG_FASTBOOT_BUF_ADDR=0x800800
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+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
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+CONFIG_ROCKCHIP_GPIO=y
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+CONFIG_SYS_I2C_ROCKCHIP=y
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+CONFIG_MMC_DW=y
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+CONFIG_MMC_DW_ROCKCHIP=y
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+CONFIG_SF_DEFAULT_SPEED=20000000
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+CONFIG_DM_ETH=y
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+CONFIG_ETH_DESIGNWARE=y
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+CONFIG_GMAC_ROCKCHIP=y
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+CONFIG_PINCTRL=y
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+CONFIG_SPL_PINCTRL=y
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+CONFIG_DM_PMIC=y
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+CONFIG_PMIC_RK8XX=y
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+CONFIG_SPL_DM_REGULATOR=y
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+CONFIG_REGULATOR_PWM=y
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+CONFIG_DM_REGULATOR_FIXED=y
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+CONFIG_SPL_DM_REGULATOR_FIXED=y
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+CONFIG_REGULATOR_RK8XX=y
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+CONFIG_PWM_ROCKCHIP=y
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+CONFIG_RAM=y
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+CONFIG_SPL_RAM=y
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+CONFIG_TPL_RAM=y
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+CONFIG_DM_RESET=y
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+CONFIG_BAUDRATE=1500000
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+CONFIG_DEBUG_UART_SHIFT=2
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+CONFIG_SYSRESET=y
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+# CONFIG_TPL_SYSRESET is not set
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+CONFIG_USB=y
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+CONFIG_USB_XHCI_HCD=y
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+CONFIG_USB_XHCI_DWC3=y
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+CONFIG_USB_EHCI_HCD=y
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+CONFIG_USB_EHCI_GENERIC=y
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+CONFIG_USB_OHCI_HCD=y
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+CONFIG_USB_OHCI_GENERIC=y
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+CONFIG_USB_DWC2=y
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+CONFIG_USB_DWC3=y
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+# CONFIG_USB_DWC3_GADGET is not set
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+CONFIG_USB_GADGET=y
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+CONFIG_USB_GADGET_DWC2_OTG=y
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+CONFIG_SPL_TINY_MEMSET=y
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+CONFIG_TPL_TINY_MEMSET=y
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+CONFIG_ERRNO_STR=y
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