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https://github.com/hanwckf/immortalwrt-mt798x.git
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7fb1b00f5f
(cherry picked from commit 0d6e831f2ce450c15341e818f0c84d85e5259eec)
67 lines
1.8 KiB
Diff
67 lines
1.8 KiB
Diff
From 7ad9f3d0cb2f2b886c068f99e791bd41ceb0677a Mon Sep 17 00:00:00 2001
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From: Ondrej Jirman <megous@megous.com>
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Date: Mon, 24 Feb 2020 17:54:46 +0100
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Subject: [PATCH] ARM: dts: sun8i-h3: Add thermal trip points/cooling maps
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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This enables passive cooling by down-regulating CPU voltage
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and frequency.
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For trip points, I used a slightly lowered values from the BSP
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code. The critical temperature of 110°C from BSP code seemed
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like a lot, so I rounded it off to 100°C.
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The critical trip point value is 30°C above the maximum recommended
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ambient temperature (70°C) for the SoC from the datasheet, so there's
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some headroom even at such a high ambient temperature.
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Signed-off-by: Ondrej Jirman <megous@megous.com>
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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arch/arm/boot/dts/sun8i-h3.dtsi | 25 +++++++++++++++++++++++++
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1 file changed, 25 insertions(+)
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--- a/arch/arm/boot/dts/sun8i-h3.dtsi
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+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
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@@ -41,6 +41,7 @@
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*/
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#include "sunxi-h3-h5.dtsi"
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+#include <dt-bindings/thermal/thermal.h>
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/ {
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cpu0_opp_table: opp_table0 {
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@@ -205,6 +206,30 @@
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polling-delay-passive = <0>;
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polling-delay = <0>;
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thermal-sensors = <&ths 0>;
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+
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+ trips {
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+ cpu_hot: cpu-hot {
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+ temperature = <80000>;
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+ hysteresis = <2000>;
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+ type = "passive";
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+ };
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+
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+ cpu_very_hot: cpu-very-hot {
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+ temperature = <100000>;
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+ hysteresis = <0>;
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+ type = "critical";
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+ };
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+ };
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+
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+ cooling-maps {
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+ cpu-hot-limit {
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+ trip = <&cpu_hot>;
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+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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+ };
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+ };
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};
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};
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};
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