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https://github.com/hanwckf/immortalwrt-mt798x.git
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70668acaf4
This patch will match the clock-latency-ns values in the device tree for those found inside the OEM device tree and kernel source code and unlock 896Mhz CPU operating points. (cherry picked from commit a8a01ea334554659f7e1eb3251d7382d7da735e7)
54 lines
1.4 KiB
Diff
54 lines
1.4 KiB
Diff
From: William <gw826943555@qq.com>
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Subject: [PATCH] ipq40xx: improve CPU clock
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Date: Tue, 15 Dec 2020 15:26:35 +0800
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This patch will match the clock-latency-ns values in the device tree
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for those found inside the OEM device tree and kernel source code and
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unlock 896Mhz CPU operating points.
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Signed-off-by: William <gw826943555@qq.com>
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---
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--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
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@@ -124,20 +124,24 @@
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opp-48000000 {
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opp-hz = /bits/ 64 <48000000>;
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- clock-latency-ns = <256000>;
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+ clock-latency-ns = <100000>;
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};
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opp-200000000 {
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opp-hz = /bits/ 64 <200000000>;
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- clock-latency-ns = <256000>;
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+ clock-latency-ns = <100000>;
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};
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opp-500000000 {
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opp-hz = /bits/ 64 <500000000>;
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- clock-latency-ns = <256000>;
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+ clock-latency-ns = <100000>;
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};
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opp-716000000 {
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opp-hz = /bits/ 64 <716000000>;
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- clock-latency-ns = <256000>;
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+ clock-latency-ns = <100000>;
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};
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+ opp-896000000 {
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+ opp-hz = /bits/ 64 <896000000>;
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+ clock-latency-ns = <100000>;
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+ };
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};
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memory {
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--- a/drivers/clk/qcom/gcc-ipq4019.c
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+++ b/drivers/clk/qcom/gcc-ipq4019.c
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@@ -579,6 +579,9 @@ static const struct freq_tbl ftbl_gcc_ap
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F(632000000, P_DDRPLLAPSS, 1, 0, 0),
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F(672000000, P_DDRPLLAPSS, 1, 0, 0),
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F(716000000, P_DDRPLLAPSS, 1, 0, 0),
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+ F(768000000, P_DDRPLLAPSS, 1, 0, 0),
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+ F(823000000, P_DDRPLLAPSS, 1, 0, 0),
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+ F(896000000, P_DDRPLLAPSS, 1, 0, 0),
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{ }
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};
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