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https://github.com/hanwckf/immortalwrt-mt798x.git
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206 lines
8.4 KiB
Diff
206 lines
8.4 KiB
Diff
From 798fcdd010006e87b3154d6454c657af7b033002 Mon Sep 17 00:00:00 2001
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From: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com>
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Date: Tue, 24 Mar 2020 15:49:55 +0900
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Subject: [PATCH] mtd: spinand: toshiba: Support for new Kioxia Serial NAND
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Add support for new Kioxia products.
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The new Kioxia products support program load x4 command, and have
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HOLD_D bit which is equivalent to QE bit.
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Signed-off-by: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com>
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Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
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Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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Link: https://lore.kernel.org/linux-mtd/aa69e455beedc5ce0d7141359b9364ed8aec9e65.1584949601.git.ytc-mb-yfuruyama7@kioxia.com
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---
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drivers/mtd/nand/spi/toshiba.c | 128 ++++++++++++++++++++++++++++-----
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1 file changed, 111 insertions(+), 17 deletions(-)
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diff --git a/drivers/mtd/nand/spi/toshiba.c b/drivers/mtd/nand/spi/toshiba.c
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index 5d217dd4b2539a..bc801d83343e5c 100644
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--- a/drivers/mtd/nand/spi/toshiba.c
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+++ b/drivers/mtd/nand/spi/toshiba.c
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@@ -20,6 +20,18 @@ static SPINAND_OP_VARIANTS(read_cache_variants,
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SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
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+static SPINAND_OP_VARIANTS(write_cache_x4_variants,
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+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
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+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
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+
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+static SPINAND_OP_VARIANTS(update_cache_x4_variants,
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+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
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+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
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+
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+/**
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+ * Backward compatibility for 1st generation Serial NAND devices
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+ * which don't support Quad Program Load operation.
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+ */
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static SPINAND_OP_VARIANTS(write_cache_variants,
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SPINAND_PROG_LOAD(true, 0, NULL, 0));
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@@ -95,7 +107,7 @@ static int tx58cxgxsxraix_ecc_get_status(struct spinand_device *spinand,
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}
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static const struct spinand_info toshiba_spinand_table[] = {
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- /* 3.3V 1Gb */
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+ /* 3.3V 1Gb (1st generation) */
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SPINAND_INFO("TC58CVG0S3HRAIG",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xC2),
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NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
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@@ -106,7 +118,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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- /* 3.3V 2Gb */
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+ /* 3.3V 2Gb (1st generation) */
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SPINAND_INFO("TC58CVG1S3HRAIG",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCB),
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NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
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@@ -117,7 +129,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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- /* 3.3V 4Gb */
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+ /* 3.3V 4Gb (1st generation) */
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SPINAND_INFO("TC58CVG2S0HRAIG",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCD),
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NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
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@@ -128,18 +140,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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- /* 3.3V 4Gb */
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- SPINAND_INFO("TC58CVG2S0HRAIJ",
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- SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xED),
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- NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
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- NAND_ECCREQ(8, 512),
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- SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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- &write_cache_variants,
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- &update_cache_variants),
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- 0,
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- SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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- tx58cxgxsxraix_ecc_get_status)),
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- /* 1.8V 1Gb */
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+ /* 1.8V 1Gb (1st generation) */
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SPINAND_INFO("TC58CYG0S3HRAIG",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xB2),
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NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
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@@ -150,7 +151,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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- /* 1.8V 2Gb */
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+ /* 1.8V 2Gb (1st generation) */
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SPINAND_INFO("TC58CYG1S3HRAIG",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBB),
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NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
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@@ -161,7 +162,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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- /* 1.8V 4Gb */
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+ /* 1.8V 4Gb (1st generation) */
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SPINAND_INFO("TC58CYG2S0HRAIG",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBD),
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NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
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@@ -172,6 +173,99 @@ static const struct spinand_info toshiba_spinand_table[] = {
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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+
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+ /*
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+ * 2nd generation serial nand has HOLD_D which is equivalent to
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+ * QE_BIT.
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+ */
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+ /* 3.3V 1Gb (2nd generation) */
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+ SPINAND_INFO("TC58CVG0S3HRAIJ",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE2),
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+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_x4_variants,
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+ &update_cache_x4_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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+ tx58cxgxsxraix_ecc_get_status)),
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+ /* 3.3V 2Gb (2nd generation) */
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+ SPINAND_INFO("TC58CVG1S3HRAIJ",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xEB),
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+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_x4_variants,
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+ &update_cache_x4_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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+ tx58cxgxsxraix_ecc_get_status)),
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+ /* 3.3V 4Gb (2nd generation) */
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+ SPINAND_INFO("TC58CVG2S0HRAIJ",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xED),
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+ NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_x4_variants,
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+ &update_cache_x4_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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+ tx58cxgxsxraix_ecc_get_status)),
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+ /* 3.3V 8Gb (2nd generation) */
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+ SPINAND_INFO("TH58CVG3S0HRAIJ",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE4),
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+ NAND_MEMORG(1, 4096, 256, 64, 4096, 80, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_x4_variants,
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+ &update_cache_x4_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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+ tx58cxgxsxraix_ecc_get_status)),
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+ /* 1.8V 1Gb (2nd generation) */
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+ SPINAND_INFO("TC58CYG0S3HRAIJ",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD2),
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+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_x4_variants,
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+ &update_cache_x4_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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+ tx58cxgxsxraix_ecc_get_status)),
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+ /* 1.8V 2Gb (2nd generation) */
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+ SPINAND_INFO("TC58CYG1S3HRAIJ",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xDB),
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+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_x4_variants,
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+ &update_cache_x4_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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+ tx58cxgxsxraix_ecc_get_status)),
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+ /* 1.8V 4Gb (2nd generation) */
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+ SPINAND_INFO("TC58CYG2S0HRAIJ",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xDD),
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+ NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_x4_variants,
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+ &update_cache_x4_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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+ tx58cxgxsxraix_ecc_get_status)),
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+ /* 1.8V 8Gb (2nd generation) */
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+ SPINAND_INFO("TH58CYG3S0HRAIJ",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4),
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+ NAND_MEMORG(1, 4096, 256, 64, 4096, 80, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_x4_variants,
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+ &update_cache_x4_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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+ tx58cxgxsxraix_ecc_get_status)),
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};
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static const struct spinand_manufacturer_ops toshiba_spinand_manuf_ops = {
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