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105 lines
3.4 KiB
Diff
105 lines
3.4 KiB
Diff
From 8c573d9419bf61f7b66b6114f1171f3a8a4a0e38 Mon Sep 17 00:00:00 2001
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From: Thirumalesha Narasimhappa <nthirumalesha7@gmail.com>
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Date: Sun, 8 Nov 2020 19:37:35 +0800
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Subject: [PATCH] mtd: spinand: micron: Add support for MT29F2G01AAAED
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The MT29F2G01AAAED is a single die, 2Gb Micron SPI NAND Flash with 4-bit
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ECC
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Signed-off-by: Thirumalesha Narasimhappa <nthirumalesha7@gmail.com>
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Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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Link: https://lore.kernel.org/linux-mtd/20201108113735.2533-3-nthirumalesha7@gmail.com
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---
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drivers/mtd/nand/spi/micron.c | 64 +++++++++++++++++++++++++++++++++++
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1 file changed, 64 insertions(+)
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diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
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index afe3ba37dcfb8e..50b7295bc92226 100644
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--- a/drivers/mtd/nand/spi/micron.c
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+++ b/drivers/mtd/nand/spi/micron.c
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@@ -44,6 +44,19 @@ static SPINAND_OP_VARIANTS(x4_update_cache_variants,
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SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
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SPINAND_PROG_LOAD(false, 0, NULL, 0));
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+/* Micron MT29F2G01AAAED Device */
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+static SPINAND_OP_VARIANTS(x4_read_cache_variants,
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+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
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+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
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+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
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+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
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+
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+static SPINAND_OP_VARIANTS(x1_write_cache_variants,
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+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
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+
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+static SPINAND_OP_VARIANTS(x1_update_cache_variants,
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+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
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+
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static int micron_8_ooblayout_ecc(struct mtd_info *mtd, int section,
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struct mtd_oob_region *region)
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{
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@@ -74,6 +87,47 @@ static const struct mtd_ooblayout_ops micron_8_ooblayout = {
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.free = micron_8_ooblayout_free,
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};
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+static int micron_4_ooblayout_ecc(struct mtd_info *mtd, int section,
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+ struct mtd_oob_region *region)
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+{
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+ struct spinand_device *spinand = mtd_to_spinand(mtd);
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+
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+ if (section >= spinand->base.memorg.pagesize /
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+ mtd->ecc_step_size)
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+ return -ERANGE;
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+
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+ region->offset = (section * 16) + 8;
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+ region->length = 8;
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+
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+ return 0;
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+}
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+
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+static int micron_4_ooblayout_free(struct mtd_info *mtd, int section,
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+ struct mtd_oob_region *region)
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+{
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+ struct spinand_device *spinand = mtd_to_spinand(mtd);
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+
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+ if (section >= spinand->base.memorg.pagesize /
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+ mtd->ecc_step_size)
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+ return -ERANGE;
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+
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+ if (section) {
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+ region->offset = 16 * section;
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+ region->length = 8;
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+ } else {
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+ /* section 0 has two bytes reserved for the BBM */
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+ region->offset = 2;
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+ region->length = 6;
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+ }
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+
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+ return 0;
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+}
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+
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+static const struct mtd_ooblayout_ops micron_4_ooblayout = {
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+ .ecc = micron_4_ooblayout_ecc,
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+ .free = micron_4_ooblayout_free,
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+};
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+
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static int micron_select_target(struct spinand_device *spinand,
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unsigned int target)
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{
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@@ -217,6 +271,16 @@ static const struct spinand_info micron_spinand_table[] = {
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SPINAND_ECCINFO(µn_8_ooblayout,
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micron_8_ecc_get_status),
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SPINAND_SELECT_TARGET(micron_select_target)),
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+ /* M69A 2Gb 3.3V */
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+ SPINAND_INFO("MT29F2G01AAAED",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x9F),
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+ NAND_MEMORG(1, 2048, 64, 64, 2048, 80, 2, 1, 1),
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+ NAND_ECCREQ(4, 512),
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+ SPINAND_INFO_OP_VARIANTS(&x4_read_cache_variants,
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+ &x1_write_cache_variants,
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+ &x1_update_cache_variants),
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+ 0,
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+ SPINAND_ECCINFO(µn_4_ooblayout, NULL)),
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};
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static int micron_spinand_init(struct spinand_device *spinand)
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