Sebastian Schaper
64d088d8f9
ath79: increase spi clock for D-Link DIR-842 ...
AHB is 258 MHz for this device (CPU_PLL / 3), but there is no difference
between 64 MHz and 50 MHz for spi-max-frequency, thus increase to 50 MHz.
Tested on revisions C1 and C3.
Signed-off-by: Sebastian Schaper <openwrt@sebastianschaper.net>
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