mirror of
https://github.com/hanwckf/immortalwrt-mt798x.git
synced 2025-01-10 11:09:57 +08:00
8e7c12b684
Manually rebased: - layerscape/patches-5.4/801-audio-0037-MLK-16224-4-ASoC-fsl_sai-support-multi-fifo-and-DSD.patch - ramips/patches-5.4/0031-uvc-add-iPassion-iP2970-support.patch Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
97 lines
1.9 KiB
Diff
97 lines
1.9 KiB
Diff
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
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+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
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@@ -555,6 +555,19 @@
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status = "disabled";
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};
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+ snfi: spi@1100d000 {
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+ compatible = "mediatek,mt7622-snfi";
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+ reg = <0 0x1100d000 0 0x1000>;
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+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
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+ clocks = <&pericfg CLK_PERI_NFI_PD>,
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+ <&pericfg CLK_PERI_SNFI_PD>;
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+ clock-names = "nfi_clk", "spi_clk";
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+ ecc-engine = <&bch>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ status = "disabled";
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+ };
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+
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nor_flash: spi@11014000 {
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compatible = "mediatek,mt7622-nor",
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"mediatek,mt8173-nor";
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--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
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+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
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@@ -99,7 +99,7 @@
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};
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&bch {
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- status = "disabled";
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+ status = "okay";
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};
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&btif {
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@@ -551,6 +551,62 @@
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status = "disable";
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};
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+&snfi {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&serial_nand_pins>;
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+ status = "okay";
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+
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+ spi_nand@0 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "spi-nand";
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+ spi-max-frequency = <104000000>;
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+ reg = <0>;
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+
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+ partitions {
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+ compatible = "fixed-partitions";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ partition@0 {
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+ label = "Preloader";
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+ reg = <0x00000 0x0080000>;
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+ read-only;
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+ };
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+
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+ partition@80000 {
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+ label = "ATF";
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+ reg = <0x80000 0x0040000>;
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+ };
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+
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+ partition@c0000 {
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+ label = "Bootloader";
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+ reg = <0xc0000 0x0080000>;
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+ };
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+
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+ partition@140000 {
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+ label = "Config";
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+ reg = <0x140000 0x0080000>;
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+ };
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+
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+ partition@1c0000 {
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+ label = "Factory";
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+ reg = <0x1c0000 0x0040000>;
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+ };
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+
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+ partition@200000 {
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+ label = "firmware";
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+ reg = <0x200000 0x2000000>;
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+ };
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+
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+ partition@2200000 {
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+ label = "User_data";
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+ reg = <0x2200000 0x4000000>;
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+ };
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+ };
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+ };
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+};
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+
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spic0_pins>;
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