mirror of
https://github.com/hanwckf/immortalwrt-mt798x.git
synced 2025-01-10 19:12:33 +08:00
61 lines
2.3 KiB
Diff
61 lines
2.3 KiB
Diff
diff -urN a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c 2020-08-25 14:57:28.403764254 +0800
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c 2020-08-25 14:57:39.803438475 +0800
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@@ -2193,7 +2193,7 @@
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if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
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mtk_w32(eth,
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MTK_TX_DMA_EN |
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- MTK_DMA_SIZE_16DWORDS | MTK_NDP_CO_PRO |
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+ MTK_DMA_SIZE_32DWORDS | MTK_NDP_CO_PRO |
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MTK_RX_DMA_EN | MTK_RX_2B_OFFSET |
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MTK_RX_BT_32DWORDS,
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MTK_QDMA_GLO_CFG);
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@@ -2434,11 +2434,10 @@
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/* Enable RX VLan Offloading */
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mtk_w32(eth, 1, MTK_CDMP_EG_CTRL);
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- /* enable interrupt delay for RX */
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- mtk_w32(eth, MTK_PDMA_DELAY_RX_DELAY, MTK_PDMA_DELAY_INT);
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+ /* enable interrupt delay for RX/TX */
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+ mtk_w32(eth, 0x8f0f8f0f, MTK_PDMA_DELAY_INT);
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+ mtk_w32(eth, 0x8f0f8f0f, MTK_QDMA_DELAY_INT);
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- /* disable delay and normal interrupt */
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- mtk_w32(eth, 0, MTK_QDMA_DELAY_INT);
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mtk_tx_irq_disable(eth, ~0);
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mtk_rx_irq_disable(eth, ~0);
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diff -urN a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h 2020-08-25 14:57:22.939920398 +0800
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h 2020-08-25 14:57:43.359336855 +0800
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@@ -19,8 +19,8 @@
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#define MTK_QDMA_PAGE_SIZE 2048
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#define MTK_MAX_RX_LENGTH 1536
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#define MTK_TX_DMA_BUF_LEN 0x3fff
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-#define MTK_DMA_SIZE 256
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-#define MTK_NAPI_WEIGHT 64
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+#define MTK_DMA_SIZE 2048
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+#define MTK_NAPI_WEIGHT 256
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#define MTK_MAC_COUNT 2
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#define MTK_RX_ETH_HLEN (VLAN_ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN)
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#define MTK_RX_HLEN (NET_SKB_PAD + MTK_RX_ETH_HLEN + NET_IP_ALIGN)
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@@ -198,6 +198,7 @@
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#define MTK_NDP_CO_PRO BIT(10)
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#define MTK_TX_WB_DDONE BIT(6)
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#define MTK_DMA_SIZE_16DWORDS (2 << 4)
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+#define MTK_DMA_SIZE_32DWORDS (3 << 4)
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#define MTK_RX_DMA_BUSY BIT(3)
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#define MTK_TX_DMA_BUSY BIT(1)
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#define MTK_RX_DMA_EN BIT(2)
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@@ -228,8 +229,8 @@
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#define MTK_TX_DONE_INT1 BIT(1)
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#define MTK_TX_DONE_INT0 BIT(0)
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#define MTK_RX_DONE_INT MTK_RX_DONE_DLY
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-#define MTK_TX_DONE_INT (MTK_TX_DONE_INT0 | MTK_TX_DONE_INT1 | \
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- MTK_TX_DONE_INT2 | MTK_TX_DONE_INT3)
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+#define MTK_TX_DONE_DLY BIT(28)
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+#define MTK_TX_DONE_INT MTK_TX_DONE_DLY
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/* QDMA Interrupt grouping registers */
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#define MTK_QDMA_INT_GRP1 0x1a20
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