This resolves incosnsitencies of the configured RX / TX flow control
modes between different boards or bootloaders.
Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit 4d81f087715524994448ecaefd3ca87c8ba7e0a3)
When the AVM FRITZ!Repeater 1200 was introduced on Kernel 4.19, the
at803x PHY driver incorrectly set up the delays, not disabling delays
set by the bootloader.
The PHY was always operating with RX as well as TX delays enabled, but
with kernel 5.4 and later, the required TX delay is disabled, breaking
ethernet operation.
Correct the PHY mode, so the driver enables both delays.
Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit f9d18281051c894eacd40f10c10b430c6c9082ad)
The routerbootparts driver dynamically discovers the location of MikroTik
partitions, but it cannot determine their size (except by extending them
up to the start of the next discovered partition).
The hard_config partition has a default size of 0x1000 in the driver,
while it actually takes 0x2000 on the hAP-ac2. Set the correct size in
the hAP-ac2 DTS.
On most devices, this isn't a problem as the actual data fits in 0x1000
bytes. However, some devices have larger data that doesn't fit in 0x1000
bytes. In any case, all devices seen so far have enough space for a
0x2000 hard_config partition before the start of the dtb_config partition.
With the current 0x1000 size:
0x00000000e000-0x00000000f000 : "hard_config"
0x000000010000-0x000000017bbc : "dtb_config"
With this patch extending the size to 0x2000:
0x00000000e000-0x000000010000 : "hard_config"
0x000000010000-0x000000017bbc : "dtb_config"
Other ipq40xx boards may need the same fix but it needs testing.
References: https://forum.openwrt.org/t/support-for-mikrotik-hap-ac2/23333/324
Acked-by: Thibaut VARÈNE <hacks@slashdirt.org>
Signed-off-by: Baptiste Jonglez <git@bitsofnetworks.org>
(cherry picked from commit 979f4063668185182db7bd2ad4efe6010047765e)
This commit adds support for the MikroTik SXTsq 5 ac (RBSXTsqG-5acD),
an outdoor 802.11ac wireless CPE with one 10/100/1000 Mbps Ethernet
port.
Specifications:
- SoC: Qualcomm Atheros IPQ4018
- RAM: 256 MB
- Storage: 16 MB NOR
- Wireless: IPQ4018 (SoC) 802.11a/n/ac 2x2:2, 16 dBi antennae
- Ethernet: IPQ4018 (SoC) 1x 10/100/1000 port, 10-28 Vdc PoE in
- 1x Ethernet LED (green)
- 7x user-controllable LEDs
· 1x power (blue)
· 1x user (green)
· 5x rssi (green)
Note:
Serial UART is probably available on the board, but it has not been
tested.
Flashing:
Boot via TFTP the initramfs image. Then, upload a sysupgrade image
via SSH and flash it normally. More info at the "Common procedures
for MikroTik products" page https://openwrt.org/toh/mikrotik/common.
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
(cherry picked from commit d1f1e5269ed992e6fc30d575b43b0913c9e58ca2)
[Compile and Run Tested]
Signed-off-by: Nick Hainke <vincent@systemli.org>
This adds support for the MikroTik RouterBOARD RBD52G-5HacD2HnD-TC
(hAP ac²), a indoor dual band, dual-radio 802.11ac
wireless AP with integrated omnidirectional antennae, USB port and five
10/100/1000 Mbps Ethernet ports.
See https://mikrotik.com/product/hap_ac2 for more info.
Specifications:
- SoC: Qualcomm Atheros IPQ4018
- RAM: 128 MB
- Storage: 16 MB NOR
- Wireless:
· Built-in IPQ4018 (SoC) 802.11b/g/n 2x2:2, 2.5 dBi antennae
· Built-in IPQ4018 (SoC) 802.11a/n/ac 2x2:2, 2.5 dBi antennae
- Ethernet: Built-in IPQ4018 (SoC, QCA8075) , 5x 1000/100/10 port,
passive PoE in
- 1x USB Type A port
Installation:
Boot the initramfs image via TFTP and then flash the sysupgrade
image using "sysupgrade -n"
Signed-off-by: Robert Marko <robimarko@gmail.com>
(cherry picked from commit faea7becafc634dc882f0ad8f9388862ccd5bd0d)
[Compile Tested]
Signed-off-by: Nick Hainke <vincent@systemli.org>
While rebasing into setting bits instead of magic values,
I accidentally forgot to actually set the force bit.
Without it using the pins as GPIO-s did not actually work.
Fixes: b5c93ed ("ipq40xx: add Qualcomm QCA807x driver")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
(cherry picked from commit 7f2d9ccd09a1d3034aaf9c943747fc1631da5cac)
Both devices use u-boot env variables to boot OpenWrt from its flash
partition. Using u-boot envtools, it is possible to change the bootcmd
back to the stock firmware partition directly from OpenWrt without
attaching a serial cable or even physically accessing the device.
Signed-off-by: Jan Alexander <jan@nalx.net>
DTS files do not need to be executable. 644 is enough.
Fixes: 0fbdb51f7643 ("ipq40xx: add Edgecore OAP-100 support")
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
[split by targets]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Since updating the MDIO driver, the probe will fail hard on any
PHY not present on the bus, while this was not the case prior.
Fixes commit 26b1f72381fb ("ipq40xx: net: phy: ar40xx: remove PHY
handling")
Signed-off-by: David Bauer <mail@david-bauer.net>
Specifications:
SOC: Qualcomm IPQ4018 (DAKOTA) ARM Quad-Core
RAM: 256 MiB
FLASH1: 4 MiB NOR
FLASH2: 128 MiB NAND
ETH: Qualcomm QCA8075
WLAN1: Qualcomm Atheros QCA4018 2.4GHz 802.11b/g/n 2x2
WLAN2: Qualcomm Atheros QCA4018 5GHz 802.11n/ac W2 2x2
INPUT: Reset
LED: Power, Internet
UART1: On board pin header near to LED (3.3V, TX, RX, GND), 3.3V without pin - 115200 8N1
OTHER: On board with BLE module - by cp210x USB serial chip
On board hareware watchdog with GPIO0 high to turn on, and GPIO4 for watchdog feed
Install via uboot tftp or uboot web failsafe.
By uboot tftp:
(IPQ40xx) # tftpboot 0x84000000 openwrt-ipq40xx-generic-glinet_gl-ap1300-squashfs-nand-factory.ubi
(IPQ40xx) # run lf
By uboot web failsafe:
Push the reset button for 10 seconds util the power led flash faster,
then use broswer to access http://192.168.1.1
Afterwards upgrade can use sysupgrade image.
Signed-off-by: Dongming Han <handongming@gl-inet.com>
Lets use the generic upstream phy_print_status() instead of doing
something similar by hand.
Before:
ess_edma c080000.edma: eth1: GMAC Link is up with phy_speed=1000
After:
ess_edma c080000.edma eth1: Link is Up - 1Gbps/Full - flow control rx/tx
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Since we now have a proper PHY driver for QCA807x and AR803x has already
been supported properly there is no need for the driver to be poking
on PHY registers for ethtool ops.
So, lets simply use the generic
phy_ethtool_ksettings_get/phy_ethtool_ksettings_set functions.
This also has the advantage of properly populating stuff other than
speeds like, transceiver type, MDI-X etc.
ethtool before:
root@OpenWrt:/# ethtool eth1
Settings for eth1:
Supported ports: [ TP MII ]
Supported link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Full
1000baseX/Full
Supported pause frame use: Symmetric Receive-only
Supports auto-negotiation: Yes
Supported FEC modes: Not reported
Advertised link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Full
1000baseX/Full
Advertised pause frame use: Symmetric Receive-only
Advertised auto-negotiation: Yes
Advertised FEC modes: Not reported
Link partner advertised link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Full
Link partner advertised pause frame use: No
Link partner advertised auto-negotiation: No
Link partner advertised FEC modes: Not reported
Speed: 1000Mb/s
Duplex: Full
Port: Twisted Pair
PHYAD: 4
Transceiver: internal
Auto-negotiation: on
MDI-X: Unknown
Supports Wake-on: d
Wake-on: d
Current message level: 0x00000000 (0)
Link detected: yes
ethtool after:
root@OpenWrt:/# ethtool eth1
Settings for eth1:
Supported ports: [ TP MII ]
Supported link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Full
1000baseX/Full
Supported pause frame use: Symmetric Receive-only
Supports auto-negotiation: Yes
Supported FEC modes: Not reported
Advertised link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Full
1000baseX/Full
Advertised pause frame use: Symmetric Receive-only
Advertised auto-negotiation: Yes
Advertised FEC modes: Not reported
Link partner advertised link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Full
Link partner advertised pause frame use: Symmetric Receive-only
Link partner advertised auto-negotiation: Yes
Link partner advertised FEC modes: Not reported
Speed: 1000Mb/s
Duplex: Full
Port: Twisted Pair
PHYAD: 4
Transceiver: external
Auto-negotiation: on
MDI-X: off (auto)
Supports Wake-on: d
Wake-on: d
Current message level: 0x00000000 (0)
Link detected: yes
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Since the new PHY driver manages each PHY individually and therefore
registers each PHY that is marked with gpio-controller; DT property as a
GPIO controller we need to convert old DT bindings to account for this.
Only 2 boards use this so its not much of an issue.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
PHY needs to be soft reset before starting it from ethernet driver as
AR40xx calibration will leave it in unwanted state.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Since we now have proper PHY driver for the QCA807x PHY-s, lets remove
PHY handling from AR40xx.
This removes PHY driver, PHY GPIO driver and PHY init code.
AR40xx still needs to handle PSGMII calibration as that requires R/W
from the switch, so I am unable to move it into PHY driver.
This also converted the AR40xx driver to use OF_MDIO to find the MDIO
bus as it now cant be set through the PHY driver.
So lets depend on OF_MDIO in KConfig.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
This adds driver for the Qualcomm QCA8072 and QCA8075 PHY-s.
They are 2 or 5 port IEEE 802.3 clause 22 compliant
10BASE-Te, 100BASE-TX and 1000BASE-T PHY-s.
They feature 2 SerDes, one for PSGMII or QSGMII connection with MAC,
while second one is SGMII for connection to MAC or fiber.
Both models have a combo port that supports 1000BASE-X and 100BASE-FX
fiber.
Each PHY inside of QCA807x series has 2 digitally controlled output only
pins that natively drive LED-s.
But some vendors used these to driver generic LED-s controlled by
user space, so lets enable registering each PHY as GPIO controller and
add driver for it.
This also adds the ability to specify DT properties so that 1000 Base-T
LED will also be lit up for 100 and 10 Base connections.
This is usually done by U-boot, but boards running mainline U-boot are
not configuring this yet.
These PHY-s are commonly used in Qualcomm IPQ40xx, IPQ60xx and IPQ807x
boards.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
With the reworked MDIO driver, EDMA will fail to get the MII BUS as it
used the MII BUS stored inside the MDIO structure private data.
This obviously does not work with the modernized driver, so lets switch
to using a purpose build of_mdio_find_bus() which will return the MII
BUS and only requires the MDIO node to be passed.
This is easy as we already have the node parsed.
Also, since we now require OF_MDIO add that as dependency.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
SOC: IPQ4018 / QCA Dakota
CPU: Quad-Core ARMv7 Processor rev 5 (v71) Cortex-A7
DRAM: 256 MiB
NOR: 32 MiB
ETH: Qualcomm Atheros QCA8075 (2 ports)
PLC: MaxLinear G.hn 88LX5152
WLAN1: Qualcomm Atheros QCA4018 2.4GHz 802.11bgn 2:2x2
WLAN2: Qualcomm Atheros QCA4018 5GHz 802.11a/n/ac 2:2x2
INPUT: RESET, WiFi, PLC Button
LEDS: red/white home, white WiFi
To modify a retail device to run OpenWRT firmware:
1) Setup a TFTP server on IP address 192.168.0.100 and copy the OpenWRT
initramfs (initramfs-fit-uImage.itb) to the TFTP root as 'uploadfile'.
2) Power on the device while pressing the recessed reset button next to
the Ethernet ports. This causes the bootloader to retrieve and start
the initramfs.
3) Once the initramfs is booted, the device will come up with IP
192.168.1.1. You can then connect through SSH (allow some time for
the first connection).
4) On the device shell, run 'fw_printenv' to show the U-boot environment.
Backup this information since it contains device unique factory data.
5) Change the boot command to support booting OpenWRT:
# fw_setenv bootcmd 'sf probe && sf read 0x84000000 0x180000 0x400000 && bootm'
6) Change directory to /tmp, download the sysupgrade (e.g. through wget)
and install it with sysupgrade. The device will reboot into OpenWRT.
Notice that there is currently no support for booting the G.hn chip.
This requires userland software we lack the rights to share right now.
Signed-off-by: Stefan Schake <stefan.schake@devolo.de>
Device specifications:
* QCA IPQ4019
* 256 MB of RAM
* 32 MB of SPI NOR flash (w25q256)
- 2x 15 MB available; but one of the 15 MB regions is the recovery image
* 2T2R 2.4 GHz
- QCA4019 hw1.0 (SoC)
- requires special BDF in QCA4019/hw1.0/board-2.bin with
bus=ahb,bmi-chip-id=0,bmi-board-id=20,variant=PlasmaCloud-PA2200
* 2T2R 5 GHz (channel 36-64)
- QCA9888 hw2.0 (PCI)
- requires special BDF in QCA9888/hw2.0/board-2.bin
bus=pci,bmi-chip-id=0,bmi-board-id=16,variant=PlasmaCloud-PA2200
* 2T2R 5 GHz (channel 100-165)
- QCA4019 hw1.0 (SoC)
- requires special BDF in QCA4019/hw1.0/board-2.bin with
bus=ahb,bmi-chip-id=0,bmi-board-id=21,variant=PlasmaCloud-PA2200
* GPIO-LEDs for 2.4GHz, 5GHz-SoC and 5GHz-PCIE
* GPIO-LEDs for power (orange) and status (blue)
* 1x GPIO-button (reset)
* TTL pins are on board (arrow points to VCC, then follows: GND, TX, RX)
* 2x gigabit ethernet
- phy@mdio3:
+ Label: Ethernet 1
+ gmac0 (ethaddr) in original firmware
+ used as LAN interface
- phy@mdio4:
+ Label: Ethernet 2
+ gmac1 (eth1addr) in original firmware
+ 802.3at POE+
+ used as WAN interface
* 12V 2A DC
Flashing instructions:
The tool ap51-flash (https://github.com/ap51-flash/ap51-flash) should be
used to transfer the factory image to the u-boot when the device boots up.
Signed-off-by: Marek Lindner <marek.lindner@kaiwoo.ai>
[sven@narfation.org: prepare commit message, rebase, use all LEDs, switch
to dualboot_datachk upgrade script, use eth1 as designated WAN interface]
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Device specifications:
* QCA IPQ4018
* 256 MB of RAM
* 32 MB of SPI NOR flash (w25q256)
- 2x 15 MB available; but one of the 15 MB regions is the recovery image
* 2T2R 2.4 GHz
- QCA4019 hw1.0 (SoC)
- requires special BDF in QCA4019/hw1.0/board-2.bin with
bus=ahb,bmi-chip-id=0,bmi-board-id=16,variant=PlasmaCloud-PA1200
* 2T2R 5 GHz
- QCA4019 hw1.0 (SoC)
- requires special BDF in QCA4019/hw1.0/board-2.bin with
bus=ahb,bmi-chip-id=0,bmi-board-id=17,variant=PlasmaCloud-PA1200
* 3x GPIO-LEDs for status (cyan, purple, yellow)
* 1x GPIO-button (reset)
* 1x USB (xHCI)
* TTL pins are on board (arrow points to VCC, then follows: GND, TX, RX)
* 2x gigabit ethernet
- phy@mdio4:
+ Label: Ethernet 1
+ gmac0 (ethaddr) in original firmware
+ used as LAN interface
- phy@mdio3:
+ Label: Ethernet 2
+ gmac1 (eth1addr) in original firmware
+ 802.3af/at POE(+)
+ used as WAN interface
* 12V/24V 1A DC
Flashing instructions:
The tool ap51-flash (https://github.com/ap51-flash/ap51-flash) should be
used to transfer the factory image to the u-boot when the device boots up.
Signed-off-by: Marek Lindner <marek.lindner@kaiwoo.ai>
[sven@narfation.org: prepare commit message, rebase, use all LEDs, switch
to dualboot_datachk upgrade script, use eth1 as designated WAN interface]
Signed-off-by: Sven Eckelmann <sven@narfation.org>
This reverts the usage of the S-Tag for separating LAN and WAN port on
the embedded switch. Many users complained about not being able to
manage C-Tag addition / removal on the switch as well as degraded
performance.
Fixes: commit 9da2b567605b ("ipq40xx: fix ethernet vlan double tagging")
Signed-off-by: David Bauer <mail@david-bauer.net>
The ASUS MAP-AC2200 suffers from a lower transmit/receive
signal power as compared to the stock firmware.
Upon investigation, it was discovered that stock firmware from
the GPL_MAP-AC2200_3.0.0.4.384.46249-g97d05bb.tar archive.
set the following GPIOs in "release/src/router/rc/init.c".
GPIO 44 and 46 have to be set to output high
GPIO 45 and 47 have to be set to output low
Here are some results, after activating the relevant
gpios through cmdline:
<https://forum.openwrt.org/t/asus-map-ac2200-low-transmit-receive-signal-5ghz/69005/12>
THX @ slh
Fixes: 9ad3967f140 ("ipq40xx: add support for ASUS Lyra")
Signed-off-by: Yushi Nishida <kyro2man@gmx.net>
[slightly rewritten commit, added missing <>)
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
The OpenMesh related files were not updated since a while and the new
coding style requirements weren't integrated. This can cause problems
for new devices when an author uses these files as starting point.
* use SPDX-License-Identifiers instead of full license texts
* drop linux,default-trigger with value default-off for LEDs
* led nodes with label "abc:xyz" should have name "xyz_abc"
* led DT labels for "xyz_abc" should be "led_xyz_abc"
* "m25p80@0" flash node should be renamed to "flash@0"
* drop unnecessary empty lines
Signed-off-by: Sven Eckelmann <sven@narfation.org>
[minor commit title and message adjustments]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This re-enables offloading features disabled by
commit 9da2b567605b ("ipq40xx: fix ethernet vlan double tagging").
Single-PHY devices use port-based VLANs on the switch, therefore no
S-TAG magic is involved here. Re-enabling these features restores
throughput back to 950 Mbit/s.
Reported-by: Jannis Pinter <jannis@pinterjann.is>
Signed-off-by: David Bauer <mail@david-bauer.net>
The target uses 5.4 as default kernel since 03/2020.
Kernel 4.19 support is not really maintained anymore, it does not
seem to be needed, and removing it will make upcoming driver
updates easier. Thus, remove it.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Upstream provides DTS(I) files for IPQ4019/AP-DK04.1, but we overwrite
them with local versions so far.
Remove the local files and use patches to be closer to upstream.
We already do the same for IPQ40xx/AP-DK01.1-C1.
Technically, this changes the compatible from "qcom,ipq4019" to
"qcom,ipq4019-dk04.1-c1", but it has never been implemented correctly
beforehand anyway.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This adds several stylistic and functional improvements of the recently
added Edgecore ECW5211, especially:
* Drop the local BDFs as those are already in the upstream under different names
* Add SPDX tag to DTS
* Add label MAC address
* Move LED trigger to DTS
* Remove unnecessary status="okay"
* Disable unused SS USB phy as the USB port only supports USB 2.0
* Make uboot-env partition writable
* Remove qcom,poll_required_dynamic property as the driver does not use it
* Tidy up the device recipe
Fixes: 4488b260a02e ("ipq40xx: add Edgecore ECW5211 support")
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
Acked-by: Robert Marko <robert.marko@sartura.hr>
Like in the previous patches for ath79 and ramips, this will remove
the "devicename" from LED labels in ipq40xx.
The devicename is removed in DTS files and 01_leds, and a migration
script is added. While at it, also harmonize capitalization of
wlan2G/wlan5G vs. wlan2g/wlan5g.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
