mediatek: dts: fix typo

This commit is contained in:
hanwckf 2024-01-31 18:34:25 +08:00
parent 46bd2aa298
commit ebd9ce723a
7 changed files with 99 additions and 110 deletions

View File

@ -244,18 +244,18 @@
&pio {
i2c_pins: i2c-pins-g0 {
mux {
function = "i2c";
groups = "i2c0_0";
};
};
mux {
function = "i2c";
groups = "i2c0_0";
};
};
pcm_pins: pcm-pins-g0 {
mux {
function = "pcm";
groups = "pcm";
};
};
pcm_pins: pcm-pins-g0 {
mux {
function = "pcm";
groups = "pcm";
};
};
pwm0_pin: pwm0-pin-g0 {
mux {

View File

@ -261,8 +261,8 @@
uart1_pins: uart1-pins-g1 {
mux {
function = "uart";
groups = "uart1_1_no_cts_rts";
function = "uart";
groups = "uart1_1_no_cts_rts";
};
};
};

View File

@ -23,8 +23,8 @@
memory {
reg = <0 0x40000000 0 0x10000000>;
};
gpio-keys {
gpio-keys {
compatible = "gpio-keys";
button-reset {
@ -165,7 +165,7 @@
};
};
mdio: mdio-bus {
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
@ -228,9 +228,6 @@
};
};
&xhci {
vusb33-supply = <&reg_3p3v>;
vbus-supply = <&usb_vbus>;

View File

@ -21,12 +21,12 @@
led-running = &led_status_blue;
led-upgrade = &led_status_blue;
};
memory {
reg = <0 0x40000000 0 0x10000000>;
};
gpio-keys {
gpio-keys {
compatible = "gpio-keys";
button-reset {
@ -42,7 +42,6 @@
};
};
leds {
compatible = "gpio-leds";
@ -196,11 +195,9 @@
};
};
&xhci {
status = "okay";
};
};
&hnat {
mtketh-wan = "eth1";

View File

@ -190,7 +190,6 @@
status = "okay";
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi_flash_pins>;
@ -257,8 +256,6 @@
*/
};
&watchdog {
status = "okay";
};

View File

@ -1,45 +1,44 @@
/dts-v1/;
#include "mt7986a-tl-xdr-common.dtsi"
/
{
/ {
model = "TP-Link TL-XDR6086";
compatible = "tplink,tl-xdr6086", "mediatek,mt7986a";
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
};
port@0 {
reg = <0>;
label = "lan1";
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@5 {
reg = <5>;
label = "lan2";
phy-mode = "2500base-x";
port@0 {
reg = <0>;
label = "lan1";
};
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
port@5 {
reg = <5>;
label = "lan2";
phy-mode = "2500base-x";
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};

View File

@ -1,60 +1,59 @@
/dts-v1/;
#include "mt7986a-tl-xdr-common.dtsi"
/
{
model = "TP-Link TL-XDR6088";
compatible = "tplink,tl-xdr6088", "mediatek,mt7986a";
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
/ {
model = "TP-Link TL-XDR6088";
compatible = "tplink,tl-xdr6088", "mediatek,mt7986a";
};
port@0 {
reg = <0>;
label = "lan1";
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
label = "lan2";
};
port@0 {
reg = <0>;
label = "lan1";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan4";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@5 {
reg = <5>;
label = "lan5";
phy-mode = "2500base-x";
port@3 {
reg = <3>;
label = "lan4";
};
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
port@5 {
reg = <5>;
label = "lan5";
phy-mode = "2500base-x";
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};