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https://github.com/hanwckf/immortalwrt-mt798x.git
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layerscape: enable spi-uart in LS1012A-FRDM
This patch add missing support of SC16IS740 serial controller, installed on LS1012A-FRDM board. It was required to change RCW bits, because SPI was disabled by default. Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
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parent
4dc27a026b
commit
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@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
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PKG_NAME:=ls-rcw
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PKG_VERSION:=LSDK-20.04-update-290520
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PKG_RELEASE:=1
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PKG_RELEASE:=2
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PKG_SOURCE_PROTO:=git
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PKG_SOURCE_URL:=https://source.codeaurora.org/external/qoriq/qoriq-components/rcw
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@ -0,0 +1,13 @@
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--- a/ls1012afrdm/N_SSNP_3305/rcw_800.rcw
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+++ b/ls1012afrdm/N_SSNP_3305/rcw_800.rcw
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@@ -41,8 +41,8 @@ EC1_EXT_SAI2_RX=1
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EC1_BASE=0
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UART1_BASE=1
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SDHC1_BASE=1
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-SDHC2_BASE_DAT321=1
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-SDHC2_BASE_BASE=1
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+SDHC2_BASE_DAT321=3
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+SDHC2_BASE_BASE=3
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UART2_BASE_DATA=1
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EMI1_BASE=1
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CLK_OUT_BASE=1
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@ -842,6 +842,10 @@ CONFIG_SERIAL_FSL_LPUART=y
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CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
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CONFIG_SERIAL_MCTRL_GPIO=y
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CONFIG_SERIAL_OF_PLATFORM=y
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CONFIG_SERIAL_SC16IS7XX=y
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CONFIG_SERIAL_SC16IS7XX_CORE=y
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# CONFIG_SERIAL_SC16IS7XX_I2C is not set
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CONFIG_SERIAL_SC16IS7XX_SPI=y
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CONFIG_SERIAL_XILINX_PS_UART=y
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CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
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CONFIG_SERIO=y
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@ -0,0 +1,58 @@
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From 12de4b5e7cbcd193d5abb753ca511fe8f2236846 Mon Sep 17 00:00:00 2001
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From: Pawel Dembicki <paweldembicki@gmail.com>
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Date: Fri, 13 Nov 2020 07:30:03 +0100
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Subject: [PATCH 2/2] arm64: dts: fsl-ls1012a-frdm: add spi-uart device
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This patch adds spi-uart controller to LS1012A-FRDM board dts.
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Device is equipped in SC16IS740 from NXP.
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Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
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---
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.../boot/dts/freescale/fsl-ls1012a-frdm.dts | 21 +++++++++++++++++++
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1 file changed, 21 insertions(+)
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--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
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+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
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@@ -7,6 +7,7 @@
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*/
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/dts-v1/;
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+#include <dt-bindings/interrupt-controller/irq.h>
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#include "fsl-ls1012a.dtsi"
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/ {
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@@ -16,6 +17,7 @@
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aliases {
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ethernet0 = &pfe_mac0;
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ethernet1 = &pfe_mac1;
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+ serial0 = &duart0;
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};
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sys_mclk: clock-mclk {
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@@ -61,6 +63,26 @@
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};
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};
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};
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+
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+&dspi {
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+ status = "okay";
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+ bus-num = <0>;
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+
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+ serial@0 {
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+ reg = <0>;
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+ compatible = "nxp,sc16is740";
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+ spi-max-frequency = <4000000>;
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+ clocks = <&sc16is7xx_clk>;
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+ interrupt-parent = <&gpio1>;
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+ interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
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+
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+ sc16is7xx_clk: sc16is7xx_clk {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <24000000>;
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+ };
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+ };
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+};
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&duart0 {
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status = "okay";
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