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https://github.com/hanwckf/immortalwrt-mt798x.git
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ipq40xx: revert usage of VLAN S-TAG
This reverts the usage of the S-Tag for separating LAN and WAN port on the embedded switch. Many users complained about not being able to manage C-Tag addition / removal on the switch as well as degraded performance. Fixes: commit 9da2b567605b ("ipq40xx: fix ethernet vlan double tagging") Signed-off-by: David Bauer <mail@david-bauer.net>
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116191eddf
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cdc8d4b46f
@ -969,7 +969,7 @@ static int edma_axi_probe(struct platform_device *pdev)
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edma_netdev[i]->max_mtu = 9000;
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edma_netdev[i]->max_mtu = 9000;
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edma_netdev[i]->features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM
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edma_netdev[i]->features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM
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| NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_SG |
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| NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_SG |
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NETIF_F_TSO | NETIF_F_GRO;
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NETIF_F_TSO | NETIF_F_GRO | NETIF_F_HW_VLAN_CTAG_TX;
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edma_netdev[i]->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM |
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edma_netdev[i]->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM |
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NETIF_F_HW_VLAN_CTAG_RX
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NETIF_F_HW_VLAN_CTAG_RX
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| NETIF_F_SG | NETIF_F_TSO | NETIF_F_GRO;
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| NETIF_F_SG | NETIF_F_TSO | NETIF_F_GRO;
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@ -978,20 +978,11 @@ static int edma_axi_probe(struct platform_device *pdev)
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edma_netdev[i]->wanted_features = NETIF_F_HW_CSUM | NETIF_F_SG |
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edma_netdev[i]->wanted_features = NETIF_F_HW_CSUM | NETIF_F_SG |
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NETIF_F_TSO | NETIF_F_GRO;
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NETIF_F_TSO | NETIF_F_GRO;
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if (of_property_read_bool(np, "qcom,single-phy") && edma_cinfo->num_gmac == 1)
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edma_netdev[i]->features |= NETIF_F_HW_VLAN_CTAG_TX;
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#ifdef CONFIG_RFS_ACCEL
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#ifdef CONFIG_RFS_ACCEL
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edma_netdev[i]->features |= NETIF_F_NTUPLE;
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edma_netdev[i]->features |= NETIF_F_NTUPLE | NETIF_F_RXHASH;
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edma_netdev[i]->hw_features |= NETIF_F_NTUPLE;
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edma_netdev[i]->hw_features |= NETIF_F_NTUPLE | NETIF_F_RXHASH;
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edma_netdev[i]->vlan_features |= NETIF_F_NTUPLE;
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edma_netdev[i]->vlan_features |= NETIF_F_NTUPLE | NETIF_F_RXHASH;
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edma_netdev[i]->wanted_features |= NETIF_F_NTUPLE;
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edma_netdev[i]->wanted_features |= NETIF_F_NTUPLE | NETIF_F_RXHASH;
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if (of_property_read_bool(np, "qcom,single-phy") && edma_cinfo->num_gmac == 1) {
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edma_netdev[i]->features |= NETIF_F_RXHASH;
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edma_netdev[i]->hw_features |= NETIF_F_RXHASH;
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edma_netdev[i]->vlan_features |= NETIF_F_RXHASH;
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edma_netdev[i]->wanted_features |= NETIF_F_RXHASH;
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}
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#endif
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#endif
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edma_set_ethtool_ops(edma_netdev[i]);
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edma_set_ethtool_ops(edma_netdev[i]);
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@ -1200,11 +1200,7 @@ ar40xx_init_port(struct ar40xx_priv *priv, int port)
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ar40xx_rmw(priv, AR40XX_REG_PORT_STATUS(port),
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ar40xx_rmw(priv, AR40XX_REG_PORT_STATUS(port),
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AR40XX_PORT_AUTO_LINK_EN, 0);
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AR40XX_PORT_AUTO_LINK_EN, 0);
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/* CPU port is setting headers to limit output ports */
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ar40xx_write(priv, AR40XX_REG_PORT_HEADER(port), 0);
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if (port == 0)
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ar40xx_write(priv, AR40XX_REG_PORT_HEADER(port), 0x8);
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else
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ar40xx_write(priv, AR40XX_REG_PORT_HEADER(port), 0);
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ar40xx_write(priv, AR40XX_REG_PORT_VLAN0(port), 0);
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ar40xx_write(priv, AR40XX_REG_PORT_VLAN0(port), 0);
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@ -1247,10 +1243,6 @@ ar40xx_init_globals(struct ar40xx_priv *priv)
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t = (AR40XX_PORT0_FC_THRESH_ON_DFLT << 16) |
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t = (AR40XX_PORT0_FC_THRESH_ON_DFLT << 16) |
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AR40XX_PORT0_FC_THRESH_OFF_DFLT;
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AR40XX_PORT0_FC_THRESH_OFF_DFLT;
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ar40xx_write(priv, AR40XX_REG_PORT_FLOWCTRL_THRESH(0), t);
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ar40xx_write(priv, AR40XX_REG_PORT_FLOWCTRL_THRESH(0), t);
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/* set service tag to 802.1q */
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t = ETH_P_8021Q | AR40XX_ESS_SERVICE_TAG_STAG;
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ar40xx_write(priv, AR40XX_ESS_SERVICE_TAG, t);
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}
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}
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static void
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static void
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@ -1576,10 +1568,7 @@ ar40xx_setup_port(struct ar40xx_priv *priv, int port, u32 members)
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u32 pvid = priv->vlan_id[priv->pvid[port]];
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u32 pvid = priv->vlan_id[priv->pvid[port]];
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if (priv->vlan) {
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if (priv->vlan) {
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if (priv->vlan_tagged & BIT(port))
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egress = AR40XX_PORT_VLAN1_OUT_MODE_UNMOD;
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egress = AR40XX_PORT_VLAN1_OUT_MODE_TAG;
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else
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egress = AR40XX_PORT_VLAN1_OUT_MODE_UNMOD;
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ingress = AR40XX_IN_SECURE;
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ingress = AR40XX_IN_SECURE;
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} else {
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} else {
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@ -1591,16 +1580,8 @@ ar40xx_setup_port(struct ar40xx_priv *priv, int port, u32 members)
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t |= pvid << AR40XX_PORT_VLAN0_DEF_CVID_S;
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t |= pvid << AR40XX_PORT_VLAN0_DEF_CVID_S;
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ar40xx_write(priv, AR40XX_REG_PORT_VLAN0(port), t);
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ar40xx_write(priv, AR40XX_REG_PORT_VLAN0(port), t);
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t = egress << AR40XX_PORT_VLAN1_OUT_MODE_S;
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t = AR40XX_PORT_VLAN1_PORT_VLAN_PROP;
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t |= egress << AR40XX_PORT_VLAN1_OUT_MODE_S;
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/* set CPU port to core port */
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if (port == 0)
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t |= AR40XX_PORT_VLAN1_CORE_PORT;
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if (priv->vlan_tagged & BIT(port))
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t |= AR40XX_PORT_VLAN1_PORT_VLAN_PROP;
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else
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t |= AR40XX_PORT_VLAN1_PORT_TLS_MODE;
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ar40xx_write(priv, AR40XX_REG_PORT_VLAN1(port), t);
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ar40xx_write(priv, AR40XX_REG_PORT_VLAN1(port), t);
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