mediatek: add support for cmcc-rax3000m

This commit is contained in:
hanwckf 2023-07-26 12:06:37 +08:00
parent 73aa69df13
commit cc46e0582e
7 changed files with 255 additions and 0 deletions

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@ -2,6 +2,7 @@ CONFIG_TARGET_mediatek=y
CONFIG_TARGET_mediatek_mt7981=y
CONFIG_TARGET_MULTI_PROFILE=y
CONFIG_TARGET_DEVICE_mediatek_mt7981_DEVICE_cetron_ct3003=y
CONFIG_TARGET_DEVICE_mediatek_mt7981_DEVICE_cmcc_rax3000m=y
CONFIG_TARGET_DEVICE_mediatek_mt7981_DEVICE_jcg_q30=y
CONFIG_TARGET_DEVICE_mediatek_mt7981_DEVICE_livinet_zr-3020=y
CONFIG_TARGET_DEVICE_mediatek_mt7981_DEVICE_mt7981-360-t7=y

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@ -17,6 +17,9 @@ case "$board" in
livinet,zr-3020*)
ubootenv_add_uci_config "/dev/mtd2" "0x0" "0x20000" "0x20000" "1"
;;
cmcc,rax3000m)
ubootenv_add_uci_config "/dev/mtd2" "0x0" "0x80000" "0x20000" "4"
;;
xiaomi,mi-router-wr30u* |\
xiaomi,redmi-router-ax6000*)
ubootenv_add_uci_config "/dev/mtd2" "0x0" "0x10000" "0x20000" "1"

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@ -720,6 +720,7 @@ setup_model()
*zr-3020* |\
*360,t7* |\
xiaomi,mi-router-wr30u* |\
*rax3000m* |\
*7981*)
MT7981_whnat $num_of_wifi
;;

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@ -0,0 +1,223 @@
/dts-v1/;
#include "mt7981.dtsi"
/ {
model = "CMCC RAX3000M";
compatible = "cmcc,rax3000m", "mediatek,mt7981";
aliases {
led-boot = &red_led;
led-failsafe = &red_led;
led-running = &green_led;
led-upgrade = &blue_led;
};
chosen {
bootargs = "console=ttyS0,115200n1 loglevel=8 \
earlycon=uart8250,mmio32,0x11002000";
};
memory {
reg = <0 0x40000000 0 0x20000000>;
};
leds {
compatible = "gpio-leds";
red_led: red {
label = "rax3000m:red";
gpios = <&pio 35 GPIO_ACTIVE_LOW>;
};
green_led: green {
label = "rax3000m:green";
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
};
blue_led: blue {
label = "rax3000m:blue";
gpios = <&pio 12 GPIO_ACTIVE_LOW>;
};
};
gpio-keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};
mesh {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
};
};
gsw: gsw@0 {
compatible = "mediatek,mt753x";
mediatek,ethsys = <&ethsys>;
#address-cells = <1>;
#size-cells = <0>;
};
nmbm_spim_nand {
compatible = "generic,nmbm";
#address-cells = <1>;
#size-cells = <1>;
lower-mtd-device = <&spi_nand>;
forced-create;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "BL2";
reg = <0x0 0x100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x100000 0x80000>;
};
partition@180000 {
label = "Factory";
reg = <0x180000 0x200000>;
};
partition@380000 {
label = "FIP";
reg = <0x380000 0x200000>;
};
partition@580000 {
label = "ubi";
reg = <0x580000 0x7200000>;
}; // ubi+plugins+fwk+fwk2
};
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "gmii";
phy-handle = <&phy0>;
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
compatible = "ethernet-phy-id03a2.9461";
reg = <0>;
phy-mode = "gmii";
nvmem-cells = <&phy_calibration>;
nvmem-cell-names = "phy-cal-data";
};
};
};
&gsw {
mediatek,mdio = <&mdio>;
mediatek,mdio_master_pinmux = <0>;
reset-gpios = <&pio 39 0>;
interrupt-parent = <&pio>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
status = "okay";
port6: port@6 {
compatible = "mediatek,mt753x-port";
//mediatek,ssc-on;
reg = <6>;
phy-mode = "sgmii";
fixed-link {
speed = <2500>;
full-duplex;
};
};
};
&hnat {
mtketh-wan = "eth1";
mtketh-lan = "eth0";
mtketh-max-gmac = <2>;
status = "okay";
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand: spi_nand@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-buswidth = <4>;
spi-rx-buswidth = <4>;
spi-cal-enable;
spi-cal-mode = "read-data";
spi-cal-datalen = <7>;
spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>; /* 'SPINAND' */
spi-cal-addrlen = <5>;
spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};
&xhci {
mediatek,u3p-dis-msk = <0x0>;
phys = <&u2port0 PHY_TYPE_USB2>,
<&u3port0 PHY_TYPE_USB3>;
status = "okay";
};

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@ -335,3 +335,23 @@ define Device/livinet_zr-3020
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
TARGET_DEVICES += livinet_zr-3020
define Device/cmcc_rax3000m
DEVICE_VENDOR := CMCC
DEVICE_MODEL := RAX3000M
DEVICE_DTS := mt7981-cmcc-rax3000m
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
DEVICE_PACKAGES := mkf2fs e2fsprogs blkid blockdev losetup kmod-usb-printer \
kmod-fs-ext4 kmod-fs-exfat kmod-fs-ksmbd kmod-fs-ntfs3 \
kmod-fs-vfat kmod-nls-cp437 kmod-nls-iso8859-1
SUPPORTED_DEVICES := cmcc,rax3000m
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
IMAGE_SIZE := 116736k
KERNEL_IN_UBI := 1
IMAGES += factory.bin
IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE)
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
TARGET_DEVICES += cmcc_rax3000m

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@ -42,6 +42,11 @@ mediatek_setup_interfaces()
ucidef_add_switch "switch0" \
"1:lan" "2:lan" "3:lan" "0:wan" "6t@eth0"
;;
*rax3000m*)
ucidef_set_interfaces_lan_wan "eth0" "eth1"
ucidef_add_switch "switch0" \
"0:lan" "1:lan" "2:lan" "6u@eth0"
;;
*mt3000* |\
glinet,x3000-emmc |\
*xe3000* |\

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@ -195,6 +195,7 @@ platform_do_upgrade() {
*360,t7* |\
*cetron,ct3003* |\
*jcg,q30* |\
cmcc,rax3000m |\
*snand*)
nand_do_upgrade "$1"
;;
@ -229,6 +230,7 @@ platform_check_image() {
xiaomi,mi-router-wr30u-112m|\
*cetron,ct3003* |\
*jcg,q30* |\
cmcc,rax3000m |\
*snand* |\
*emmc*)
# tar magic `ustar`