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rockchip: remove vendor usb3 inno driver files

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(cherry picked from commit 4db435509dc90113cabc03a667b974e0445147f6)
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AmadeusGhost 2021-10-17 23:05:35 +08:00 committed by Tianling Shen
parent 8bb0bb391e
commit c7e3d01f70
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1 changed files with 0 additions and 157 deletions
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target/linux/rockchip/files/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb3.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/phy/phy-rockchip-inno-usb3.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: ROCKCHIP USB 3.0 PHY WITH INNO IP BLOCK
maintainers:
properties:
compatible:
enum:
- rockchip,rk3328-u3phy
reg:
- description: the base address of the USB 3.0 PHY
interrupts:
maxItems: 1
interrupt-names:
items:
- const: linestate
description: host/otg linestate interrupt
clocks:
maxItems: 2
clock-names:
items:
- const: u3phy-otg
description: USB 3.0 PHY UTMI
- const: u3phy-pipe
description: USB 3.0 PHY Pipe
resets:
maxItems: 6
reset-names:
items:
- const: u3phy-u2-por
description: USB 2.0 logic of USB 3.0 PHY
- const: u3phy-u3-por
description: USB 3.0 logic of USB 3.0 PHY
- const: u3phy-pipe-mac
description: USB 3.0 PHY pipe MAC
- const: u3phy-utmi-mac
description: USB 3.0 PHY utmi MAC
- const: u3phy-utmi-apb
description: USB 3.0 PHY utmi apb
- const: u3phy-pipe-apb
description: USB 3.0 PHY pipe apb
"#phy-cells":
const: 1
rockchip,u3phygrf:
$ref: /schemas/types.yaml#/definitions/phandle-array
type: array
- description: phandle to the syscon managing the
"USB 3.0 PHY general register files".
vbus-drv-gpios:
$ref: /schemas/types.yaml#/definitions/phandle-array
type: array
- description: phandle for gpio vbus supply
required:
- compatible
- reg
- interrupts
- interrupt-names
- clocks
- clock-names
- resets
- reset-names
- "#phy-cells"
- rockchip,u3phygrf
patternProperties:
"^u3phy_utmi@[0-9a-f]+$":
type: object
properties:
- description: USB 2.0 utmi phy.
rockchip,odt-val-tuning:
type: boolean
- description: specify 45ohm ODT tuning value.
"phy-cells":
const: 0
required:
- reg
- "#phy-cells"
patternProperties:
"^u3phy_pipe@[0-9a-f]+$":
type: object
properties:
- description: USB 3.0 pipe phy.
rockchip,refclk-25m-quirk :
- description: phy reference clock changed to 25m quirk.
"phy-cells":
const: 0
required:
- reg
- "#phy-cells"
examples:
usb3phy_grf: syscon@ff460000 {
compatible = "rockchip,usb3phy-grf", "syscon";
reg = <0x0 0xff460000 0x0 0x1000>;
};
...
u3phy: usb3-phy@ff470000 {
compatible = "rockchip,rk3328-u3phy";
reg = <0x0 0xff470000 0x0 0x0>;
rockchip,u3phygrf = <&usb3phy_grf>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "linestate";
clocks = <&cru PCLK_USB3PHY_OTG>, <&cru PCLK_USB3PHY_PIPE>;
clock-names = "u3phy-otg", "u3phy-pipe";
resets = <&cru SRST_USB3PHY_U2>,
<&cru SRST_USB3PHY_U3>,
<&cru SRST_USB3PHY_PIPE>,
<&cru SRST_USB3OTG_UTMI>,
<&cru SRST_USB3PHY_OTG_P>,
<&cru SRST_USB3PHY_PIPE_P>;
reset-names = "u3phy-u2-por", "u3phy-u3-por",
"u3phy-pipe-mac", "u3phy-utmi-mac",
"u3phy-utmi-apb", "u3phy-pipe-apb";
vbus-drv-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
u3phy_utmi: utmi@ff470000 {
reg = <0x0 0xff470000 0x0 0x8000>;
#phy-cells = <0>;
};
u3phy_pipe: pipe@ff478000 {
reg = <0x0 0xff478000 0x0 0x8000>;
#phy-cells = <0>;
};
};