Mediatek:add dual ppe support for mt798x 512RAM devices

This commit is contained in:
padavanonly 2023-12-05 13:21:37 +08:00 committed by hanwckf
parent a13daf8efe
commit c5668fe082
5 changed files with 15 additions and 3 deletions

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@ -124,6 +124,7 @@
&hnat {
mtketh-wan = "eth1";
mtketh-lan = "eth0";
mtketh-ppe-num = <2>;
mtketh-max-gmac = <2>;
status = "okay";
};

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@ -129,6 +129,7 @@
mtketh-wan = "eth1";
mtketh-lan = "eth0";
mtketh-max-gmac = <2>;
mtketh-ppe-num = <2>;
status = "okay";
};

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@ -142,8 +142,10 @@ void set_gmac_ppe_fwd(int id, int enable)
reg = hnat_priv->fe_base + (id ? GDMA2_FWD_CFG : GDMA1_FWD_CFG);
if (enable) {
cr_set_bits(reg, BITS_GDM_ALL_FRC_P_PPE);
if (id == 0)
cr_set_bits(reg, BITS_GDM_ALL_FRC_P_PPE);
else
cr_set_bits(reg, BITS_GDM_ALL_FRC_P_PPE1);
return;
}

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@ -764,6 +764,14 @@ enum FoeIpAct {
#define BITS_GDM_ALL_FRC_P_PPE \
(BITS_GDM_UFRC_P_PPE | BITS_GDM_BFRC_P_PPE | BITS_GDM_MFRC_P_PPE | \
BITS_GDM_OFRC_P_PPE)
#define BITS_GDM_UFRC_P_PPE1 (NR_PPE1_PORT << 12)
#define BITS_GDM_BFRC_P_PPE1 (NR_PPE1_PORT << 8)
#define BITS_GDM_MFRC_P_PPE1 (NR_PPE1_PORT << 4)
#define BITS_GDM_OFRC_P_PPE1 (NR_PPE1_PORT << 0)
#define BITS_GDM_ALL_FRC_P_PPE1 \
(BITS_GDM_UFRC_P_PPE1 | BITS_GDM_BFRC_P_PPE1 | \
BITS_GDM_MFRC_P_PPE1 | BITS_GDM_OFRC_P_PPE1)
#define BITS_GDM_UFRC_P_CPU_PDMA (NR_PDMA_PORT << 12)
#define BITS_GDM_BFRC_P_CPU_PDMA (NR_PDMA_PORT << 8)

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@ -81,7 +81,7 @@ struct hnat_desc {
#define skb_hnat_wc_id(skb) (((struct hnat_desc *)((skb)->head))->wcid)
#define skb_hnat_bss_id(skb) (((struct hnat_desc *)((skb)->head))->bssid)
#define skb_hnat_ppe(skb) \
((skb_hnat_iface(skb) == FOE_MAGIC_WED1 && CFG_PPE_NUM > 1) ? 1 : 0)
(((skb_hnat_sport(skb) == NR_GMAC2_PORT) && (CFG_PPE_NUM >= 2)) ? 1 : 0)
#define do_ext2ge_fast_try(dev, skb) \
((skb_hnat_iface(skb) == FOE_MAGIC_EXT) && !is_from_extge(skb))
#define set_from_extge(skb) (HNAT_SKB_CB2(skb)->magic = 0x78786688)