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Mediatek:add dual ppe support for mt798x 512RAM devices
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@ -124,6 +124,7 @@
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&hnat {
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mtketh-wan = "eth1";
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mtketh-lan = "eth0";
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mtketh-ppe-num = <2>;
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mtketh-max-gmac = <2>;
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status = "okay";
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};
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@ -129,6 +129,7 @@
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mtketh-wan = "eth1";
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mtketh-lan = "eth0";
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mtketh-max-gmac = <2>;
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mtketh-ppe-num = <2>;
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status = "okay";
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};
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@ -142,8 +142,10 @@ void set_gmac_ppe_fwd(int id, int enable)
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reg = hnat_priv->fe_base + (id ? GDMA2_FWD_CFG : GDMA1_FWD_CFG);
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if (enable) {
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cr_set_bits(reg, BITS_GDM_ALL_FRC_P_PPE);
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if (id == 0)
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cr_set_bits(reg, BITS_GDM_ALL_FRC_P_PPE);
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else
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cr_set_bits(reg, BITS_GDM_ALL_FRC_P_PPE1);
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return;
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}
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@ -764,6 +764,14 @@ enum FoeIpAct {
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#define BITS_GDM_ALL_FRC_P_PPE \
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(BITS_GDM_UFRC_P_PPE | BITS_GDM_BFRC_P_PPE | BITS_GDM_MFRC_P_PPE | \
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BITS_GDM_OFRC_P_PPE)
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#define BITS_GDM_UFRC_P_PPE1 (NR_PPE1_PORT << 12)
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#define BITS_GDM_BFRC_P_PPE1 (NR_PPE1_PORT << 8)
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#define BITS_GDM_MFRC_P_PPE1 (NR_PPE1_PORT << 4)
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#define BITS_GDM_OFRC_P_PPE1 (NR_PPE1_PORT << 0)
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#define BITS_GDM_ALL_FRC_P_PPE1 \
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(BITS_GDM_UFRC_P_PPE1 | BITS_GDM_BFRC_P_PPE1 | \
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BITS_GDM_MFRC_P_PPE1 | BITS_GDM_OFRC_P_PPE1)
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#define BITS_GDM_UFRC_P_CPU_PDMA (NR_PDMA_PORT << 12)
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#define BITS_GDM_BFRC_P_CPU_PDMA (NR_PDMA_PORT << 8)
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@ -81,7 +81,7 @@ struct hnat_desc {
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#define skb_hnat_wc_id(skb) (((struct hnat_desc *)((skb)->head))->wcid)
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#define skb_hnat_bss_id(skb) (((struct hnat_desc *)((skb)->head))->bssid)
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#define skb_hnat_ppe(skb) \
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((skb_hnat_iface(skb) == FOE_MAGIC_WED1 && CFG_PPE_NUM > 1) ? 1 : 0)
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(((skb_hnat_sport(skb) == NR_GMAC2_PORT) && (CFG_PPE_NUM >= 2)) ? 1 : 0)
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#define do_ext2ge_fast_try(dev, skb) \
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((skb_hnat_iface(skb) == FOE_MAGIC_EXT) && !is_from_extge(skb))
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#define set_from_extge(skb) (HNAT_SKB_CB2(skb)->magic = 0x78786688)
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