From a0c1fa13eb04ad6d64c9f43c53a1add0fe1bfc42 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Mon, 28 Nov 2022 21:05:54 +0100 Subject: [PATCH] layerscape: fix compilation error for missing define of dwc quirk Add missing define for dwc quirk patch required to fix compilation error for layerscape target. Signed-off-by: Christian Marangi --- ...karound-for-host-mode-VBUS-glitch-wh.patch | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/target/linux/layerscape/patches-5.4/820-usb-0009-usb-dwc3-Add-workaround-for-host-mode-VBUS-glitch-wh.patch b/target/linux/layerscape/patches-5.4/820-usb-0009-usb-dwc3-Add-workaround-for-host-mode-VBUS-glitch-wh.patch index 0e2942a3bc..b7ff6cd486 100644 --- a/target/linux/layerscape/patches-5.4/820-usb-0009-usb-dwc3-Add-workaround-for-host-mode-VBUS-glitch-wh.patch +++ b/target/linux/layerscape/patches-5.4/820-usb-0009-usb-dwc3-Add-workaround-for-host-mode-VBUS-glitch-wh.patch @@ -44,7 +44,22 @@ Reviewed-by: Peter Chen --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h -@@ -1049,6 +1049,8 @@ struct dwc3_scratchpad_array { +@@ -617,6 +617,14 @@ + #define DWC3_OSTS_VBUSVLD BIT(1) + #define DWC3_OSTS_CONIDSTS BIT(0) + ++/* Partial XHCI Register and Bit fields for quirk */ ++#define XHCI_HCSPARAMS1 0x4 ++#define XHCI_PORTSC_BASE 0x400 ++#define PORT_POWER (1 << 9) ++#define HCS_MAX_PORTS(p) (((p) >> 24) & 0x7f) ++#define XHCI_HC_LENGTH(p) (((p)>>00)&0x00ff) ++#define HC_LENGTH(p) XHCI_HC_LENGTH(p) ++ + /* Structures */ + + struct dwc3_trb; +@@ -1049,6 +1057,8 @@ struct dwc3_scratchpad_array { * 3 - Reserved * @dis_metastability_quirk: set to disable metastability quirk. * @dis_split_quirk: set to disable split boundary. @@ -53,7 +68,7 @@ Reviewed-by: Peter Chen * @imod_interval: set the interrupt moderation interval in 250ns * increments or 0 to disable. */ -@@ -1245,6 +1247,8 @@ struct dwc3 { +@@ -1245,6 +1255,8 @@ struct dwc3 { unsigned dis_split_quirk:1;