mirror of
https://github.com/hanwckf/immortalwrt-mt798x.git
synced 2025-01-09 02:43:53 +08:00
target/rockchip: add nanopi r2s support from blocktrron
This commit is contained in:
CN_SZTL
commit
843a45ad8a
@ -174,6 +174,18 @@ macaddr_setbit_la() {
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macaddr_setbit $1 7
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}
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macaddr_unsetbit_mc() {
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local mac=$1
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printf "%02x:%s" $((0x${mac%%:*} & ~0x01)) ${mac#*:}
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}
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macaddr_random() {
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local randsrc=$(get_mac_binary /dev/urandom 0)
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echo "$(macaddr_unsetbit_mc "$(macaddr_setbit_la "${randsrc}")")"
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}
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macaddr_2bin() {
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local mac=$1
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@ -8,12 +8,12 @@
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include $(TOPDIR)/rules.mk
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PKG_NAME:=arm-trusted-firmware-rockchip
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PKG_VERSION:=2.3-rc0
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PKG_VERSION:=2.3
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PKG_RELEASE:=1
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PKG_SOURCE:=atf-v$(PKG_VERSION).tar.gz
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PKG_SOURCE_URL:=https://github.com/atf-builds/atf/releases/download/v$(PKG_VERSION)/atf-v$(PKG_VERSION).tar.gz?
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PKG_HASH:=8d0a2bd18adf54f9cf6fe923d10f21c1d21f42a15067757333ff8989b25f100a
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PKG_HASH:=bf352298743aed594cf2958dd588e06ab6713fc514bb6f809bf55a85a87134c1
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PKG_LICENSE:=BSD-3-Clause
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PKG_LICENSE_FILES:=license.md
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@ -40,7 +40,7 @@ endef
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define Build/InstallDev
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$(INSTALL_DIR) -p $(STAGING_DIR_IMAGE)
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$(CP) $(PKG_BUILD_DIR)/rk3399_bl31.elf $(STAGING_DIR_IMAGE)/bl31.elf
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$(CP) $(PKG_BUILD_DIR)/rk*.elf $(STAGING_DIR_IMAGE)/
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endef
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define Package/arm-trusted-firmware-rockchip/install
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@ -5,9 +5,9 @@
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include $(TOPDIR)/rules.mk
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include $(INCLUDE_DIR)/kernel.mk
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PKG_VERSION:=2020.04
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PKG_VERSION:=2020.07
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PKG_HASH:=fe732aaf037d9cc3c0909bad8362af366ae964bbdac6913a34081ff4ad565372
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PKG_HASH:=c1f5bf9ee6bb6e648edbf19ce2ca9452f614b08a9f886f1a566aa42e8cf05f6a
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PKG_MAINTAINER:=Tobias Maedel <openwrt@tbspace.de>
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@ -27,20 +27,40 @@ define U-Boot/rockpro64-rk3399
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pine64_rockpro64
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DEPENDS:=+PACKAGE_u-boot-rockpro64-rk3399:arm-trusted-firmware-rockchip
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PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip
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ATF:=rk3399_bl31.elf
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endef
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define U-Boot/nanopi-r2s-rk3328
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BUILD_SUBTARGET:=armv8
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NAME:=NanoPi R2S
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BUILD_DEVICES:= \
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friendlyarm_nanopi-r2s
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DEPENDS:=+PACKAGE_u-boot-nanopi-r2s-rk3328:arm-trusted-firmware-rockchip
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PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip
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ATF:=rk3328_bl31.elf
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OF_PLATDATA:=$(1)
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endef
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UBOOT_TARGETS := \
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rockpro64-rk3399
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rockpro64-rk3399 \
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nanopi-r2s-rk3328
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UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes
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UBOOT_MAKE_FLAGS += \
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BL31=$(STAGING_DIR_IMAGE)/bl31.elf
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BL31=$(STAGING_DIR_IMAGE)/$(ATF)
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define Build/Configure
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$(SED) s/subdir.*pylibfdt//g $(PKG_BUILD_DIR)/scripts/dtc/Makefile
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$(call Build/Configure/U-Boot)
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ifneq ($(OF_PLATDATA),)
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mkdir -p $(PKG_BUILD_DIR)/tpl/dts
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mkdir -p $(PKG_BUILD_DIR)/include/generated
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$(CP) $(PKG_BUILD_DIR)/of-platdata/$(OF_PLATDATA)/dt-platdata.c $(PKG_BUILD_DIR)/tpl/dts/dt-platdata.c
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$(CP) $(PKG_BUILD_DIR)/of-platdata/$(OF_PLATDATA)/dt-structs-gen.h $(PKG_BUILD_DIR)/include/generated/dt-structs-gen.h
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endif
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$(SED) 's#CONFIG_MKIMAGE_DTC_PATH=.*#CONFIG_MKIMAGE_DTC_PATH="$(PKG_BUILD_DIR)/scripts/dtc/dtc"#g' $(PKG_BUILD_DIR)/.config
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echo 'CONFIG_IDENT_STRING=" OpenWrt"' >> $(PKG_BUILD_DIR)/.config
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endef
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@ -0,0 +1,24 @@
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From b137ca16b54c67d76714ea5a0138741959b0dc29 Mon Sep 17 00:00:00 2001
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From: David Bauer <mail@david-bauer.net>
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Date: Mon, 13 Jul 2020 23:37:37 +0200
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Subject: [PATCH] scripts: remove dependency on swig
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Don't build the libfdt tool, as it has a dependency on swig (which
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OpenWrt does not ship).
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This requires more hacks, as of-platdata generation does not work
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without it.
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Signed-off-by: David Bauer <mail@david-bauer.net>
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---
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scripts/dtc/Makefile | 2 --
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1 file changed, 2 deletions(-)
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--- a/scripts/dtc/Makefile
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+++ b/scripts/dtc/Makefile
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@@ -18,5 +18,3 @@ HOSTCFLAGS_dtc-parser.tab.o := -I$(src)
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# dependencies on generated files need to be listed explicitly
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$(obj)/dtc-lexer.lex.o: $(obj)/dtc-parser.tab.h
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-# Added for U-Boot
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-subdir-$(CONFIG_PYLIBFDT) += pylibfdt
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@ -0,0 +1,32 @@
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From 55273cf6079ddd3b006da69f0113c2c66c03f17e Mon Sep 17 00:00:00 2001
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From: David Bauer <mail@david-bauer.net>
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Date: Tue, 14 Jul 2020 22:44:22 +0200
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Subject: [PATCH] spl: remove dtoc of-pdata generation
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Remove the dtoc of-pdata generation. This generation is dependant on
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libpython-dev. As OpenWrt does not ship with this dependency, use
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pre-generated pdata files and remove the generation from the
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build-process.
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This only affects RK3328 boards.
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Signed-off-by: David Bauer <mail@david-bauer.net>
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---
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scripts/Makefile.spl | 6 ------
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1 file changed, 6 deletions(-)
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--- a/scripts/Makefile.spl
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+++ b/scripts/Makefile.spl
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@@ -320,12 +320,6 @@ PHONY += dts_dir
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dts_dir:
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$(shell [ -d $(obj)/dts ] || mkdir -p $(obj)/dts)
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-include/generated/dt-structs-gen.h: $(obj)/$(SPL_BIN).dtb dts_dir FORCE
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- $(call if_changed,dtoch)
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-
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-$(obj)/dts/dt-platdata.c: $(obj)/$(SPL_BIN).dtb dts_dir FORCE
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- $(call if_changed,dtocc)
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-
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ifdef CONFIG_SAMSUNG
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ifdef CONFIG_VAR_SIZE_SPL
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VAR_SIZE_PARAM = --vs
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@ -0,0 +1,513 @@
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From 42e21846e8faa537f2eda0297e1faa7d8a0abddb Mon Sep 17 00:00:00 2001
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From: David Bauer <mail@david-bauer.net>
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Date: Fri, 10 Jul 2020 14:58:30 +0200
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Subject: [PATCH] rockchip: rk3328: Add support for FriendlyARM NanoPi R2S
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This adds support for the NanoPi R2S from FriendlyArm.
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Rockchip RK3328 SoC
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1GB DDR4 RAM
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Gigabit Ethernet (WAN)
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Gigabit Ethernet (USB3) (LAN)
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USB 2.0 Host Port
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MicroSD slot
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Reset button
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WAN - LAN - SYS LED
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Signed-off-by: David Bauer <mail@david-bauer.net>
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---
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arch/arm/dts/Makefile | 1 +
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arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 34 +++
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arch/arm/dts/rk3328-nanopi-r2s.dts | 317 +++++++++++++++++++++
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board/rockchip/evb_rk3328/MAINTAINERS | 7 +
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configs/nanopi-r2s-rk3328_defconfig | 99 +++++++
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5 files changed, 458 insertions(+)
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create mode 100644 arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
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create mode 100644 arch/arm/dts/rk3328-nanopi-r2s.dts
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create mode 100644 configs/nanopi-r2s-rk3328_defconfig
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -106,6 +106,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
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dtb-$(CONFIG_ROCKCHIP_RK3328) += \
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rk3328-evb.dtb \
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+ rk3328-nanopi-r2s.dtb \
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rk3328-roc-cc.dtb \
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rk3328-rock64.dtb \
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rk3328-rock-pi-e.dtb
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--- /dev/null
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+++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
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@@ -0,0 +1,34 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+/*
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+ * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd
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+ * (C) Copyright 2020 David Bauer
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+ */
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+
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+#include "rk3328-u-boot.dtsi"
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+#include "rk3328-sdram-ddr4-666.dtsi"
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+/ {
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+ chosen {
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+ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
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+ };
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+};
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+
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+&gpio0 {
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+ u-boot,dm-spl;
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+};
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+
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+&pinctrl {
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+ u-boot,dm-spl;
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+};
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+
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+&sdmmc0m1_gpio {
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+ u-boot,dm-spl;
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+};
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+
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+&pcfg_pull_up_4ma {
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+ u-boot,dm-spl;
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+};
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+
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+/* Need this and all the pinctrl/gpio stuff above to set pinmux */
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+&vcc_sd {
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+ u-boot,dm-spl;
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+};
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--- /dev/null
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+++ b/arch/arm/dts/rk3328-nanopi-r2s.dts
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@@ -0,0 +1,317 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
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+ */
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+
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+/dts-v1/;
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+
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+#include <dt-bindings/input/input.h>
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+#include <dt-bindings/gpio/gpio.h>
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+#include "rk3328.dtsi"
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+
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+/ {
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+ model = "FriendlyARM NanoPi R2S";
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+ compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
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+
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+ chosen {
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ gmac_clkin: external-gmac-clock {
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+ compatible = "fixed-clock";
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+ clock-frequency = <125000000>;
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+ clock-output-names = "gmac_clkin";
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+ #clock-cells = <0>;
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+ };
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+
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+ vcc_sd: sdmmc-regulator {
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+ compatible = "regulator-fixed";
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+ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sdmmc0m1_gpio>;
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+ regulator-name = "vcc_sd";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc_io>;
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+ };
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+
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+ vcc_sys: vcc-sys {
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||||
+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_sys";
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+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
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+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_rtl8153: vcc-rtl8153-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&rtl8153_en_drv>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-name = "vcc_rtl8153";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ enable-active-high;
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&led_pins>;
|
||||
+
|
||||
+ sys {
|
||||
+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||
+ label = "nanopi-r2s:red:sys";
|
||||
+ };
|
||||
+
|
||||
+ lan {
|
||||
+ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
|
||||
+ label = "nanopi-r2s:green:lan";
|
||||
+ };
|
||||
+
|
||||
+ wan {
|
||||
+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
|
||||
+ label = "nanopi-r2s:green:wan";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ gpio_keys {
|
||||
+ compatible = "gpio-keys-polled";
|
||||
+ poll-interval = <100>;
|
||||
+
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&button_pins>;
|
||||
+
|
||||
+ reset {
|
||||
+ label = "Reset Button";
|
||||
+ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
|
||||
+ linux,code = <KEY_RESTART>;
|
||||
+ debounce-interval = <50>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&cpu0 {
|
||||
+ cpu-supply = <&vdd_arm>;
|
||||
+};
|
||||
+
|
||||
+&cpu1 {
|
||||
+ cpu-supply = <&vdd_arm>;
|
||||
+};
|
||||
+
|
||||
+&cpu2 {
|
||||
+ cpu-supply = <&vdd_arm>;
|
||||
+};
|
||||
+
|
||||
+&cpu3 {
|
||||
+ cpu-supply = <&vdd_arm>;
|
||||
+};
|
||||
+
|
||||
+&gmac2io {
|
||||
+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
|
||||
+ assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
|
||||
+ clock_in_out = "input";
|
||||
+ phy-supply = <&vcc_io>;
|
||||
+ phy-mode = "rgmii";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&rgmiim1_pins>;
|
||||
+ snps,force_thresh_dma_mode;
|
||||
+ snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
|
||||
+ snps,reset-active-low;
|
||||
+ snps,reset-delays-us = <0 10000 50000>;
|
||||
+ tx_delay = <0x24>;
|
||||
+ rx_delay = <0x18>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c1 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ rk805: rk805@18 {
|
||||
+ compatible = "rockchip,rk805";
|
||||
+ reg = <0x18>;
|
||||
+ interrupt-parent = <&gpio2>;
|
||||
+ interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ #clock-cells = <1>;
|
||||
+ clock-output-names = "xin32k", "rk805-clkout2";
|
||||
+ gpio-controller;
|
||||
+ #gpio-cells = <2>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pmic_int_l>;
|
||||
+ rockchip,system-power-controller;
|
||||
+ wakeup-source;
|
||||
+
|
||||
+ vcc1-supply = <&vcc_sys>;
|
||||
+ vcc2-supply = <&vcc_sys>;
|
||||
+ vcc3-supply = <&vcc_sys>;
|
||||
+ vcc4-supply = <&vcc_sys>;
|
||||
+ vcc5-supply = <&vcc_io>;
|
||||
+ vcc6-supply = <&vcc_sys>;
|
||||
+
|
||||
+ regulators {
|
||||
+ vdd_logic: DCDC_REG1 {
|
||||
+ regulator-name = "vdd_logic";
|
||||
+ regulator-min-microvolt = <712500>;
|
||||
+ regulator-max-microvolt = <1450000>;
|
||||
+ regulator-ramp-delay = <12500>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1000000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_arm: DCDC_REG2 {
|
||||
+ regulator-name = "vdd_arm";
|
||||
+ regulator-min-microvolt = <712500>;
|
||||
+ regulator-max-microvolt = <1450000>;
|
||||
+ regulator-ramp-delay = <12500>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <950000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_ddr: DCDC_REG3 {
|
||||
+ regulator-name = "vcc_ddr";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_io: DCDC_REG4 {
|
||||
+ regulator-name = "vcc_io";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <3300000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_18: LDO_REG1 {
|
||||
+ regulator-name = "vcc_18";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc18_emmc: LDO_REG2 {
|
||||
+ regulator-name = "vcc18_emmc";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_10: LDO_REG3 {
|
||||
+ regulator-name = "vdd_10";
|
||||
+ regulator-min-microvolt = <1000000>;
|
||||
+ regulator-max-microvolt = <1000000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1000000>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&io_domains {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ vccio1-supply = <&vcc_io>;
|
||||
+ vccio2-supply = <&vcc18_emmc>;
|
||||
+ vccio3-supply = <&vcc_io>;
|
||||
+ vccio4-supply = <&vcc_18>;
|
||||
+ vccio5-supply = <&vcc_io>;
|
||||
+ vccio6-supply = <&vcc_io>;
|
||||
+ pmuio-supply = <&vcc_io>;
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ leds {
|
||||
+ led_pins: led_pins {
|
||||
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>,
|
||||
+ <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
|
||||
+ <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ button {
|
||||
+ button_pins: button_pins {
|
||||
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pmic {
|
||||
+ pmic_int_l: pmic-int-l {
|
||||
+ rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ usb {
|
||||
+ rtl8153_en_drv: rtl8153-en-drv {
|
||||
+ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&sdmmc {
|
||||
+ bus-width = <4>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ cap-sd-highspeed;
|
||||
+ disable-wp;
|
||||
+ max-frequency = <150000000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
|
||||
+ vmmc-supply = <&vcc_sd>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tsadc {
|
||||
+ rockchip,hw-tshut-mode = <0>;
|
||||
+ rockchip,hw-tshut-polarity = <0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u2phy {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ u2phy_host: host-port {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ehci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ohci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
--- a/board/rockchip/evb_rk3328/MAINTAINERS
|
||||
+++ b/board/rockchip/evb_rk3328/MAINTAINERS
|
||||
@@ -5,6 +5,13 @@ F: board/rockchip/evb_rk3328
|
||||
F: include/configs/evb_rk3328.h
|
||||
F: configs/evb-rk3328_defconfig
|
||||
|
||||
+NANOPI-R2S-RK3328
|
||||
+M: David Bauer <mail@david-bauer.net>
|
||||
+S: Maintained
|
||||
+F: configs/nanopi-r2s-rk3328_defconfig
|
||||
+F: arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
|
||||
+F: arch/arm/dts/rk3328-nanopi-r2s.dts
|
||||
+
|
||||
ROC-RK3328-CC
|
||||
M: Loic Devulder <ldevulder@suse.com>
|
||||
M: Chen-Yu Tsai <wens@csie.org>
|
||||
--- /dev/null
|
||||
+++ b/configs/nanopi-r2s-rk3328_defconfig
|
||||
@@ -0,0 +1,99 @@
|
||||
+CONFIG_ARM=y
|
||||
+CONFIG_ARCH_ROCKCHIP=y
|
||||
+CONFIG_SYS_TEXT_BASE=0x00200000
|
||||
+CONFIG_SPL_GPIO_SUPPORT=y
|
||||
+CONFIG_ENV_OFFSET=0x3F8000
|
||||
+CONFIG_ROCKCHIP_RK3328=y
|
||||
+CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
|
||||
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
|
||||
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
|
||||
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
|
||||
+CONFIG_SPL_STACK_R_ADDR=0x600000
|
||||
+CONFIG_NR_DRAM_BANKS=1
|
||||
+CONFIG_DEBUG_UART_BASE=0xFF130000
|
||||
+CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
+CONFIG_SMBIOS_PRODUCT_NAME="nanopi_r2s_rk3328"
|
||||
+CONFIG_DEBUG_UART=y
|
||||
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
|
||||
+# CONFIG_ANDROID_BOOT_IMAGE is not set
|
||||
+CONFIG_FIT=y
|
||||
+CONFIG_FIT_VERBOSE=y
|
||||
+CONFIG_SPL_LOAD_FIT=y
|
||||
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2s.dtb"
|
||||
+CONFIG_MISC_INIT_R=y
|
||||
+# CONFIG_DISPLAY_CPUINFO is not set
|
||||
+CONFIG_DISPLAY_BOARDINFO_LATE=y
|
||||
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
||||
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
|
||||
+CONFIG_SPL_STACK_R=y
|
||||
+CONFIG_SPL_I2C_SUPPORT=y
|
||||
+CONFIG_SPL_POWER_SUPPORT=y
|
||||
+CONFIG_SPL_ATF=y
|
||||
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
|
||||
+CONFIG_CMD_BOOTZ=y
|
||||
+CONFIG_CMD_GPT=y
|
||||
+CONFIG_CMD_MMC=y
|
||||
+CONFIG_CMD_USB=y
|
||||
+# CONFIG_CMD_SETEXPR is not set
|
||||
+CONFIG_CMD_TIME=y
|
||||
+CONFIG_SPL_OF_CONTROL=y
|
||||
+CONFIG_TPL_OF_CONTROL=y
|
||||
+CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2s"
|
||||
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
||||
+CONFIG_TPL_OF_PLATDATA=y
|
||||
+CONFIG_ENV_IS_IN_MMC=y
|
||||
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
+CONFIG_NET_RANDOM_ETHADDR=y
|
||||
+CONFIG_TPL_DM=y
|
||||
+CONFIG_REGMAP=y
|
||||
+CONFIG_SPL_REGMAP=y
|
||||
+CONFIG_TPL_REGMAP=y
|
||||
+CONFIG_SYSCON=y
|
||||
+CONFIG_SPL_SYSCON=y
|
||||
+CONFIG_TPL_SYSCON=y
|
||||
+CONFIG_CLK=y
|
||||
+CONFIG_SPL_CLK=y
|
||||
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
|
||||
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
||||
+CONFIG_ROCKCHIP_GPIO=y
|
||||
+CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
+CONFIG_MMC_DW=y
|
||||
+CONFIG_MMC_DW_ROCKCHIP=y
|
||||
+CONFIG_SF_DEFAULT_SPEED=20000000
|
||||
+CONFIG_DM_ETH=y
|
||||
+CONFIG_ETH_DESIGNWARE=y
|
||||
+CONFIG_GMAC_ROCKCHIP=y
|
||||
+CONFIG_PINCTRL=y
|
||||
+CONFIG_SPL_PINCTRL=y
|
||||
+CONFIG_DM_PMIC=y
|
||||
+CONFIG_PMIC_RK8XX=y
|
||||
+CONFIG_SPL_DM_REGULATOR=y
|
||||
+CONFIG_REGULATOR_PWM=y
|
||||
+CONFIG_DM_REGULATOR_FIXED=y
|
||||
+CONFIG_SPL_DM_REGULATOR_FIXED=y
|
||||
+CONFIG_REGULATOR_RK8XX=y
|
||||
+CONFIG_PWM_ROCKCHIP=y
|
||||
+CONFIG_RAM=y
|
||||
+CONFIG_SPL_RAM=y
|
||||
+CONFIG_TPL_RAM=y
|
||||
+CONFIG_DM_RESET=y
|
||||
+CONFIG_BAUDRATE=1500000
|
||||
+CONFIG_DEBUG_UART_SHIFT=2
|
||||
+CONFIG_SYSRESET=y
|
||||
+# CONFIG_TPL_SYSRESET is not set
|
||||
+CONFIG_USB=y
|
||||
+CONFIG_USB_XHCI_HCD=y
|
||||
+CONFIG_USB_XHCI_DWC3=y
|
||||
+CONFIG_USB_EHCI_HCD=y
|
||||
+CONFIG_USB_EHCI_GENERIC=y
|
||||
+CONFIG_USB_OHCI_HCD=y
|
||||
+CONFIG_USB_OHCI_GENERIC=y
|
||||
+CONFIG_USB_DWC2=y
|
||||
+CONFIG_USB_DWC3=y
|
||||
+# CONFIG_USB_DWC3_GADGET is not set
|
||||
+CONFIG_USB_GADGET=y
|
||||
+CONFIG_USB_GADGET_DWC2_OTG=y
|
||||
+CONFIG_SPL_TINY_MEMSET=y
|
||||
+CONFIG_TPL_TINY_MEMSET=y
|
||||
+CONFIG_ERRNO_STR=y
|
||||
+CONFIG_SMBIOS_MANUFACTURER="pine64"
|
||||
@ -0,0 +1,148 @@
|
||||
/*
|
||||
* DO NOT MODIFY
|
||||
*
|
||||
* This file was generated by dtoc from a .dtb (device tree binary) file.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <dm.h>
|
||||
#include <dt-structs.h>
|
||||
|
||||
static const struct dtd_rockchip_rk3328_grf dtv_syscon_at_ff100000 = {
|
||||
.reg = {0xff100000, 0x1000},
|
||||
};
|
||||
U_BOOT_DEVICE(syscon_at_ff100000) = {
|
||||
.name = "rockchip_rk3328_grf",
|
||||
.platdata = &dtv_syscon_at_ff100000,
|
||||
.platdata_size = sizeof(dtv_syscon_at_ff100000),
|
||||
};
|
||||
|
||||
static const struct dtd_rockchip_rk3328_cru dtv_clock_controller_at_ff440000 = {
|
||||
.reg = {0xff440000, 0x1000},
|
||||
.rockchip_grf = 0x39,
|
||||
};
|
||||
U_BOOT_DEVICE(clock_controller_at_ff440000) = {
|
||||
.name = "rockchip_rk3328_cru",
|
||||
.platdata = &dtv_clock_controller_at_ff440000,
|
||||
.platdata_size = sizeof(dtv_clock_controller_at_ff440000),
|
||||
};
|
||||
|
||||
static const struct dtd_rockchip_rk3328_uart dtv_serial_at_ff130000 = {
|
||||
.clock_frequency = 0x16e3600,
|
||||
.clocks = {
|
||||
{&dtv_clock_controller_at_ff440000, {40}},
|
||||
{&dtv_clock_controller_at_ff440000, {212}},},
|
||||
.dma_names = {"tx", "rx"},
|
||||
.dmas = {0x10, 0x6, 0x10, 0x7},
|
||||
.interrupts = {0x0, 0x39, 0x4},
|
||||
.pinctrl_0 = 0x25,
|
||||
.pinctrl_names = "default",
|
||||
.reg = {0xff130000, 0x100},
|
||||
.reg_io_width = 0x4,
|
||||
.reg_shift = 0x2,
|
||||
};
|
||||
U_BOOT_DEVICE(serial_at_ff130000) = {
|
||||
.name = "rockchip_rk3328_uart",
|
||||
.platdata = &dtv_serial_at_ff130000,
|
||||
.platdata_size = sizeof(dtv_serial_at_ff130000),
|
||||
};
|
||||
|
||||
static const struct dtd_rockchip_rk3328_dw_mshc dtv_mmc_at_ff500000 = {
|
||||
.bus_width = 0x4,
|
||||
.cap_mmc_highspeed = true,
|
||||
.cap_sd_highspeed = true,
|
||||
.clocks = {
|
||||
{&dtv_clock_controller_at_ff440000, {317}},
|
||||
{&dtv_clock_controller_at_ff440000, {33}},
|
||||
{&dtv_clock_controller_at_ff440000, {74}},
|
||||
{&dtv_clock_controller_at_ff440000, {78}},},
|
||||
.disable_wp = true,
|
||||
.fifo_depth = 0x100,
|
||||
.interrupts = {0x0, 0xc, 0x4},
|
||||
.max_frequency = 0x8f0d180,
|
||||
.pinctrl_0 = {0x46, 0x47, 0x48, 0x49},
|
||||
.pinctrl_names = "default",
|
||||
.reg = {0xff500000, 0x4000},
|
||||
.u_boot_spl_fifo_mode = true,
|
||||
.vmmc_supply = 0x4a,
|
||||
};
|
||||
U_BOOT_DEVICE(mmc_at_ff500000) = {
|
||||
.name = "rockchip_rk3328_dw_mshc",
|
||||
.platdata = &dtv_mmc_at_ff500000,
|
||||
.platdata_size = sizeof(dtv_mmc_at_ff500000),
|
||||
};
|
||||
|
||||
static const struct dtd_rockchip_rk3328_pinctrl dtv_pinctrl = {
|
||||
.ranges = true,
|
||||
.rockchip_grf = 0x39,
|
||||
};
|
||||
U_BOOT_DEVICE(pinctrl) = {
|
||||
.name = "rockchip_rk3328_pinctrl",
|
||||
.platdata = &dtv_pinctrl,
|
||||
.platdata_size = sizeof(dtv_pinctrl),
|
||||
};
|
||||
|
||||
static const struct dtd_rockchip_gpio_bank dtv_gpio0_at_ff210000 = {
|
||||
.clocks = {
|
||||
{&dtv_clock_controller_at_ff440000, {200}},},
|
||||
.gpio_controller = true,
|
||||
.interrupt_controller = true,
|
||||
.interrupts = {0x0, 0x33, 0x4},
|
||||
.reg = {0xff210000, 0x100},
|
||||
};
|
||||
U_BOOT_DEVICE(gpio0_at_ff210000) = {
|
||||
.name = "rockchip_gpio_bank",
|
||||
.platdata = &dtv_gpio0_at_ff210000,
|
||||
.platdata_size = sizeof(dtv_gpio0_at_ff210000),
|
||||
};
|
||||
|
||||
static const struct dtd_regulator_fixed dtv_sdmmc_regulator = {
|
||||
.gpio = {0x5e, 0x1e, 0x1},
|
||||
.pinctrl_0 = 0x5f,
|
||||
.pinctrl_names = "default",
|
||||
.regulator_max_microvolt = 0x325aa0,
|
||||
.regulator_min_microvolt = 0x325aa0,
|
||||
.regulator_name = "vcc_sd",
|
||||
.vin_supply = 0x1c,
|
||||
};
|
||||
U_BOOT_DEVICE(sdmmc_regulator) = {
|
||||
.name = "regulator_fixed",
|
||||
.platdata = &dtv_sdmmc_regulator,
|
||||
.platdata_size = sizeof(dtv_sdmmc_regulator),
|
||||
};
|
||||
|
||||
static const struct dtd_rockchip_rk3328_dmc dtv_dmc = {
|
||||
.reg = {0xff400000, 0x1000, 0xff780000, 0x3000, 0xff100000, 0x1000, 0xff440000, 0x1000,
|
||||
0xff720000, 0x1000, 0xff798000, 0x1000},
|
||||
.rockchip_sdram_params = {0x1, 0xa, 0x2, 0x1, 0x0, 0x0, 0x11, 0x0,
|
||||
0x11, 0x0, 0x0, 0x94291288, 0x0, 0x27, 0x462, 0x15,
|
||||
0x242, 0xff, 0x14d, 0x0, 0x1, 0x0, 0x0, 0x0,
|
||||
0x43049010, 0x64, 0x28003b, 0xd0, 0x20053, 0xd4, 0x220000, 0xd8,
|
||||
0x100, 0xdc, 0x40000, 0xe0, 0x0, 0xe4, 0x110000, 0xe8,
|
||||
0x420, 0xec, 0x400, 0xf4, 0xf011f, 0x100, 0x9060b06, 0x104,
|
||||
0x20209, 0x108, 0x505040a, 0x10c, 0x40400c, 0x110, 0x5030206, 0x114,
|
||||
0x3030202, 0x120, 0x3030b03, 0x124, 0x20208, 0x180, 0x1000040, 0x184,
|
||||
0x0, 0x190, 0x7030003, 0x198, 0x5001100, 0x1a0, 0xc0400003, 0x240,
|
||||
0x6000604, 0x244, 0x201, 0x250, 0xf00, 0x490, 0x1, 0xffffffff,
|
||||
0xffffffff, 0xffffffff, 0xffffffff, 0x4, 0xc, 0x28, 0xa, 0x2c,
|
||||
0x0, 0x30, 0x9, 0xffffffff, 0xffffffff, 0x77, 0x88, 0x79,
|
||||
0x79, 0x87, 0x97, 0x87, 0x78, 0x77, 0x78, 0x87,
|
||||
0x88, 0x87, 0x87, 0x77, 0x78, 0x78, 0x78, 0x78,
|
||||
0x78, 0x78, 0x78, 0x78, 0x78, 0x69, 0x9, 0x77,
|
||||
0x78, 0x77, 0x78, 0x77, 0x78, 0x77, 0x78, 0x77,
|
||||
0x79, 0x9, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78,
|
||||
0x78, 0x78, 0x78, 0x69, 0x9, 0x77, 0x78, 0x77,
|
||||
0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x79, 0x9,
|
||||
0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78,
|
||||
0x78, 0x69, 0x9, 0x77, 0x78, 0x77, 0x78, 0x77,
|
||||
0x78, 0x77, 0x78, 0x77, 0x79, 0x9, 0x78, 0x78,
|
||||
0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x69,
|
||||
0x9, 0x77, 0x78, 0x77, 0x77, 0x77, 0x77, 0x77,
|
||||
0x77, 0x77, 0x79, 0x9},
|
||||
};
|
||||
U_BOOT_DEVICE(dmc) = {
|
||||
.name = "rockchip_rk3328_dmc",
|
||||
.platdata = &dtv_dmc,
|
||||
.platdata_size = sizeof(dtv_dmc),
|
||||
};
|
||||
|
||||
@ -0,0 +1,71 @@
|
||||
/*
|
||||
* DO NOT MODIFY
|
||||
*
|
||||
* This file was generated by dtoc from a .dtb (device tree binary) file.
|
||||
*/
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <linux/libfdt.h>
|
||||
struct dtd_regulator_fixed {
|
||||
fdt32_t gpio[3];
|
||||
fdt32_t pinctrl_0;
|
||||
const char * pinctrl_names;
|
||||
fdt32_t regulator_max_microvolt;
|
||||
fdt32_t regulator_min_microvolt;
|
||||
const char * regulator_name;
|
||||
fdt32_t vin_supply;
|
||||
};
|
||||
struct dtd_rockchip_gpio_bank {
|
||||
struct phandle_1_arg clocks[1];
|
||||
bool gpio_controller;
|
||||
bool interrupt_controller;
|
||||
fdt32_t interrupts[3];
|
||||
fdt64_t reg[2];
|
||||
};
|
||||
struct dtd_rockchip_rk3328_cru {
|
||||
fdt64_t reg[2];
|
||||
fdt32_t rockchip_grf;
|
||||
};
|
||||
struct dtd_rockchip_rk3328_dmc {
|
||||
fdt64_t reg[12];
|
||||
fdt32_t rockchip_sdram_params[196];
|
||||
};
|
||||
struct dtd_rockchip_rk3328_dw_mshc {
|
||||
fdt32_t bus_width;
|
||||
bool cap_mmc_highspeed;
|
||||
bool cap_sd_highspeed;
|
||||
struct phandle_1_arg clocks[4];
|
||||
bool disable_wp;
|
||||
fdt32_t fifo_depth;
|
||||
fdt32_t interrupts[3];
|
||||
fdt32_t max_frequency;
|
||||
fdt32_t pinctrl_0[4];
|
||||
const char * pinctrl_names;
|
||||
fdt64_t reg[2];
|
||||
bool u_boot_spl_fifo_mode;
|
||||
fdt32_t vmmc_supply;
|
||||
};
|
||||
struct dtd_rockchip_rk3328_grf {
|
||||
fdt64_t reg[2];
|
||||
};
|
||||
struct dtd_rockchip_rk3328_pinctrl {
|
||||
bool ranges;
|
||||
fdt32_t rockchip_grf;
|
||||
};
|
||||
struct dtd_rockchip_rk3328_uart {
|
||||
fdt32_t clock_frequency;
|
||||
struct phandle_1_arg clocks[2];
|
||||
const char * dma_names[2];
|
||||
fdt32_t dmas[4];
|
||||
fdt32_t interrupts[3];
|
||||
fdt32_t pinctrl_0;
|
||||
const char * pinctrl_names;
|
||||
fdt64_t reg[2];
|
||||
fdt32_t reg_io_width;
|
||||
fdt32_t reg_shift;
|
||||
};
|
||||
#define dtd_syscon dtd_rockchip_rk3328_cru
|
||||
#define dtd_simple_mfd dtd_rockchip_rk3328_grf
|
||||
#define dtd_snps_dw_apb_uart dtd_rockchip_rk3328_uart
|
||||
#define dtd_rockchip_cru dtd_rockchip_rk3328_cru
|
||||
#define dtd_rockchip_rk3288_dw_mshc dtd_rockchip_rk3328_dw_mshc
|
||||
20
target/linux/rockchip/armv8/base-files/etc/board.d/01_leds
Executable file
20
target/linux/rockchip/armv8/base-files/etc/board.d/01_leds
Executable file
@ -0,0 +1,20 @@
|
||||
#!/bin/sh
|
||||
|
||||
. /lib/functions/leds.sh
|
||||
. /lib/functions/uci-defaults.sh
|
||||
|
||||
board=$(board_name)
|
||||
boardname="${board##*,}"
|
||||
|
||||
board_config_update
|
||||
|
||||
case $board in
|
||||
friendlyarm,nanopi-r2s)
|
||||
ucidef_set_led_netdev "wan" "WAN" "$boardname:green:wan" "eth0"
|
||||
ucidef_set_led_netdev "lan" "LAN" "$boardname:green:lan" "eth1"
|
||||
;;
|
||||
esac
|
||||
|
||||
board_config_flush
|
||||
|
||||
exit 0
|
||||
@ -1,15 +1,45 @@
|
||||
#!/bin/sh
|
||||
|
||||
. /lib/functions/uci-defaults.sh
|
||||
. /lib/functions/system.sh
|
||||
|
||||
rockchip_setup_interfaces()
|
||||
{
|
||||
local board="$1"
|
||||
|
||||
case "$board" in
|
||||
friendlyarm,nanopi-r2s)
|
||||
ucidef_set_interfaces_lan_wan 'eth1' 'eth0'
|
||||
;;
|
||||
*)
|
||||
ucidef_set_interface_lan 'eth0'
|
||||
;;
|
||||
esac
|
||||
}
|
||||
|
||||
rockchip_setup_macs()
|
||||
{
|
||||
local board="$1"
|
||||
local lan_mac=""
|
||||
local wan_mac=""
|
||||
local label_mac=""
|
||||
|
||||
case "$board" in
|
||||
friendlyarm,nanopi-r2s)
|
||||
wan_mac=$(macaddr_random)
|
||||
lan_mac=$(macaddr_add "$wan_mac" +1)
|
||||
;;
|
||||
esac
|
||||
|
||||
[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac
|
||||
[ -n "$wan_mac" ] && ucidef_set_interface_macaddr "wan" $wan_mac
|
||||
[ -n "$label_mac" ] && ucidef_set_label_macaddr $label_mac
|
||||
}
|
||||
|
||||
board_config_update
|
||||
|
||||
case "$(board_name)" in
|
||||
*)
|
||||
ucidef_set_interface_lan 'eth0'
|
||||
;;
|
||||
esac
|
||||
|
||||
board=$(board_name)
|
||||
rockchip_setup_interfaces $board
|
||||
rockchip_setup_macs $board
|
||||
board_config_flush
|
||||
|
||||
exit 0
|
||||
|
||||
@ -482,6 +482,7 @@ CONFIG_UNINLINE_SPIN_UNLOCK=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_COMMON=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_DWC3_DUAL_ROLE=y
|
||||
CONFIG_USB_DWC3_HOST=y
|
||||
CONFIG_USB_DWC3_OF_SIMPLE=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
|
||||
@ -24,7 +24,7 @@ endef
|
||||
|
||||
define Build/boot-script
|
||||
# Make an U-boot image and copy it to the boot partition
|
||||
mkimage -A arm -O linux -T script -C none -a 0 -e 0 -d mmc.bootscript $@.boot/boot.scr
|
||||
mkimage -A arm -O linux -T script -C none -a 0 -e 0 -d $(if $(1),$(1),mmc).bootscript $@.boot/boot.scr
|
||||
endef
|
||||
|
||||
define Build/pine64-img
|
||||
|
||||
@ -4,6 +4,17 @@
|
||||
# This is free software, licensed under the GNU General Public License v2.
|
||||
# See /LICENSE for more information.
|
||||
#
|
||||
|
||||
define Device/friendlyarm_nanopi-r2s
|
||||
DEVICE_VENDOR := FriendlyARM
|
||||
DEVICE_MODEL := NanoPi R2S
|
||||
SOC := rk3328
|
||||
UBOOT_DEVICE_NAME := nanopi-r2s-rk3328
|
||||
IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r2s | pine64-img | gzip | append-metadata
|
||||
DEVICE_PACKAGES := kmod-usb-net kmod-usb-net-rtl8152
|
||||
endef
|
||||
TARGET_DEVICES += friendlyarm_nanopi-r2s
|
||||
|
||||
define Device/pine64_rockpro64
|
||||
DEVICE_VENDOR := Pine64
|
||||
DEVICE_MODEL := RockPro64
|
||||
|
||||
8
target/linux/rockchip/image/nanopi-r2s.bootscript
Normal file
8
target/linux/rockchip/image/nanopi-r2s.bootscript
Normal file
@ -0,0 +1,8 @@
|
||||
part uuid mmc ${devnum}:2 uuid
|
||||
|
||||
setenv bootargs "console=ttyS2,1500000 earlycon=uart8250,mmio32,0xff130000 root=PARTUUID=${uuid} rw rootwait"
|
||||
|
||||
load mmc ${devnum}:1 ${fdt_addr_r} rockchip.dtb
|
||||
load mmc ${devnum}:1 ${kernel_addr_r} kernel.img
|
||||
|
||||
booti ${kernel_addr_r} - ${fdt_addr_r}
|
||||
@ -0,0 +1,335 @@
|
||||
From 7e772d77a4ac5174803c1524598c5eb677360aec Mon Sep 17 00:00:00 2001
|
||||
From: David Bauer <mail@david-bauer.net>
|
||||
Date: Fri, 10 Jul 2020 15:57:46 +0200
|
||||
Subject: [PATCH] rockchip: rk3328: Add support for FriendlyARM NanoPi R2S
|
||||
|
||||
This adds support for the NanoPi R2S from FriendlyArm.
|
||||
|
||||
Rockchip RK3328 SoC
|
||||
1GB DDR4 RAM
|
||||
Gigabit Ethernet (WAN)
|
||||
Gigabit Ethernet (USB3) (LAN)
|
||||
USB 2.0 Host Port
|
||||
MicroSD slot
|
||||
Reset button
|
||||
WAN - LAN - SYS LED
|
||||
|
||||
Signed-off-by: David Bauer <mail@david-bauer.net>
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/Makefile | 1 +
|
||||
.../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 299 ++++++++++++++++++
|
||||
2 files changed, 300 insertions(+)
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
@@ -1,6 +1,7 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
|
||||
@@ -0,0 +1,299 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include <dt-bindings/input/input.h>
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
+#include "rk3328.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "FriendlyARM NanoPi R2S";
|
||||
+ compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = "serial2:1500000n8";
|
||||
+ };
|
||||
+
|
||||
+ gmac_clkin: external-gmac-clock {
|
||||
+ compatible = "fixed-clock";
|
||||
+ clock-frequency = <125000000>;
|
||||
+ clock-output-names = "gmac_clkin";
|
||||
+ #clock-cells = <0>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_sd: sdmmc-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc0m1_gpio>;
|
||||
+ regulator-name = "vcc_sd";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ vin-supply = <&vcc_io>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_sys: vcc-sys {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc_sys";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&led_pins>;
|
||||
+
|
||||
+ sys {
|
||||
+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||
+ label = "nanopi-r2s:red:sys";
|
||||
+ };
|
||||
+
|
||||
+ lan {
|
||||
+ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
|
||||
+ label = "nanopi-r2s:green:lan";
|
||||
+ };
|
||||
+
|
||||
+ wan {
|
||||
+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
|
||||
+ label = "nanopi-r2s:green:wan";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ gpio_keys {
|
||||
+ compatible = "gpio-keys-polled";
|
||||
+ poll-interval = <100>;
|
||||
+
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&button_pins>;
|
||||
+
|
||||
+ reset {
|
||||
+ label = "Reset Button";
|
||||
+ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
|
||||
+ linux,code = <KEY_RESTART>;
|
||||
+ debounce-interval = <50>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&cpu0 {
|
||||
+ cpu-supply = <&vdd_arm>;
|
||||
+};
|
||||
+
|
||||
+&cpu1 {
|
||||
+ cpu-supply = <&vdd_arm>;
|
||||
+};
|
||||
+
|
||||
+&cpu2 {
|
||||
+ cpu-supply = <&vdd_arm>;
|
||||
+};
|
||||
+
|
||||
+&cpu3 {
|
||||
+ cpu-supply = <&vdd_arm>;
|
||||
+};
|
||||
+
|
||||
+&gmac2io {
|
||||
+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
|
||||
+ assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
|
||||
+ clock_in_out = "input";
|
||||
+ phy-supply = <&vcc_io>;
|
||||
+ phy-mode = "rgmii";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&rgmiim1_pins>;
|
||||
+ snps,force_thresh_dma_mode;
|
||||
+ snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
|
||||
+ snps,reset-active-low;
|
||||
+ snps,reset-delays-us = <0 10000 50000>;
|
||||
+ tx_delay = <0x24>;
|
||||
+ rx_delay = <0x18>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c1 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ rk805: rk805@18 {
|
||||
+ compatible = "rockchip,rk805";
|
||||
+ reg = <0x18>;
|
||||
+ interrupt-parent = <&gpio2>;
|
||||
+ interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ #clock-cells = <1>;
|
||||
+ clock-output-names = "xin32k", "rk805-clkout2";
|
||||
+ gpio-controller;
|
||||
+ #gpio-cells = <2>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pmic_int_l>;
|
||||
+ rockchip,system-power-controller;
|
||||
+ wakeup-source;
|
||||
+
|
||||
+ vcc1-supply = <&vcc_sys>;
|
||||
+ vcc2-supply = <&vcc_sys>;
|
||||
+ vcc3-supply = <&vcc_sys>;
|
||||
+ vcc4-supply = <&vcc_sys>;
|
||||
+ vcc5-supply = <&vcc_io>;
|
||||
+ vcc6-supply = <&vcc_sys>;
|
||||
+
|
||||
+ regulators {
|
||||
+ vdd_logic: DCDC_REG1 {
|
||||
+ regulator-name = "vdd_logic";
|
||||
+ regulator-min-microvolt = <712500>;
|
||||
+ regulator-max-microvolt = <1450000>;
|
||||
+ regulator-ramp-delay = <12500>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1000000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_arm: DCDC_REG2 {
|
||||
+ regulator-name = "vdd_arm";
|
||||
+ regulator-min-microvolt = <712500>;
|
||||
+ regulator-max-microvolt = <1450000>;
|
||||
+ regulator-ramp-delay = <12500>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <950000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_ddr: DCDC_REG3 {
|
||||
+ regulator-name = "vcc_ddr";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_io: DCDC_REG4 {
|
||||
+ regulator-name = "vcc_io";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <3300000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_18: LDO_REG1 {
|
||||
+ regulator-name = "vcc_18";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc18_emmc: LDO_REG2 {
|
||||
+ regulator-name = "vcc18_emmc";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_10: LDO_REG3 {
|
||||
+ regulator-name = "vdd_10";
|
||||
+ regulator-min-microvolt = <1000000>;
|
||||
+ regulator-max-microvolt = <1000000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1000000>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&io_domains {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ vccio1-supply = <&vcc_io>;
|
||||
+ vccio2-supply = <&vcc18_emmc>;
|
||||
+ vccio3-supply = <&vcc_io>;
|
||||
+ vccio4-supply = <&vcc_18>;
|
||||
+ vccio5-supply = <&vcc_io>;
|
||||
+ vccio6-supply = <&vcc_io>;
|
||||
+ pmuio-supply = <&vcc_io>;
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ leds {
|
||||
+ led_pins: led_pins {
|
||||
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>,
|
||||
+ <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
|
||||
+ <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ button {
|
||||
+ button_pins: button_pins {
|
||||
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pmic {
|
||||
+ pmic_int_l: pmic-int-l {
|
||||
+ rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&sdmmc {
|
||||
+ bus-width = <4>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ cap-sd-highspeed;
|
||||
+ disable-wp;
|
||||
+ max-frequency = <150000000>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
|
||||
+ vmmc-supply = <&vcc_sd>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tsadc {
|
||||
+ rockchip,hw-tshut-mode = <0>;
|
||||
+ rockchip,hw-tshut-polarity = <0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u2phy {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ u2phy_host: host-port {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ehci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ohci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
@ -0,0 +1,40 @@
|
||||
From 6731d2c9039fbe1ecf21915eab3acee0a999508a Mon Sep 17 00:00:00 2001
|
||||
From: David Bauer <mail@david-bauer.net>
|
||||
Date: Fri, 10 Jul 2020 21:38:20 +0200
|
||||
Subject: [PATCH] rockchip: use system LED for OpenWrt
|
||||
|
||||
Use the SYS LED on the casing for showing system status.
|
||||
|
||||
This patch is kept seperate from the NanoPi R2S support patch, as i plan
|
||||
on submitting the device support upstream.
|
||||
|
||||
Signed-off-by: David Bauer <mail@david-bauer.net>
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts | 9 ++++++++-
|
||||
1 file changed, 8 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
|
||||
@@ -17,6 +17,13 @@
|
||||
stdout-path = "serial2:1500000n8";
|
||||
};
|
||||
|
||||
+ aliases {
|
||||
+ led-boot = &led_sys;
|
||||
+ led-failsafe = &led_sys;
|
||||
+ led-running = &led_sys;
|
||||
+ led-upgrade = &led_sys;
|
||||
+ };
|
||||
+
|
||||
gmac_clkin: external-gmac-clock {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <125000000>;
|
||||
@@ -50,7 +57,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&led_pins>;
|
||||
|
||||
- sys {
|
||||
+ led_sys: sys {
|
||||
gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||
label = "nanopi-r2s:red:sys";
|
||||
};
|
||||
@ -0,0 +1,62 @@
|
||||
From: William Wu <william.wu@rock-chips.com>
|
||||
|
||||
RK3328 has one USB 3.0 OTG controller which uses DWC_USB3
|
||||
core's general architecture. It can act as static xHCI host
|
||||
controller, static device controller, USB 3.0/2.0 OTG basing
|
||||
on ID of USB3.0 PHY.
|
||||
|
||||
Signed-off-by: William Wu <william.wu@rock-chips.com>
|
||||
Signed-off-by: Leonidas P. Papadakos <papadakospan@gmail.com>
|
||||
|
||||
---
|
||||
|
||||
NOTE: This binding still has issues. From the original thread:
|
||||
|
||||
the rk3328 usb3-phy has an issue with detecting any plugin events
|
||||
after a previous device got removed - see the inno-usb3-phy driver
|
||||
in the vendor kernel.
|
||||
|
||||
The current state is good-enough for enabling the USB3 attached LAN
|
||||
port of the NanoPi R2S. However, it might explode depending on your
|
||||
use-case. You've been warned.
|
||||
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 27 ++++++++++++++++++++++++
|
||||
1 file changed, 27 insertions(+)
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
|
||||
@@ -936,6 +936,33 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
+ usbdrd3: usb@ff600000 {
|
||||
+ compatible = "rockchip,rk3328-dwc3", "rockchip,rk3399-dwc3";
|
||||
+ clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>,
|
||||
+ <&cru ACLK_USB3OTG>;
|
||||
+ clock-names = "ref_clk", "suspend_clk",
|
||||
+ "bus_clk";
|
||||
+ #address-cells = <2>;
|
||||
+ #size-cells = <2>;
|
||||
+ ranges;
|
||||
+ status = "disabled";
|
||||
+
|
||||
+ usbdrd_dwc3: dwc3@ff600000 {
|
||||
+ compatible = "snps,dwc3";
|
||||
+ reg = <0x0 0xff600000 0x0 0x100000>;
|
||||
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ dr_mode = "otg";
|
||||
+ phy_type = "utmi_wide";
|
||||
+ snps,dis_enblslpm_quirk;
|
||||
+ snps,dis-u2-freeclk-exists-quirk;
|
||||
+ snps,dis_u2_susphy_quirk;
|
||||
+ snps,dis_u3_susphy_quirk;
|
||||
+ snps,dis-del-phy-power-chg-quirk;
|
||||
+ snps,dis-tx-ipgap-linecheck-quirk;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
gic: interrupt-controller@ff811000 {
|
||||
compatible = "arm,gic-400";
|
||||
#interrupt-cells = <3>;
|
||||
@ -0,0 +1,60 @@
|
||||
From 6636512096c0749514b27d492db71858150b6e9c Mon Sep 17 00:00:00 2001
|
||||
From: David Bauer <mail@david-bauer.net>
|
||||
Date: Fri, 10 Jul 2020 21:12:16 +0200
|
||||
Subject: [PATCH] rockchip: enable LAN port on NanoPi R2S
|
||||
|
||||
Enable the USB3 port on the FriendlyARM NanoPi R2S.
|
||||
This is required for the USB3 attached LAN port to work.
|
||||
|
||||
Signed-off-by: David Bauer <mail@david-bauer.net>
|
||||
---
|
||||
.../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 27 +++++++++++++++++++
|
||||
1 file changed, 27 insertions(+)
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
|
||||
@@ -51,6 +51,18 @@
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
+ vcc_rtl8153: vcc-rtl8153-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&rtl8153_en_drv>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-name = "vcc_rtl8153";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ enable-active-high;
|
||||
+ };
|
||||
+
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
@@ -265,6 +277,12 @@
|
||||
rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
+
|
||||
+ usb {
|
||||
+ rtl8153_en_drv: rtl8153-en-drv {
|
||||
+ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
};
|
||||
|
||||
&sdmmc {
|
||||
@@ -304,3 +322,12 @@
|
||||
&usb_host0_ohci {
|
||||
status = "okay";
|
||||
};
|
||||
+
|
||||
+&usbdrd3 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbdrd_dwc3 {
|
||||
+ dr_mode = "host";
|
||||
+ status = "okay";
|
||||
+};
|
||||
Loading…
x
Reference in New Issue
Block a user