Merge Official Source

This commit is contained in:
CN_SZTL 2020-09-06 13:08:42 +08:00
commit 7ab8ca12df
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
20 changed files with 330 additions and 39 deletions

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@ -181,7 +181,7 @@ $$(call addfield,Depends,$$(Package/$(1)/DEPENDS)
)$$(call addfield,LicenseFiles,$(LICENSE_FILES)
)$$(call addfield,Section,$(SECTION)
)$$(call addfield,Require-User,$(USERID)
)$$(call addfield,SourceDateEpoch,$(shell $(TOPDIR)/scripts/get_source_date_epoch.sh $(SOURCE))
)$$(call addfield,SourceDateEpoch,$(PKG_SOURCE_DATE_EPOCH)
)$(if $(PKG_CPE_ID),CPE-ID: $(PKG_CPE_ID)
)$(if $(filter hold,$(PKG_FLAGS)),Status: unknown hold not-installed
)$(if $(filter essential,$(PKG_FLAGS)),Essential: yes
@ -193,7 +193,7 @@ $(_endef)
$$(IPKG_$(1)) : export CONTROL=$$(Package/$(1)/CONTROL)
$$(IPKG_$(1)) : export DESCRIPTION=$$(Package/$(1)/description)
$$(IPKG_$(1)) : export PATH=$$(TARGET_PATH_PKG)
$$(IPKG_$(1)) : export PKG_SOURCE_DATE_EPOCH=$(shell $(TOPDIR)/scripts/get_source_date_epoch.sh $(SOURCE))
$$(IPKG_$(1)) : export PKG_SOURCE_DATE_EPOCH:=$(PKG_SOURCE_DATE_EPOCH)
$(PKG_INFO_DIR)/$(1).provides $$(IPKG_$(1)): $(STAMP_BUILT) $(INCLUDE_DIR)/package-ipkg.mk
@rm -rf $$(IDIR_$(1)); \
$$(call remove_ipkg_files,$(1),$$(call opkg_package_files,$(call gen_ipkg_wildcard,$(1))))

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@ -19,6 +19,8 @@ PKG_IREMAP ?= 1
MAKE_J:=$(if $(MAKE_JOBSERVER),$(MAKE_JOBSERVER) $(if $(filter 3.% 4.0 4.1,$(MAKE_VERSION)),-j))
PKG_SOURCE_DATE_EPOCH:=$(if $(DUMP),,$(shell $(TOPDIR)/scripts/get_source_date_epoch.sh $(CURDIR)))
ifeq ($(strip $(PKG_BUILD_PARALLEL)),0)
PKG_JOBS?=-j1
else

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@ -12,7 +12,7 @@ include $(INCLUDE_DIR)/version.mk
include $(INCLUDE_DIR)/feeds.mk
PKG_NAME:=base-files
PKG_RELEASE:=227
PKG_RELEASE:=228
PKG_FLAGS:=nonshared
PKG_FILE_DEPENDS:=$(PLATFORM_DIR)/ $(GENERIC_PLATFORM_DIR)/base-files/

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@ -18,7 +18,8 @@ get_dt_led() {
[ -n "$ledpath" ] && \
label=$(cat "$ledpath/label" 2>/dev/null) || \
label=$(cat "$ledpath/chan-name" 2>/dev/null)
label=$(cat "$ledpath/chan-name" 2>/dev/null) || \
label=$(basename "$ledpath")
echo "$label"
}

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@ -121,8 +121,8 @@ mac80211_hostapd_setup_base() {
ieee80211n=1
ht_capab=
case "$htmode" in
VHT20|HT20) ;;
HT40*|VHT40|VHT80|VHT160)
VHT20|HT20|HE20) ;;
HT40*|VHT40|VHT80|VHT160|HE40|HE80|HE160)
case "$hwmode" in
a)
case "$(( ($channel / 4) % 2 ))" in
@ -192,19 +192,21 @@ mac80211_hostapd_setup_base() {
# 802.11ac
enable_ac=0
vht_oper_chwidth=0
vht_center_seg0=
idx="$channel"
case "$htmode" in
VHT20) enable_ac=1;;
VHT40)
VHT20|HE20) enable_ac=1;;
VHT40|HE40)
case "$(( ($channel / 4) % 2 ))" in
1) idx=$(($channel + 2));;
0) idx=$(($channel - 2));;
esac
enable_ac=1
append base_cfg "vht_oper_chwidth=0" "$N"
append base_cfg "vht_oper_centr_freq_seg0_idx=$idx" "$N"
vht_center_seg0=$idx
;;
VHT80)
VHT80|HE80)
case "$(( ($channel / 4) % 4 ))" in
1) idx=$(($channel + 6));;
2) idx=$(($channel + 2));;
@ -212,19 +214,20 @@ mac80211_hostapd_setup_base() {
0) idx=$(($channel - 6));;
esac
enable_ac=1
append base_cfg "vht_oper_chwidth=1" "$N"
append base_cfg "vht_oper_centr_freq_seg0_idx=$idx" "$N"
vht_oper_chwidth=1
vht_center_seg0=$idx
;;
VHT160)
VHT160|HE160)
case "$channel" in
36|40|44|48|52|56|60|64) idx=50;;
100|104|108|112|116|120|124|128) idx=114;;
esac
enable_ac=1
append base_cfg "vht_oper_chwidth=2" "$N"
append base_cfg "vht_oper_centr_freq_seg0_idx=$idx" "$N"
vht_oper_chwidth=2
vht_center_seg0=$idx
;;
esac
[ "$hwmode" = "a" ] || enable_ac=0
if [ "$enable_ac" != "0" -o "$vendor_vht" = "1" ]; then
json_get_vars \
@ -253,6 +256,9 @@ mac80211_hostapd_setup_base() {
vht_cap="$(($vht_cap | $cap))"
done
append base_cfg "vht_oper_chwidth=$vht_oper_chwidth" "$N"
append base_cfg "vht_oper_centr_freq_seg0_idx=$vht_center_seg0" "$N"
cap_rx_stbc=$((($vht_cap >> 8) & 7))
[ "$rx_stbc" -lt "$cap_rx_stbc" ] && cap_rx_stbc="$rx_stbc"
vht_cap="$(( ($vht_cap & ~(0x700)) | ($cap_rx_stbc << 8) ))"
@ -323,6 +329,25 @@ mac80211_hostapd_setup_base() {
[ -n "$vht_capab" ] && append base_cfg "vht_capab=$vht_capab" "$N"
fi
# 802.11ax
enable_ax=0
case "$htmode" in
HE*) enable_ax=1 ;;
esac
if [ "$enable_ax" != "0" ]; then
append base_cfg "ieee80211ax=1" "$N"
[ "$hwmode" = "a" ] && {
append base_cfg "he_oper_chwidth=$vht_oper_chwidth" "$N"
append base_cfg "he_oper_centr_freq_seg0_idx=$vht_center_seg0" "$N"
}
append base_cfg "he_default_pe_duration=4" "$N"
append base_cfg "he_rts_threshold=1023" "$N"
append base_cfg "he_su_beamformer=1" "$N"
append base_cfg "he_su_beamformee=1" "$N"
append base_cfg "he_mu_beamformer=1023" "$N"
fi
hostapd_prepare_device_config "$hostapd_conf_file" nl80211
cat >> "$hostapd_conf_file" <<EOF
${channel:+channel=$channel}

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@ -13,9 +13,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/firewall3.git
PKG_SOURCE_DATE:=2020-07-25
PKG_SOURCE_VERSION:=e9b90dfac2225927c035f6a76277b850c282dc9a
PKG_MIRROR_HASH:=917f662d48a766f86ee61a83e13a61688d6eca3647dd4aca1973b1fa1ea64fec
PKG_SOURCE_DATE:=2020-09-05
PKG_SOURCE_VERSION:=8c2f9fad9ca644af911e0d4113a890c3c84aa738
PKG_MIRROR_HASH:=424a7906ed8957de3e85046248608dec7146078946161a517f8a5af9f536bad1
PKG_MAINTAINER:=Jo-Philipp Wich <jo@mein.io>
PKG_LICENSE:=ISC

View File

@ -13,9 +13,9 @@ PKG_RELEASE:=5
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL:=https://github.com/paulusmack/ppp
PKG_SOURCE_DATE:=2020-08-07
PKG_SOURCE_VERSION:=045169401601639b9163e1df00f868a0a49131ce
PKG_MIRROR_HASH:=0ceb3e649d191c1fe225be580135aa181d9d3ba3689503691c4c9469ddac64a3
PKG_SOURCE_DATE:=2020-09-04
PKG_SOURCE_VERSION:=fc0a76c87a123e65b4922008257f5878251f9323
PKG_MIRROR_HASH:=c3ad8dc7922f628b4b33405e60b4add4d7c8b76ca6086a1782774c96da9eecba
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
PKG_LICENSE:=BSD-4-Clause
PKG_CPE_ID:=cpe:/a:samba:ppp

View File

@ -212,6 +212,7 @@
/* Atheros AR9380 2.4GHz */
compatible = "pci168c,0030";
reg = <0x00430000 0 0 0 0>;
interrupts = <3>; /* INTC 4.1.1 */
};
};
@ -226,6 +227,7 @@
/* Atheros AR9380 5GHz */
compatible = "pci168c,0030";
reg = <0x00440000 0 0 0 0>;
interrupts = <4>; /* INTD 4.1.1 */
};
};
};

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@ -189,6 +189,7 @@
/* Atheros AR9380 2.4/5GHz */
compatible = "pci168c,0030";
reg = <0x00410000 0 0 0 0>;
interrupts = <1>; /* INTA */
};
};
};

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@ -38,6 +38,7 @@
/* Atheros AR9380 5GHz */
compatible = "pci168c,0030";
reg = <0x00410000 0 0 0 0>;
interrupts = <1>; /* INTA */
};
};
};

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@ -65,6 +65,7 @@
/* Atheros AR9380 2.4/5GHz */
compatible = "pci168c,0030";
reg = <0x00430000 0 0 0 0>;
interrupts = <3>; /* INTC */
};
};
@ -79,6 +80,7 @@
/* Atheros AR9380 2.4/5GHz */
compatible = "pci168c,0030";
reg = <0x00440000 0 0 0 0>;
interrupts = <4>; /* INTD */
};
};
};

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@ -454,6 +454,7 @@
/* Atheros AR9380 5GHz */
compatible = "pci168c,0030";
reg = <0x00430000 0 0 0 0>;
interrupts = <3>; /* INTC */
qca,no-eeprom;
/* wifi CAL & MAC is stored in nvram */
@ -476,6 +477,7 @@
/* Atheros AR9381 2.4GHz */
compatible = "pci168c,0033";
reg = <0x00440000 0 0 0 0>;
interrupts = <4>; /* INTD */
qca,no-eeprom;
/* wifi CAL & MAC is stored in nvram */
};
@ -492,6 +494,7 @@
/* Renesas uPD720202 */
compatible = "pci1912,0015";
reg = <0x00450000 0 0 0 0>;
interrupts = <1>; /* INTA */
#address-cells = <1>;
#size-cells = <0>;

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@ -0,0 +1,35 @@
From: Felix Fietkau <nbd@nbd.name>
Date: Fri, 4 Sep 2020 18:14:05 +0200
Subject: [PATCH] net: ethernet: mtk_eth_soc: avoid rearming interrupt if
napi_complete returns false
Reduces unnecessary interrupts
Signed-off-by: Felix Fietkau <nbd@nbd.name>
---
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -1512,8 +1512,8 @@ static int mtk_napi_tx(struct napi_struc
if (status & MTK_TX_DONE_INT)
return budget;
- napi_complete(napi);
- mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
+ if (napi_complete(napi))
+ mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
return tx_done;
}
@@ -1546,8 +1546,9 @@ poll_again:
remain_budget -= rx_done;
goto poll_again;
}
- napi_complete(napi);
- mtk_rx_irq_enable(eth, MTK_RX_DONE_INT);
+
+ if (napi_complete(napi))
+ mtk_rx_irq_enable(eth, MTK_RX_DONE_INT);
return rx_done + budget - remain_budget;
}

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@ -1,5 +0,0 @@
uci -q get network.globals.packet_steering >/dev/null || {
uci set network.globals='globals'
uci set network.globals.packet_steering=1
uci commit network
}

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@ -228,6 +228,7 @@ CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DEBUG_MISC=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_DIMLIB=y
CONFIG_DMADEVICES=y
CONFIG_DMATEST=y
CONFIG_DMA_DIRECT_REMAP=y
@ -345,7 +346,6 @@ CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_UID16=y
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
CONFIG_HOLES_IN_ZONE=y
# CONFIG_HW_NAT is not set
CONFIG_HZ=250
CONFIG_HZ_250=y
CONFIG_ICPLUS_PHY=y
@ -391,7 +391,6 @@ CONFIG_MAGIC_SYSRQ=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MEDIATEK_MT6577_AUXADC=y
# CONFIG_MEDIATEK_NETSYS_V2 is not set
CONFIG_MEDIATEK_WATCHDOG=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_MEMFD_CREATE=y
@ -436,6 +435,7 @@ CONFIG_NET_DSA=y
CONFIG_NET_DSA_MT7530=y
CONFIG_NET_DSA_TAG_MTK=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_MEDIATEK_OFFLOAD=y
CONFIG_NET_MEDIATEK_SOC=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NET_VENDOR_MEDIATEK=y
@ -459,8 +459,17 @@ CONFIG_OLD_SIGSUSPEND3=y
CONFIG_PADATA=y
CONFIG_PARTITION_PERCPU=y
CONFIG_PCI=y
CONFIG_PCIEAER=y
CONFIG_PCIEASPM=y
# CONFIG_PCIEASPM_DEBUG is not set
# CONFIG_PCIEASPM_DEFAULT is not set
CONFIG_PCIEASPM_PERFORMANCE=y
# CONFIG_PCIEASPM_POWERSAVE is not set
# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
CONFIG_PCIEPORTBUS=y
# CONFIG_PCIE_AL is not set
CONFIG_PCIE_MEDIATEK=y
CONFIG_PCIE_PME=y
CONFIG_PCI_DEBUG=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y

View File

@ -166,7 +166,7 @@
skip_rx:
ring->data[idx] = new_data;
@@ -2250,6 +2260,9 @@ static int mtk_open(struct net_device *d
@@ -2251,6 +2261,9 @@ static int mtk_open(struct net_device *d
mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
mtk_rx_irq_enable(eth, MTK_RX_DONE_INT);
refcount_set(&eth->dma_refcnt, 1);
@ -176,7 +176,7 @@
}
else
refcount_inc(&eth->dma_refcnt);
@@ -2311,6 +2324,9 @@ static int mtk_stop(struct net_device *d
@@ -2312,6 +2325,9 @@ static int mtk_stop(struct net_device *d
mtk_dma_free(eth);
@ -186,7 +186,7 @@
return 0;
}
@@ -2824,6 +2840,27 @@ static int mtk_set_rxnfc(struct net_devi
@@ -2825,6 +2841,27 @@ static int mtk_set_rxnfc(struct net_devi
return ret;
}
@ -214,7 +214,7 @@
static const struct ethtool_ops mtk_ethtool_ops = {
.get_link_ksettings = mtk_get_link_ksettings,
.set_link_ksettings = mtk_set_link_ksettings,
@@ -2855,6 +2892,9 @@ static const struct net_device_ops mtk_n
@@ -2856,6 +2893,9 @@ static const struct net_device_ops mtk_n
#ifdef CONFIG_NET_POLL_CONTROLLER
.ndo_poll_controller = mtk_poll_controller,
#endif
@ -224,7 +224,7 @@
};
static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
@@ -3197,6 +3237,7 @@ static const struct mtk_soc_data mt7622_
@@ -3198,6 +3238,7 @@ static const struct mtk_soc_data mt7622_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7622_CLKS_BITMAP,
.required_pctl = false,

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@ -1,6 +1,6 @@
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -2235,6 +2235,31 @@ static int mtk_start_dma(struct mtk_eth
@@ -2236,6 +2236,31 @@ static int mtk_start_dma(struct mtk_eth
return 0;
}
@ -32,7 +32,7 @@
static int mtk_open(struct net_device *dev)
{
struct mtk_mac *mac = netdev_priv(dev);
@@ -2255,6 +2280,8 @@ static int mtk_open(struct net_device *d
@@ -2256,6 +2281,8 @@ static int mtk_open(struct net_device *d
if (err)
return err;
@ -41,7 +41,7 @@
napi_enable(&eth->tx_napi);
napi_enable(&eth->rx_napi);
mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
@@ -2310,6 +2337,8 @@ static int mtk_stop(struct net_device *d
@@ -2311,6 +2338,8 @@ static int mtk_stop(struct net_device *d
if (!refcount_dec_and_test(&eth->dma_refcnt))
return 0;
@ -50,7 +50,7 @@
mtk_tx_irq_disable(eth, MTK_TX_DONE_INT);
mtk_rx_irq_disable(eth, MTK_RX_DONE_INT);
napi_disable(&eth->tx_napi);
@@ -2493,8 +2522,6 @@ static int mtk_hw_init(struct mtk_eth *e
@@ -2494,8 +2523,6 @@ static int mtk_hw_init(struct mtk_eth *e
/* disable delay and normal interrupt */
mtk_tx_irq_disable(eth, ~0);
mtk_rx_irq_disable(eth, ~0);
@ -59,7 +59,7 @@
/* FE int grouping */
mtk_w32(eth, MTK_TX_DONE_INT, MTK_PDMA_INT_GRP1);
@@ -2503,19 +2530,6 @@ static int mtk_hw_init(struct mtk_eth *e
@@ -2504,19 +2531,6 @@ static int mtk_hw_init(struct mtk_eth *e
mtk_w32(eth, MTK_RX_DONE_INT, MTK_QDMA_INT_GRP2);
mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);

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@ -0,0 +1,24 @@
From: Felix Fietkau <nbd@nbd.name>
Date: Fri, 4 Sep 2020 18:33:27 +0200
Subject: [PATCH] pcie-mediatek: fix clearing interrupt status
Clearing the status needs to happen after running the handler, otherwise
we will get an extra spurious interrupt after the cause has been cleared
Signed-off-by: Felix Fietkau <nbd@nbd.name>
---
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -616,10 +616,10 @@ static void mtk_pcie_intr_handler(struct
if (status & INTX_MASK) {
for_each_set_bit_from(bit, &status, PCI_NUM_INTX + INTX_SHIFT) {
/* Clear the INTx */
- writel(1 << bit, port->base + PCIE_INT_STATUS);
virq = irq_find_mapping(port->irq_domain,
bit - INTX_SHIFT);
generic_handle_irq(virq);
+ writel(1 << bit, port->base + PCIE_INT_STATUS);
}
}

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@ -0,0 +1,83 @@
From: Felix Fietkau <nbd@nbd.name>
Date: Fri, 4 Sep 2020 18:36:06 +0200
Subject: [PATCH] net: ethernet: mtk_eth_soc: add support for coherent DMA
It improves performance by eliminating the need for a cache flush on rx and tx
Signed-off-by: Felix Fietkau <nbd@nbd.name>
---
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -357,7 +357,7 @@
};
cci_control2: slave-if@5000 {
- compatible = "arm,cci-400-ctrl-if";
+ compatible = "arm,cci-400-ctrl-if", "syscon";
interface-type = "ace";
reg = <0x5000 0x1000>;
};
@@ -965,6 +965,8 @@
power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>;
mediatek,ethsys = <&ethsys>;
mediatek,sgmiisys = <&sgmiisys>;
+ mediatek,cci-control = <&cci_control2>;
+ dma-coherent;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -9,6 +9,7 @@
#include <linux/of_device.h>
#include <linux/of_mdio.h>
#include <linux/of_net.h>
+#include <linux/of_address.h>
#include <linux/mfd/syscon.h>
#include <linux/regmap.h>
#include <linux/clk.h>
@@ -2472,6 +2473,12 @@ static int mtk_hw_init(struct mtk_eth *e
if (ret)
goto err_disable_pm;
+ if (of_dma_is_coherent(eth->dev->of_node)) {
+ u32 mask = ETHSYS_DMA_AG_MAP_PDMA | ETHSYS_DMA_AG_MAP_QDMA;
+
+ regmap_update_bits(eth->ethsys, ETHSYS_DMA_AG_MAP, mask, mask);
+ }
+
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
ret = device_reset(eth->dev);
if (ret) {
@@ -3074,6 +3081,16 @@ static int mtk_probe(struct platform_dev
}
}
+ if (of_dma_is_coherent(pdev->dev.of_node)) {
+ struct regmap *cci;
+
+ cci = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
+ "mediatek,cci-control");
+ /* enable CPU/bus coherency */
+ if (!IS_ERR(cci))
+ regmap_write(cci, 0, 3);
+ }
+
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SGMII)) {
eth->sgmii = devm_kzalloc(eth->dev, sizeof(*eth->sgmii),
GFP_KERNEL);
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -425,6 +425,11 @@
#define RSTCTRL_FE BIT(6)
#define RSTCTRL_PPE BIT(31)
+/* ethernet dma channel agent map */
+#define ETHSYS_DMA_AG_MAP 0x408
+#define ETHSYS_DMA_AG_MAP_PDMA BIT(0)
+#define ETHSYS_DMA_AG_MAP_QDMA BIT(1)
+
/* SGMII subsystem config registers */
/* Register to auto-negotiation restart */
#define SGMSYS_PCS_CONTROL_1 0x0

View File

@ -0,0 +1,108 @@
From: Felix Fietkau <nbd@nbd.name>
Date: Fri, 4 Sep 2020 18:42:42 +0200
Subject: [PATCH] pci: pcie-mediatek: add support for coherent DMA
It improves performance by eliminating the need for a cache flush for DMA on
attached devices
Signed-off-by: Felix Fietkau <nbd@nbd.name>
---
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -801,6 +801,8 @@
reg = <0 0x1a143000 0 0x1000>;
reg-names = "port0";
mediatek,pcie-cfg = <&pciecfg>;
+ mediatek,hifsys = <&hifsys>;
+ mediatek,cci-control = <&cci_control2>;
#address-cells = <3>;
#size-cells = <2>;
interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_LOW>;
@@ -818,6 +820,7 @@
bus-range = <0x00 0xff>;
ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x8000000>;
status = "disabled";
+ dma-coherent;
slot0: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
@@ -844,6 +847,8 @@
reg = <0 0x1a145000 0 0x1000>;
reg-names = "port1";
mediatek,pcie-cfg = <&pciecfg>;
+ mediatek,hifsys = <&hifsys>;
+ mediatek,cci-control = <&cci_control2>;
#address-cells = <3>;
#size-cells = <2>;
interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
@@ -862,6 +867,7 @@
bus-range = <0x00 0xff>;
ranges = <0x82000000 0 0x28000000 0x0 0x28000000 0 0x8000000>;
status = "disabled";
+ dma-coherent;
slot1: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
@@ -921,6 +927,11 @@
};
};
+ hifsys: syscon@1af00000 {
+ compatible = "mediatek,mt7622-hifsys", "syscon";
+ reg = <0 0x1af00000 0 0x70>;
+ };
+
ethsys: syscon@1b000000 {
compatible = "mediatek,mt7622-ethsys",
"syscon";
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -20,6 +20,7 @@
#include <linux/of_address.h>
#include <linux/of_pci.h>
#include <linux/of_platform.h>
+#include <linux/of_address.h>
#include <linux/pci.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
@@ -139,6 +140,11 @@
#define PCIE_LINK_STATUS_V2 0x804
#define PCIE_PORT_LINKUP_V2 BIT(10)
+/* DMA channel mapping */
+#define HIFSYS_DMA_AG_MAP 0x008
+#define HIFSYS_DMA_AG_MAP_PCIE0 BIT(0)
+#define HIFSYS_DMA_AG_MAP_PCIE1 BIT(1)
+
struct mtk_pcie_port;
/**
@@ -1068,6 +1074,27 @@ static int mtk_pcie_setup(struct mtk_pci
}
}
+ if (of_dma_is_coherent(node)) {
+ struct regmap *con;
+ u32 mask;
+
+ con = syscon_regmap_lookup_by_phandle(node,
+ "mediatek,cci-control");
+ /* enable CPU/bus coherency */
+ if (!IS_ERR(con))
+ regmap_write(con, 0, 3);
+
+ con = syscon_regmap_lookup_by_phandle(node,
+ "mediatek,hifsys");
+ if (IS_ERR(con)) {
+ dev_err(dev, "missing hifsys node\n");
+ return PTR_ERR(con);
+ }
+
+ mask = HIFSYS_DMA_AG_MAP_PCIE0 | HIFSYS_DMA_AG_MAP_PCIE1;
+ regmap_update_bits(con, HIFSYS_DMA_AG_MAP, mask, mask);
+ }
+
for_each_available_child_of_node(node, child) {
int slot;