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ar71xx: fix TL-MR3220-v2 switch port order

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Fix the switch port order for proper display on high
level interfaces.

Signed-off-by: Paul Wassi <p.wassi@gmx.at>
This commit is contained in:
Paul Wassi 2019-01-04 22:38:17 +01:00 committed by Christian Lamparter
parent 341311f319
commit 78277ec162
1 changed files with 1 additions and 1 deletions
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2
target/linux/ar71xx/base-files/etc/board.d/02_network
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@ -41,7 +41,6 @@ ar71xx_setup_interfaces()
tew-712br|\
tew-732br|\
tl-mr3220|\
tl-mr3220-v2|\
tl-mr3420|\
tl-wdr3320-v2|\
tl-wdr3500|\
@ -520,6 +519,7 @@ ar71xx_setup_interfaces()
ucidef_add_switch "switch0" \
"1:lan" "2:lan" "3:lan" "4:lan" "0:wan" "9@eth0"
;;
tl-mr3220-v2|\
tl-wr741nd-v4)
ucidef_set_interfaces_lan_wan "eth0.1" "eth1"
ucidef_add_switch "switch0" \