Merge branch 'openwrt-21.02' of https://github.com/immortalwrt/immortalwrt into openwrt-21.02

This commit is contained in:
hanwckf 2023-07-26 23:18:13 +08:00
commit 72e13d5f9a
52 changed files with 6268 additions and 32 deletions

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@ -1,2 +1,2 @@
LINUX_VERSION-5.4 = .248
LINUX_KERNEL_HASH-5.4.248 = 3abed132e76c6575733acba39eaa54f6d8f4b1dc951b0e601a33959743b13e35
LINUX_VERSION-5.4 = .250
LINUX_KERNEL_HASH-5.4.250 = 0f5b8876526062bf5e346f6b9dde88be873761ee33cf3b8a1586d7d109a091fb

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@ -17,7 +17,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
--- a/kernel/cgroup/cgroup.c
+++ b/kernel/cgroup/cgroup.c
@@ -5860,6 +5860,9 @@ int __init cgroup_init_early(void)
@@ -5874,6 +5874,9 @@ int __init cgroup_init_early(void)
return 0;
}
@ -27,7 +27,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
/**
* cgroup_init - cgroup initialization
*
@@ -5898,6 +5901,12 @@ int __init cgroup_init(void)
@@ -5912,6 +5915,12 @@ int __init cgroup_init(void)
mutex_unlock(&cgroup_mutex);
@ -40,7 +40,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
for_each_subsys(ss, ssid) {
if (ss->early_init) {
struct cgroup_subsys_state *css =
@@ -6307,6 +6316,10 @@ static int __init cgroup_disable(char *s
@@ -6321,6 +6330,10 @@ static int __init cgroup_disable(char *s
strcmp(token, ss->legacy_name))
continue;
@ -51,7 +51,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
static_branch_disable(cgroup_subsys_enabled_key[i]);
pr_info("Disabling %s control group subsystem\n",
ss->name);
@@ -6316,6 +6329,31 @@ static int __init cgroup_disable(char *s
@@ -6330,6 +6343,31 @@ static int __init cgroup_disable(char *s
}
__setup("cgroup_disable=", cgroup_disable);

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@ -0,0 +1,42 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Sun, 7 Nov 2021 14:20:40 +0100
Subject: [PATCH] net: bgmac: connect to PHY even if it is BGMAC_PHY_NOREGS
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Recent bgmac change was meant to just fix a race between "Generic PHY"
and "bcm53xx" drivers after -EPROBE_DEFER. It modified bgmac to use
phy_connect() only if there is a real PHY device connected.
That change broke bgmac on bcm47xx. bcma_phy_connect() now registers a
fixed PHY with the bgmac_phy_connect_direct(). That fails as another
fixed PHY (also using address 0) is already registered - by bcm47xx arch
code bcm47xx_register_bus_complete().
This change brings origial behaviour. It connects Ethernet interface
with pseudo-PHY (switch device) and adjusts Ethernet interface link to
match connected switch.
This fixes:
[ 2.548098] bgmac_bcma bcma0:1: Failed to register fixed PHY device
[ 2.554584] bgmac_bcma bcma0:1: Cannot connect to phy
Fixes: b5375509184d ("net: bgmac: improve handling PHY")
Link: https://lore.kernel.org/netdev/3639116e-9292-03ca-b9d9-d741118a4541@gmail.com/T/#u
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
drivers/net/ethernet/broadcom/bgmac-bcma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/ethernet/broadcom/bgmac-bcma.c
+++ b/drivers/net/ethernet/broadcom/bgmac-bcma.c
@@ -94,7 +94,7 @@ static int bcma_phy_connect(struct bgmac
return 0;
/* Connect to the PHY */
- if (bgmac->mii_bus && bgmac->phyaddr != BGMAC_PHY_NOREGS) {
+ if (bgmac->mii_bus) {
snprintf(bus_id, sizeof(bus_id), PHY_ID_FMT, bgmac->mii_bus->id,
bgmac->phyaddr);
phy_dev = phy_connect(bgmac->net_dev, bus_id, bgmac_adjust_link,

View File

@ -63,7 +63,7 @@ bcm53xx_setup_macs()
etXmacaddr=$(nvram get et2macaddr)
offset=1
;;
luxul,xwr-3100v1 | \
luxul,xwr-3100-v1 | \
luxul,xwr-3150-v1)
etXmacaddr=$(nvram get et0macaddr)
offset=5

View File

@ -39,18 +39,18 @@ platform_expected_image() {
"dlink,dir-885l") echo "seamaseal wrgac42_dlink.2015_dir885l"; return;;
"luxul,abr-4500-v1") echo "lxl ABR-4500"; return;;
"luxul,xap-810-v1") echo "lxl XAP-810"; return;;
"luxul,xap-1410v1") echo "lxl XAP-1410"; return;;
"luxul,xap-1410-v1") echo "lxl XAP-1410"; return;;
"luxul,xap-1440-v1") echo "lxl XAP-1440"; return;;
"luxul,xap-1510v1") echo "lxl XAP-1510"; return;;
"luxul,xap-1510-v1") echo "lxl XAP-1510"; return;;
"luxul,xap-1610-v1") echo "lxl XAP-1610"; return;;
"luxul,xbr-4500-v1") echo "lxl XBR-4500"; return;;
"luxul,xwc-1000") echo "lxl XWC-1000"; return;;
"luxul,xwc-2000-v1") echo "lxl XWC-2000"; return;;
"luxul,xwr-1200v1") echo "lxl XWR-1200"; return;;
"luxul,xwr-3100v1") echo "lxl XWR-3100"; return;;
"luxul,xwr-1200-v1") echo "lxl XWR-1200"; return;;
"luxul,xwr-3100-v1") echo "lxl XWR-3100"; return;;
"luxul,xwr-3150-v1") echo "lxl XWR-3150"; return;;
"netgear,r6250v1") echo "chk U12H245T00_NETGEAR"; return;;
"netgear,r6300v2") echo "chk U12H240T00_NETGEAR"; return;;
"netgear,r6250-v1") echo "chk U12H245T00_NETGEAR"; return;;
"netgear,r6300-v2") echo "chk U12H240T00_NETGEAR"; return;;
"netgear,r7000") echo "chk U12H270T00_NETGEAR"; return;;
"netgear,r7900") echo "chk U12H315T30_NETGEAR"; return;;
"netgear,r8000") echo "chk U12H315T00_NETGEAR"; return;;

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@ -0,0 +1,247 @@
From 935327a73553001f8d81375c76985d05f604507f Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@gmail.com>
Date: Sat, 18 Jun 2022 00:00:29 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Add DT for Meraki MR26
Meraki MR26 is an EOL wireless access point featuring a
PoE ethernet port and two dual-band 3x3 MIMO 802.11n
radios and 1x1 dual-band WIFI dedicated to scanning.
Thank you Amir for the unit and PSU.
Hardware info:
SOC : Broadcom BCM53015A1KFEBG (dual-core Cortex-A9 CPU at 800 MHz)
RAM : SK Hynix Inc. H5TQ1G63EFR, 1 GBit DDR3 SDRAM = 128 MiB
NAND : Spansion S34ML01G100TF100, 1 GBit SLC NAND Flash = 128 MiB
ETH : 1 GBit Ethernet Port - PoE (TPS23754 PoE Interface)
WIFI0 : Broadcom BCM43431KMLG, BCM43431 802.11 abgn (3x3:3)
WIFI1 : Broadcom BCM43431KMLG, BCM43431 802.11 abgn (3x3:3)
WIFI2 : Broadcom BCM43428 "Air Marshal" 802.11 abgn (1x1:1)
BUTTON: One reset key behind a small hole next to the Ethernet Port
LEDS : One amber (fault), one white (indicator) LED, separate RGB-LED
MISC : Atmel AT24C64 8KiB EEPROM i2c
: Ti INA219 26V, 12-bit, i2c output current/voltage/power monitor
SERIAL:
WARNING: The serial port needs a TTL/RS-232 3V3 level converter!
The Serial setting is 115200-8-N-1. The board has a populated
right angle 1x4 0.1" pinheader.
The pinout is: VCC (next to J3, has the pin 1 indicator), RX, TX, GND.
Odd stuff:
- uboot does not support lzma compression, but gzip'd uImage/DTB work.
- uboot claims to support FIT, but fails to pass the DTB to the kernel.
Appending the dtb after the kernel image works.
- RGB-controller is supported through an external userspace program.
- The ubi partition contains a "board-config" volume. It stores the
MAC Address (0x66 in binary) and Serial No. (0x7c alpha-numerical).
- SoC's temperature sensor always reports that it is on fire.
This causes the system to immediately shutdown! Looking at reported
"418 degree Celsius" suggests that this sensor is not working.
WIFI:
b43 is able to initialize all three WIFIs @ 802.11bg.
| b43-phy0: Broadcom 43431 WLAN found (core revision 29)
| bcma-pci-bridge 0000:01:00.0: bus1: Switched to core: 0x812
| b43-phy0: Found PHY: Analog 9, Type 7 (HT), Revision 1
| b43-phy0: Found Radio: Manuf 0x17F, ID 0x2059, Revision 0, Version 1
| b43-phy0 warning: 5 GHz band is unsupported on this PHY
| b43-phy1: Broadcom 43431 WLAN found (core revision 29)
| bcma-pci-bridge 0001:01:00.0: bus2: Switched to core: 0x812
| b43-phy1: Found PHY: Analog 9, Type 7 (HT), Revision 1
| b43-phy1: Found Radio: Manuf 0x17F, ID 0x2059, Revision 0, Version 1
| b43-phy1 warning: 5 GHz band is unsupported on this PHY
| b43-phy2: Broadcom 43228 WLAN found (core revision 30)
| bcma-pci-bridge 0002:01:00.0: bus3: Switched to core: 0x812
| b43-phy2: Found PHY: Analog 9, Type 4 (N), Revision 16
| b43-phy2: Found Radio: Manuf 0x17F, ID 0x2057, Revision 9, Version 1
| Broadcom 43xx driver loaded [ Features: NL ]
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/bcm53015-meraki-mr26.dts | 166 +++++++++++++++++++++
2 files changed, 167 insertions(+)
create mode 100644 arch/arm/boot/dts/bcm53015-meraki-mr26.dts
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -121,6 +121,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
bcm47094-luxul-xwr-3150-v1.dtb \
bcm47094-netgear-r8500.dtb \
bcm47094-phicomm-k3.dtb \
+ bcm53015-meraki-mr26.dtb \
bcm53016-meraki-mr32.dtb \
bcm94708.dtb \
bcm94709.dtb \
--- /dev/null
+++ b/arch/arm/boot/dts/bcm53015-meraki-mr26.dts
@@ -0,0 +1,166 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Broadcom BCM470X / BCM5301X ARM platform code.
+ * DTS for Meraki MR26 / Codename: Venom
+ *
+ * Copyright (C) 2022 Christian Lamparter <chunkeey@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "bcm4708.dtsi"
+#include "bcm5301x-nand-cs0-bch8.dtsi"
+#include <dt-bindings/leds/common.h>
+
+/ {
+ compatible = "meraki,mr26", "brcm,bcm53015", "brcm,bcm4708";
+ model = "Meraki MR26";
+
+ memory@0 {
+ reg = <0x00000000 0x08000000>;
+ device_type = "memory";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ function = LED_FUNCTION_FAULT;
+ color = <LED_COLOR_ID_AMBER>;
+ gpios = <&chipcommon 13 GPIO_ACTIVE_HIGH>;
+ panic-indicator;
+ };
+ led-1 {
+ function = LED_FUNCTION_INDICATOR;
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ key-restart {
+ label = "Reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&uart0 {
+ clock-frequency = <50000000>;
+ /delete-property/ clocks;
+};
+
+&uart1 {
+ status = "disabled";
+};
+
+&gmac0 {
+ status = "okay";
+};
+
+&gmac1 {
+ status = "disabled";
+};
+&gmac2 {
+ status = "disabled";
+};
+&gmac3 {
+ status = "disabled";
+};
+
+&nandcs {
+ nand-ecc-algo = "hw";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x0 0x200000>;
+ read-only;
+ };
+
+ partition@200000 {
+ label = "u-boot-env";
+ reg = <0x200000 0x200000>;
+ /* empty */
+ };
+
+ partition@400000 {
+ label = "u-boot-backup";
+ reg = <0x400000 0x200000>;
+ /* empty */
+ };
+
+ partition@600000 {
+ label = "u-boot-env-backup";
+ reg = <0x600000 0x200000>;
+ /* empty */
+ };
+
+ partition@800000 {
+ label = "ubi";
+ reg = <0x800000 0x7780000>;
+ };
+ };
+};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ reg = <0>;
+ label = "poe";
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+
+ fixed-link {
+ speed = <1000>;
+ duplex-full;
+ };
+ };
+ };
+};
+
+&i2c0 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinmux_i2c>;
+
+ clock-frequency = <100000>;
+
+ ina219@40 {
+ compatible = "ti,ina219"; /* PoE power */
+ reg = <0x40>;
+ shunt-resistor = <60000>; /* = 60 mOhms */
+ };
+
+ eeprom@56 {
+ compatible = "atmel,24c64";
+ reg = <0x56>;
+ pagesize = <32>;
+ read-only;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /* it's empty */
+ };
+};
+
+&thermal {
+ status = "disabled";
+ /* does not work, reads 418 degree Celsius */
+};

View File

@ -22,9 +22,9 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -122,6 +122,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
bcm47094-luxul-xwr-3150-v1.dtb \
bcm47094-netgear-r8500.dtb \
bcm47094-phicomm-k3.dtb \
bcm53015-meraki-mr26.dtb \
+ bcm53016-dlink-dwl-8610ap.dtb \
bcm53016-meraki-mr32.dtb \
bcm94708.dtb \

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@ -0,0 +1,487 @@
From 915fac07f053418d0ab9075af64da2872ca8a7f8 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 3 May 2023 14:16:10 +0200
Subject: [PATCH] =?UTF-8?q?ARM:=20dts:=20BCM5301X:=20Relicense=20Rafa?=
=?UTF-8?q?=C5=82's=20code=20to=20the=20GPL=202.0+=20/=20MIT?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
All BCM5301X device DTS files use dual licensing. Try the same for SoC.
Introduce a new .dtsi file with a proper SPDX tag.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230503121611.1629-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
MAINTAINERS | 1 +
arch/arm/boot/dts/bcm-ns.dtsi | 202 ++++++++++++++++++++++++++++++++
arch/arm/boot/dts/bcm5301x.dtsi | 192 +-----------------------------
3 files changed, 205 insertions(+), 190 deletions(-)
create mode 100644 arch/arm/boot/dts/bcm-ns.dtsi
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3213,6 +3213,7 @@ M: Rafał Miłecki <zajec5@gmail.com>
M: bcm-kernel-feedback-list@broadcom.com
L: linux-arm-kernel@lists.infradead.org
S: Maintained
+F: arch/arm/boot/dts/bcm-ns.dtsi
F: arch/arm/mach-bcm/bcm_5301x.c
F: arch/arm/boot/dts/bcm5301x*.dtsi
F: arch/arm/boot/dts/bcm470*
--- /dev/null
+++ b/arch/arm/boot/dts/bcm-ns.dtsi
@@ -0,0 +1,202 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include <dt-bindings/clock/bcm-nsp.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ axi@18000000 {
+ compatible = "brcm,bus-axi";
+ reg = <0x18000000 0x1000>;
+ ranges = <0x00000000 0x18000000 0x00100000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ chipcommon: chipcommon@0 {
+ reg = <0x00000000 0x1000>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ pcie0: pcie@12000 {
+ reg = <0x00012000 0x1000>;
+ };
+
+ pcie1: pcie@13000 {
+ reg = <0x00013000 0x1000>;
+ };
+
+ usb2: usb2@21000 {
+ reg = <0x00021000 0x1000>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ interrupt-parent = <&gic>;
+
+ ehci: usb@21000 {
+ #usb-cells = <0>;
+
+ compatible = "generic-ehci";
+ reg = <0x00021000 0x1000>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usb2_phy>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ehci_port1: port@1 {
+ reg = <1>;
+ #trigger-source-cells = <0>;
+ };
+
+ ehci_port2: port@2 {
+ reg = <2>;
+ #trigger-source-cells = <0>;
+ };
+ };
+
+ ohci: usb@22000 {
+ #usb-cells = <0>;
+
+ compatible = "generic-ohci";
+ reg = <0x00022000 0x1000>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ohci_port1: port@1 {
+ reg = <1>;
+ #trigger-source-cells = <0>;
+ };
+
+ ohci_port2: port@2 {
+ reg = <2>;
+ #trigger-source-cells = <0>;
+ };
+ };
+ };
+
+ usb3: usb3@23000 {
+ reg = <0x00023000 0x1000>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ interrupt-parent = <&gic>;
+
+ xhci: usb@23000 {
+ #usb-cells = <0>;
+
+ compatible = "generic-xhci";
+ reg = <0x00023000 0x1000>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usb3_phy>;
+ phy-names = "usb";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ xhci_port1: port@1 {
+ reg = <1>;
+ #trigger-source-cells = <0>;
+ };
+ };
+ };
+ };
+
+ mdio: mdio@18003000 {
+ compatible = "brcm,iproc-mdio";
+ reg = <0x18003000 0x8>;
+ #size-cells = <0>;
+ #address-cells = <1>;
+ };
+
+ dmu-bus@1800c000 {
+ compatible = "simple-bus";
+ ranges = <0 0x1800c000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cru-bus@100 {
+ compatible = "brcm,ns-cru", "simple-mfd";
+ reg = <0x100 0x1a4>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ usb2_phy: phy@164 {
+ compatible = "brcm,ns-usb2-phy";
+ reg = <0x164 0x4>;
+ brcm,syscon-clkset = <&cru_clkset>;
+ clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
+ clock-names = "phy-ref-clk";
+ #phy-cells = <0>;
+ };
+
+ cru_clkset: syscon@180 {
+ compatible = "brcm,cru-clkset", "syscon";
+ reg = <0x180 0x4>;
+ };
+
+ pinctrl: pinctrl@1c0 {
+ compatible = "brcm,bcm4708-pinmux";
+ reg = <0x1c0 0x24>;
+ reg-names = "cru_gpio_control";
+
+ spi-pins {
+ groups = "spi_grp";
+ function = "spi";
+ };
+
+ pinmux_i2c: i2c-pins {
+ groups = "i2c_grp";
+ function = "i2c";
+ };
+
+ pinmux_pwm: pwm-pins {
+ groups = "pwm0_grp", "pwm1_grp",
+ "pwm2_grp", "pwm3_grp";
+ function = "pwm";
+ };
+
+ pinmux_uart1: uart1-pins {
+ groups = "uart1_grp";
+ function = "uart1";
+ };
+ };
+
+ thermal: thermal@2c0 {
+ compatible = "brcm,ns-thermal";
+ reg = <0x2c0 0x10>;
+ #thermal-sensor-cells = <0>;
+ };
+ };
+ };
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <1000>;
+ coefficients = <(-556) 418000>;
+ thermal-sensors = <&thermal>;
+
+ trips {
+ cpu-crit {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ };
+ };
+ };
+};
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -8,11 +8,7 @@
* Licensed under the GNU/GPL. See COPYING for details.
*/
-#include <dt-bindings/clock/bcm-nsp.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include "bcm-ns.dtsi"
/ {
#address-cells = <1>;
@@ -149,12 +145,6 @@
};
axi@18000000 {
- compatible = "brcm,bus-axi";
- reg = <0x18000000 0x1000>;
- ranges = <0x00000000 0x18000000 0x00100000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
#interrupt-cells = <1>;
interrupt-map-mask = <0x000fffff 0xffff>;
interrupt-map =
@@ -228,108 +218,15 @@
<0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
- chipcommon: chipcommon@0 {
- reg = <0x00000000 0x1000>;
-
- gpio-controller;
- #gpio-cells = <2>;
+ chipcommon@0 {
interrupt-controller;
#interrupt-cells = <2>;
};
- pcie0: pcie@12000 {
- reg = <0x00012000 0x1000>;
- };
-
- pcie1: pcie@13000 {
- reg = <0x00013000 0x1000>;
- };
-
pcie2: pcie@14000 {
reg = <0x00014000 0x1000>;
};
- usb2: usb2@21000 {
- reg = <0x00021000 0x1000>;
-
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- interrupt-parent = <&gic>;
-
- ehci: usb@21000 {
- #usb-cells = <0>;
-
- compatible = "generic-ehci";
- reg = <0x00021000 0x1000>;
- interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&usb2_phy>;
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- ehci_port1: port@1 {
- reg = <1>;
- #trigger-source-cells = <0>;
- };
-
- ehci_port2: port@2 {
- reg = <2>;
- #trigger-source-cells = <0>;
- };
- };
-
- ohci: usb@22000 {
- #usb-cells = <0>;
-
- compatible = "generic-ohci";
- reg = <0x00022000 0x1000>;
- interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- ohci_port1: port@1 {
- reg = <1>;
- #trigger-source-cells = <0>;
- };
-
- ohci_port2: port@2 {
- reg = <2>;
- #trigger-source-cells = <0>;
- };
- };
- };
-
- usb3: usb3@23000 {
- reg = <0x00023000 0x1000>;
-
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- interrupt-parent = <&gic>;
-
- xhci: usb@23000 {
- #usb-cells = <0>;
-
- compatible = "generic-xhci";
- reg = <0x00023000 0x1000>;
- interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&usb3_phy>;
- phy-names = "usb";
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- xhci_port1: port@1 {
- reg = <1>;
- #trigger-source-cells = <0>;
- };
- };
- };
-
gmac0: ethernet@24000 {
reg = <0x24000 0x800>;
};
@@ -355,13 +252,6 @@
status = "disabled";
};
- mdio: mdio@18003000 {
- compatible = "brcm,iproc-mdio";
- reg = <0x18003000 0x8>;
- #size-cells = <0>;
- #address-cells = <1>;
- };
-
mdio-mux@18003000 {
compatible = "mdio-mux-mmioreg", "mdio-mux";
mdio-parent-bus = <&mdio>;
@@ -409,18 +299,7 @@
};
dmu-bus@1800c000 {
- compatible = "simple-bus";
- ranges = <0 0x1800c000 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
cru-bus@100 {
- compatible = "brcm,ns-cru", "simple-mfd";
- reg = <0x100 0x1a4>;
- ranges;
- #address-cells = <1>;
- #size-cells = <1>;
-
lcpll0: clock-controller@100 {
#clock-cells = <1>;
compatible = "brcm,nsp-lcpll0";
@@ -440,53 +319,6 @@
"usbclk", "iprocfast",
"sata1", "sata2";
};
-
- usb2_phy: phy@164 {
- compatible = "brcm,ns-usb2-phy";
- reg = <0x164 0x4>;
- brcm,syscon-clkset = <&cru_clkset>;
- clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
- clock-names = "phy-ref-clk";
- #phy-cells = <0>;
- };
-
- cru_clkset: syscon@180 {
- compatible = "brcm,cru-clkset", "syscon";
- reg = <0x180 0x4>;
- };
-
- pinctrl: pinctrl@1c0 {
- compatible = "brcm,bcm4708-pinmux";
- reg = <0x1c0 0x24>;
- reg-names = "cru_gpio_control";
-
- spi-pins {
- groups = "spi_grp";
- function = "spi";
- };
-
- pinmux_i2c: i2c-pins {
- groups = "i2c_grp";
- function = "i2c";
- };
-
- pinmux_pwm: pwm-pins {
- groups = "pwm0_grp", "pwm1_grp",
- "pwm2_grp", "pwm3_grp";
- function = "pwm";
- };
-
- pinmux_uart1: uart1-pins {
- groups = "uart1_grp";
- function = "uart1";
- };
- };
-
- thermal: thermal@2c0 {
- compatible = "brcm,ns-thermal";
- reg = <0x2c0 0x10>;
- #thermal-sensor-cells = <0>;
- };
};
};
@@ -558,24 +390,4 @@
};
};
};
-
- thermal-zones {
- cpu_thermal: cpu-thermal {
- polling-delay-passive = <0>;
- polling-delay = <1000>;
- coefficients = <(-556) 418000>;
- thermal-sensors = <&thermal>;
-
- trips {
- cpu-crit {
- temperature = <125000>;
- hysteresis = <0>;
- type = "critical";
- };
- };
-
- cooling-maps {
- };
- };
- };
};

View File

@ -0,0 +1,136 @@
From 916553449561c4f0b61c71b751b7bb583f5dddd4 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 3 May 2023 14:16:11 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Relicense Florian's code to the GPL 2.0+
/ MIT
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
All BCM5301X device DTS files use dual licensing. Try the same for SoC.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230503121611.1629-2-zajec5@gmail.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm-ns.dtsi | 36 ++++++++++++++++++++++++++++++
arch/arm/boot/dts/bcm5301x.dtsi | 39 ---------------------------------
2 files changed, 36 insertions(+), 39 deletions(-)
--- a/arch/arm/boot/dts/bcm-ns.dtsi
+++ b/arch/arm/boot/dts/bcm-ns.dtsi
@@ -19,6 +19,8 @@
gpio-controller;
#gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
};
pcie0: pcie@12000 {
@@ -109,6 +111,22 @@
};
};
};
+
+ gmac0: ethernet@24000 {
+ reg = <0x24000 0x800>;
+ };
+
+ gmac1: ethernet@25000 {
+ reg = <0x25000 0x800>;
+ };
+
+ gmac2: ethernet@26000 {
+ reg = <0x26000 0x800>;
+ };
+
+ gmac3: ethernet@27000 {
+ reg = <0x27000 0x800>;
+ };
};
mdio: mdio@18003000 {
@@ -118,6 +136,24 @@
#address-cells = <1>;
};
+ rng: rng@18004000 {
+ compatible = "brcm,bcm5301x-rng";
+ reg = <0x18004000 0x14>;
+ };
+
+ srab: ethernet-switch@18007000 {
+ compatible = "brcm,bcm53011-srab", "brcm,bcm5301x-srab";
+ reg = <0x18007000 0x1000>;
+
+ status = "disabled";
+
+ /* ports are defined in board DTS */
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
dmu-bus@1800c000 {
compatible = "simple-bus";
ranges = <0 0x1800c000 0x1000>;
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -218,30 +218,9 @@
<0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
- chipcommon@0 {
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
pcie2: pcie@14000 {
reg = <0x00014000 0x1000>;
};
-
- gmac0: ethernet@24000 {
- reg = <0x24000 0x800>;
- };
-
- gmac1: ethernet@25000 {
- reg = <0x25000 0x800>;
- };
-
- gmac2: ethernet@26000 {
- reg = <0x26000 0x800>;
- };
-
- gmac3: ethernet@27000 {
- reg = <0x27000 0x800>;
- };
};
pwm: pwm@18002000 {
@@ -322,24 +301,6 @@
};
};
- srab: ethernet-switch@18007000 {
- compatible = "brcm,bcm53011-srab", "brcm,bcm5301x-srab";
- reg = <0x18007000 0x1000>;
-
- status = "disabled";
-
- /* ports are defined in board DTS */
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- };
- };
-
- rng: rng@18004000 {
- compatible = "brcm,bcm5301x-rng";
- reg = <0x18004000 0x14>;
- };
-
nand_controller: nand-controller@18028000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;

View File

@ -0,0 +1,32 @@
From d3c8e2c5757153bbfad70019ec1decbca86f3def Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 3 May 2023 14:28:30 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Drop "clock-names" from the SPI node
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
There is no such property in the SPI controller binding documentation.
Also Linux driver doesn't look for it.
This fixes:
arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dtb: spi@18029200: Unevaluated properties are not allowed ('clock-names' was unexpected)
From schema: Documentation/devicetree/bindings/spi/brcm,spi-bcm-qspi.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230503122830.3200-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm5301x.dtsi | 1 -
1 file changed, 1 deletion(-)
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -335,7 +335,6 @@
"spi_lr_session_done",
"spi_lr_overread";
clocks = <&iprocmed>;
- clock-names = "iprocmed";
num-cs = <2>;
#address-cells = <1>;
#size-cells = <0>;

View File

@ -0,0 +1,249 @@
From b3b3cd885ed39cb4b38319a1c4fa4e41db6fee72 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 15 May 2023 17:19:20 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Relicense Hauke's code to the GPL 2.0+ /
MIT
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Move code added by Hauke to the bcm-ns.dtsi which uses dual licensing.
That syncs more Northstar code to be based on the same licensing schema.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Link: https://lore.kernel.org/r/20230515151921.25021-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/bcm-ns.dtsi | 90 +++++++++++++++++++++++++++++++++
arch/arm/boot/dts/bcm5301x.dtsi | 85 -------------------------------
2 files changed, 90 insertions(+), 85 deletions(-)
--- a/arch/arm/boot/dts/bcm-ns.dtsi
+++ b/arch/arm/boot/dts/bcm-ns.dtsi
@@ -1,4 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
+ */
#include <dt-bindings/clock/bcm-nsp.h>
#include <dt-bindings/gpio/gpio.h>
@@ -7,6 +10,81 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
+ interrupt-parent = <&gic>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ chipcommon-a-bus@18000000 {
+ compatible = "simple-bus";
+ ranges = <0x00000000 0x18000000 0x00001000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ uart0: serial@300 {
+ compatible = "ns16550";
+ reg = <0x0300 0x100>;
+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&iprocslow>;
+ status = "disabled";
+ };
+
+ uart1: serial@400 {
+ compatible = "ns16550";
+ reg = <0x0400 0x100>;
+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&iprocslow>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinmux_uart1>;
+ status = "disabled";
+ };
+ };
+
+ mpcore-bus@19000000 {
+ compatible = "simple-bus";
+ ranges = <0x00000000 0x19000000 0x00023000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ scu@20000 {
+ compatible = "arm,cortex-a9-scu";
+ reg = <0x20000 0x100>;
+ };
+
+ timer@20200 {
+ compatible = "arm,cortex-a9-global-timer";
+ reg = <0x20200 0x100>;
+ interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&periph_clk>;
+ };
+
+ timer@20600 {
+ compatible = "arm,cortex-a9-twd-timer";
+ reg = <0x20600 0x20>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
+ IRQ_TYPE_EDGE_RISING)>;
+ clocks = <&periph_clk>;
+ };
+
+ gic: interrupt-controller@21000 {
+ compatible = "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x21000 0x1000>,
+ <0x20100 0x100>;
+ };
+
+ L2: cache-controller@22000 {
+ compatible = "arm,pl310-cache";
+ reg = <0x22000 0x1000>;
+ cache-unified;
+ arm,shared-override;
+ prefetch-data = <1>;
+ prefetch-instr = <1>;
+ cache-level = <2>;
+ };
+ };
+
axi@18000000 {
compatible = "brcm,bus-axi";
reg = <0x18000000 0x1000>;
@@ -216,6 +294,18 @@
};
};
+ nand_controller: nand-controller@18028000 {
+ compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
+ reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
+ reg-names = "nand", "iproc-idm", "iproc-ext";
+ interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ brcm,nand-has-wp;
+ };
+
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <0>;
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -11,41 +11,7 @@
#include "bcm-ns.dtsi"
/ {
- #address-cells = <1>;
- #size-cells = <1>;
- interrupt-parent = <&gic>;
-
- chipcommon-a-bus@18000000 {
- compatible = "simple-bus";
- ranges = <0x00000000 0x18000000 0x00001000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- uart0: serial@300 {
- compatible = "ns16550";
- reg = <0x0300 0x100>;
- interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&iprocslow>;
- status = "disabled";
- };
-
- uart1: serial@400 {
- compatible = "ns16550";
- reg = <0x0400 0x100>;
- interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&iprocslow>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinmux_uart1>;
- status = "disabled";
- };
- };
-
mpcore-bus@19000000 {
- compatible = "simple-bus";
- ranges = <0x00000000 0x19000000 0x00023000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
a9pll: arm_clk@0 {
#clock-cells = <0>;
compatible = "brcm,nsp-armpll";
@@ -53,26 +19,6 @@
reg = <0x00000 0x1000>;
};
- scu@20000 {
- compatible = "arm,cortex-a9-scu";
- reg = <0x20000 0x100>;
- };
-
- timer@20200 {
- compatible = "arm,cortex-a9-global-timer";
- reg = <0x20200 0x100>;
- interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
- clocks = <&periph_clk>;
- };
-
- timer@20600 {
- compatible = "arm,cortex-a9-twd-timer";
- reg = <0x20600 0x20>;
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
- IRQ_TYPE_EDGE_RISING)>;
- clocks = <&periph_clk>;
- };
-
watchdog@20620 {
compatible = "arm,cortex-a9-twd-wdt";
reg = <0x20620 0x20>;
@@ -80,25 +26,6 @@
IRQ_TYPE_EDGE_RISING)>;
clocks = <&periph_clk>;
};
-
- gic: interrupt-controller@21000 {
- compatible = "arm,cortex-a9-gic";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0x21000 0x1000>,
- <0x20100 0x100>;
- };
-
- L2: cache-controller@22000 {
- compatible = "arm,pl310-cache";
- reg = <0x22000 0x1000>;
- cache-unified;
- arm,shared-override;
- prefetch-data = <1>;
- prefetch-instr = <1>;
- cache-level = <2>;
- };
};
pmu {
@@ -301,18 +228,6 @@
};
};
- nand_controller: nand-controller@18028000 {
- compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
- reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
- reg-names = "nand", "iproc-idm", "iproc-ext";
- interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- brcm,nand-has-wp;
- };
-
spi@18029200 {
compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
reg = <0x18029200 0x184>,

View File

@ -0,0 +1,203 @@
From 3b3e35b279bee5e51580c648399e20323467f58c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 15 May 2023 17:19:21 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Relicense AXI interrupts code to the GPL
2.0+ / MIT
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Those entries were added by:
1. Hauke in commits dec378827c4a ("ARM: BCM5301X: Add IRQs to Broadcom's
bus-axi in DTS file") and 1f80de6863ca ("ARM: BCM5301X: add IRQ
numbers for PCIe controller")
2. Florian in the commit 2cd0c0202f13 ("ARM: dts: BCM5301X: Add SRAB
interrupts")
Move them to the bcm-ns.dtsi which uses dual licensing. That syncs more
Northstar code to be based on the same licensing schema.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Link: https://lore.kernel.org/r/20230515151921.25021-2-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/bcm-ns.dtsi | 73 ++++++++++++++++++++++++++++++++
arch/arm/boot/dts/bcm5301x.dtsi | 75 ---------------------------------
2 files changed, 73 insertions(+), 75 deletions(-)
--- a/arch/arm/boot/dts/bcm-ns.dtsi
+++ b/arch/arm/boot/dts/bcm-ns.dtsi
@@ -92,6 +92,79 @@
#address-cells = <1>;
#size-cells = <1>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0x000fffff 0xffff>;
+ interrupt-map =
+ /* ChipCommon */
+ <0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+
+ /* Switch Register Access Block */
+ <0x00007000 0 &gic GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00007000 1 &gic GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00007000 2 &gic GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00007000 3 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00007000 4 &gic GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00007000 5 &gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00007000 6 &gic GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00007000 7 &gic GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00007000 8 &gic GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00007000 9 &gic GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00007000 10 &gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00007000 11 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00007000 12 &gic GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
+
+ /* PCIe Controller 0 */
+ <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+
+ /* PCIe Controller 1 */
+ <0x00013000 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00013000 1 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00013000 2 &gic GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00013000 3 &gic GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00013000 4 &gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00013000 5 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+
+ /* PCIe Controller 2 */
+ <0x00014000 0 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00014000 1 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00014000 2 &gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00014000 3 &gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00014000 4 &gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00014000 5 &gic GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
+
+ /* USB 2.0 Controller */
+ <0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
+
+ /* USB 3.0 Controller */
+ <0x00023000 0 &gic GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
+
+ /* Ethernet Controller 0 */
+ <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
+
+ /* Ethernet Controller 1 */
+ <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+
+ /* Ethernet Controller 2 */
+ <0x00026000 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
+
+ /* Ethernet Controller 3 */
+ <0x00027000 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
+
+ /* NAND Controller */
+ <0x00028000 0 &gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00028000 1 &gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00028000 2 &gic GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00028000 3 &gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00028000 4 &gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00028000 5 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
+ <0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+
chipcommon: chipcommon@0 {
reg = <0x00000000 0x1000>;
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -3,8 +3,6 @@
* Generic DTS part for all BCM53010, BCM53011, BCM53012, BCM53014, BCM53015,
* BCM53016, BCM53017, BCM53018, BCM4707, BCM4708 and BCM4709 SoCs
*
- * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
- *
* Licensed under the GNU/GPL. See COPYING for details.
*/
@@ -72,79 +70,6 @@
};
axi@18000000 {
- #interrupt-cells = <1>;
- interrupt-map-mask = <0x000fffff 0xffff>;
- interrupt-map =
- /* ChipCommon */
- <0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
-
- /* Switch Register Access Block */
- <0x00007000 0 &gic GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
- <0x00007000 1 &gic GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
- <0x00007000 2 &gic GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
- <0x00007000 3 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
- <0x00007000 4 &gic GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
- <0x00007000 5 &gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
- <0x00007000 6 &gic GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
- <0x00007000 7 &gic GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
- <0x00007000 8 &gic GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
- <0x00007000 9 &gic GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
- <0x00007000 10 &gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
- <0x00007000 11 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
- <0x00007000 12 &gic GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
-
- /* PCIe Controller 0 */
- <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
- <0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
- <0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
- <0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
- <0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
-
- /* PCIe Controller 1 */
- <0x00013000 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
- <0x00013000 1 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
- <0x00013000 2 &gic GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
- <0x00013000 3 &gic GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
- <0x00013000 4 &gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
- <0x00013000 5 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
-
- /* PCIe Controller 2 */
- <0x00014000 0 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
- <0x00014000 1 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
- <0x00014000 2 &gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
- <0x00014000 3 &gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
- <0x00014000 4 &gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
- <0x00014000 5 &gic GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
-
- /* USB 2.0 Controller */
- <0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
-
- /* USB 3.0 Controller */
- <0x00023000 0 &gic GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
-
- /* Ethernet Controller 0 */
- <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
-
- /* Ethernet Controller 1 */
- <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
-
- /* Ethernet Controller 2 */
- <0x00026000 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
-
- /* Ethernet Controller 3 */
- <0x00027000 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
-
- /* NAND Controller */
- <0x00028000 0 &gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
- <0x00028000 1 &gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
- <0x00028000 2 &gic GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
- <0x00028000 3 &gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
- <0x00028000 4 &gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
- <0x00028000 5 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
- <0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
- <0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
-
pcie2: pcie@14000 {
reg = <0x00014000 0x1000>;
};

View File

@ -0,0 +1,336 @@
From dfa6570eb5ce2f24059caadbe2ed70034b5337bc Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 15 May 2023 10:33:08 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Specify MAC addresses on Luxul devices
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Use NRAM (NVMEM device) and its "et0macaddr" variable (NVMEM cell) to
point Ethernet devices to their MAC addresses.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230515083308.7612-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts | 13 +++++++++++++
arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts | 13 +++++++++++++
arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts | 13 +++++++++++++
arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts | 11 +++++++++++
arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts | 11 +++++++++++
arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts | 13 +++++++++++++
arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts | 11 +++++++++++
arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts | 13 +++++++++++++
arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts | 11 +++++++++++
arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts | 5 ++++-
10 files changed, 113 insertions(+), 1 deletion(-)
--- a/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
+++ b/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
@@ -20,6 +20,14 @@
reg = <0x00000000 0x08000000>;
};
+ nvram@1eff0000 {
+ compatible = "brcm,nvram";
+ reg = <0x1eff0000 0x10000>;
+
+ et0macaddr: et0macaddr {
+ };
+ };
+
leds {
compatible = "gpio-leds";
@@ -53,6 +61,11 @@
};
};
+&gmac0 {
+ nvmem-cells = <&et0macaddr>;
+ nvmem-cell-names = "mac-address";
+};
+
&spi_nor {
status = "okay";
};
--- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
+++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
@@ -24,6 +24,14 @@
reg = <0x00000000 0x08000000>;
};
+ nvram@1eff0000 {
+ compatible = "brcm,nvram";
+ reg = <0x1eff0000 0x10000>;
+
+ et0macaddr: et0macaddr {
+ };
+ };
+
nand_controller: nand-controller@18028000 {
nand@0 {
partitions {
@@ -60,6 +68,11 @@
};
};
+&gmac0 {
+ nvmem-cells = <&et0macaddr>;
+ nvmem-cell-names = "mac-address";
+};
+
&spi_nor {
status = "okay";
};
--- a/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
+++ b/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
@@ -20,6 +20,14 @@
reg = <0x00000000 0x08000000>;
};
+ nvram@1eff0000 {
+ compatible = "brcm,nvram";
+ reg = <0x1eff0000 0x10000>;
+
+ et0macaddr: et0macaddr {
+ };
+ };
+
leds {
compatible = "gpio-leds";
@@ -53,6 +61,11 @@
};
};
+&gmac0 {
+ nvmem-cells = <&et0macaddr>;
+ nvmem-cell-names = "mac-address";
+};
+
&spi_nor {
status = "okay";
};
--- a/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
+++ b/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
@@ -24,6 +24,10 @@
nvram@1eff0000 {
compatible = "brcm,nvram";
reg = <0x1eff0000 0x10000>;
+
+ et0macaddr: et0macaddr {
+ #nvmem-cell-cells = <1>;
+ };
};
leds {
@@ -106,6 +110,11 @@
vcc-gpio = <&chipcommon 9 GPIO_ACTIVE_HIGH>;
};
+&gmac0 {
+ nvmem-cells = <&et0macaddr 0>;
+ nvmem-cell-names = "mac-address";
+};
+
&spi_nor {
status = "okay";
};
@@ -137,6 +146,8 @@
port@4 {
reg = <4>;
label = "wan";
+ nvmem-cells = <&et0macaddr 5>;
+ nvmem-cell-names = "mac-address";
};
port@5 {
--- a/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts
@@ -25,6 +25,10 @@
nvram@1eff0000 {
compatible = "brcm,nvram";
reg = <0x1eff0000 0x10000>;
+
+ et0macaddr: et0macaddr {
+ #nvmem-cell-cells = <1>;
+ };
};
leds {
@@ -61,6 +65,11 @@
vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
};
+&gmac0 {
+ nvmem-cells = <&et0macaddr 0>;
+ nvmem-cell-names = "mac-address";
+};
+
&spi_nor {
status = "okay";
};
@@ -76,6 +85,8 @@
port@0 {
reg = <0>;
label = "wan";
+ nvmem-cells = <&et0macaddr 1>;
+ nvmem-cell-names = "mac-address";
};
port@1 {
--- a/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts
@@ -20,6 +20,14 @@
reg = <0x00000000 0x08000000>;
};
+ nvram@1eff0000 {
+ compatible = "brcm,nvram";
+ reg = <0x1eff0000 0x10000>;
+
+ et0macaddr: et0macaddr {
+ };
+ };
+
leds {
compatible = "gpio-leds";
@@ -51,6 +59,11 @@
};
};
+&gmac0 {
+ nvmem-cells = <&et0macaddr>;
+ nvmem-cell-names = "mac-address";
+};
+
&spi_nor {
status = "okay";
};
--- a/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts
@@ -25,6 +25,10 @@
nvram@1eff0000 {
compatible = "brcm,nvram";
reg = <0x1eff0000 0x10000>;
+
+ et0macaddr: et0macaddr {
+ #nvmem-cell-cells = <1>;
+ };
};
leds {
@@ -61,6 +65,11 @@
vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
};
+&gmac0 {
+ nvmem-cells = <&et0macaddr 0>;
+ nvmem-cell-names = "mac-address";
+};
+
&spi_nor {
status = "okay";
};
@@ -76,6 +85,8 @@
port@0 {
reg = <0>;
label = "wan";
+ nvmem-cells = <&et0macaddr 1>;
+ nvmem-cell-names = "mac-address";
};
port@1 {
--- a/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts
@@ -22,6 +22,14 @@
<0x88000000 0x18000000>;
};
+ nvram@1eff0000 {
+ compatible = "brcm,nvram";
+ reg = <0x1eff0000 0x10000>;
+
+ et0macaddr: et0macaddr {
+ };
+ };
+
leds {
compatible = "gpio-leds";
@@ -47,6 +55,11 @@
status = "okay";
};
+&gmac0 {
+ nvmem-cells = <&et0macaddr>;
+ nvmem-cell-names = "mac-address";
+};
+
&spi_nor {
status = "okay";
};
--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
@@ -25,6 +25,10 @@
nvram@1eff0000 {
compatible = "brcm,nvram";
reg = <0x1eff0000 0x10000>;
+
+ et0macaddr: et0macaddr {
+ #nvmem-cell-cells = <1>;
+ };
};
leds {
@@ -101,6 +105,11 @@
vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
};
+&gmac0 {
+ nvmem-cells = <&et0macaddr 0>;
+ nvmem-cell-names = "mac-address";
+};
+
&spi_nor {
status = "okay";
};
@@ -136,6 +145,8 @@
port@4 {
reg = <4>;
label = "wan";
+ nvmem-cells = <&et0macaddr 5>;
+ nvmem-cell-names = "mac-address";
};
port@5 {
--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
@@ -27,6 +27,7 @@
reg = <0x1eff0000 0x10000>;
et0macaddr: et0macaddr {
+ #nvmem-cell-cells = <1>;
};
};
@@ -76,7 +77,7 @@
};
&gmac0 {
- nvmem-cells = <&et0macaddr>;
+ nvmem-cells = <&et0macaddr 0>;
nvmem-cell-names = "mac-address";
};
@@ -119,6 +120,8 @@
port@4 {
reg = <4>;
label = "wan";
+ nvmem-cells = <&et0macaddr 5>;
+ nvmem-cell-names = "mac-address";
};
port@5 {

View File

@ -0,0 +1,90 @@
From 9d7121f1d2faa0b50bf5b462adcd2dd91970c45e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Sat, 20 May 2023 13:26:01 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Use updated device "compatible" strings
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Northstar binding was updated to use minus/hyphen char between model and
version for all devices.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230520112601.11821-2-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts | 2 +-
arch/arm/boot/dts/bcm4708-netgear-r6250.dts | 2 +-
arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts | 2 +-
arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts | 2 +-
arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts | 2 +-
arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts | 2 +-
6 files changed, 6 insertions(+), 6 deletions(-)
--- a/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
+++ b/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
@@ -8,7 +8,7 @@
#include "bcm4708.dtsi"
/ {
- compatible = "luxul,xap-1510v1", "brcm,bcm4708";
+ compatible = "luxul,xap-1510-v1", "brcm,bcm4708";
model = "Luxul XAP-1510 V1";
chosen {
--- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
+++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
@@ -13,7 +13,7 @@
#include "bcm5301x-nand-cs0-bch8.dtsi"
/ {
- compatible = "netgear,r6250v1", "brcm,bcm4708";
+ compatible = "netgear,r6250-v1", "brcm,bcm4708";
model = "Netgear R6250 V1 (BCM4708)";
chosen {
--- a/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts
+++ b/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts
@@ -12,7 +12,7 @@
#include "bcm5301x-nand-cs0-bch8.dtsi"
/ {
- compatible = "netgear,r6300v2", "brcm,bcm4708";
+ compatible = "netgear,r6300-v2", "brcm,bcm4708";
model = "Netgear R6300 V2 (BCM4708)";
chosen {
--- a/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
+++ b/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
@@ -8,7 +8,7 @@
#include "bcm47081.dtsi"
/ {
- compatible = "luxul,xap-1410v1", "brcm,bcm47081", "brcm,bcm4708";
+ compatible = "luxul,xap-1410-v1", "brcm,bcm47081", "brcm,bcm4708";
model = "Luxul XAP-1410 V1";
chosen {
--- a/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
+++ b/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
@@ -9,7 +9,7 @@
#include "bcm5301x-nand-cs0-bch4.dtsi"
/ {
- compatible = "luxul,xwr-1200v1", "brcm,bcm47081", "brcm,bcm4708";
+ compatible = "luxul,xwr-1200-v1", "brcm,bcm47081", "brcm,bcm4708";
model = "Luxul XWR-1200 V1";
chosen {
--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
@@ -9,7 +9,7 @@
#include "bcm5301x-nand-cs0-bch4.dtsi"
/ {
- compatible = "luxul,xwr-3100v1", "brcm,bcm47094", "brcm,bcm4708";
+ compatible = "luxul,xwr-3100-v1", "brcm,bcm47094", "brcm,bcm4708";
model = "Luxul XWR-3100 V1";
chosen {

View File

@ -0,0 +1,82 @@
From 04afb51c1dce90051487d3c7b70a1b1b246ce29a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 2 Jun 2023 17:10:23 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Use updated "spi-gpio" binding properties
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Switch away from deprecated properties.
This fixes:
arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dtb: spi: gpio-sck: False schema does not allow [[6, 7, 0]]
From schema: Documentation/devicetree/bindings/spi/spi-gpio.yaml
arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dtb: spi: gpio-mosi: False schema does not allow [[6, 4, 0]]
From schema: Documentation/devicetree/bindings/spi/spi-gpio.yaml
arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dtb: spi: 'sck-gpios' is a required property
From schema: Documentation/devicetree/bindings/spi/spi-gpio.yaml
arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dtb: spi: Unevaluated properties are not allowed ('gpio-mosi', 'gpio-sck' were unexpected)
From schema: Documentation/devicetree/bindings/spi/spi-gpio.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230602151023.8607-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/bcm4708-buffalo-wzr-1166dhp-common.dtsi | 4 ++--
arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts | 4 ++--
arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts | 4 ++--
arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts | 4 ++--
4 files changed, 8 insertions(+), 8 deletions(-)
--- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1166dhp-common.dtsi
+++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1166dhp-common.dtsi
@@ -16,8 +16,8 @@
spi {
compatible = "spi-gpio";
num-chipselects = <1>;
- gpio-sck = <&chipcommon 7 0>;
- gpio-mosi = <&chipcommon 4 0>;
+ sck-gpios = <&chipcommon 7 0>;
+ mosi-gpios = <&chipcommon 4 0>;
cs-gpios = <&chipcommon 6 0>;
#address-cells = <1>;
#size-cells = <0>;
--- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
+++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
@@ -28,8 +28,8 @@
spi {
compatible = "spi-gpio";
num-chipselects = <1>;
- gpio-sck = <&chipcommon 7 0>;
- gpio-mosi = <&chipcommon 4 0>;
+ sck-gpios = <&chipcommon 7 0>;
+ mosi-gpios = <&chipcommon 4 0>;
cs-gpios = <&chipcommon 6 0>;
#address-cells = <1>;
#size-cells = <0>;
--- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
+++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
@@ -28,8 +28,8 @@
spi {
compatible = "spi-gpio";
num-chipselects = <1>;
- gpio-sck = <&chipcommon 7 0>;
- gpio-mosi = <&chipcommon 4 0>;
+ sck-gpios = <&chipcommon 7 0>;
+ mosi-gpios = <&chipcommon 4 0>;
cs-gpios = <&chipcommon 6 0>;
#address-cells = <1>;
#size-cells = <0>;
--- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts
+++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts
@@ -28,8 +28,8 @@
spi {
compatible = "spi-gpio";
num-chipselects = <1>;
- gpio-sck = <&chipcommon 7 0>;
- gpio-mosi = <&chipcommon 4 0>;
+ sck-gpios = <&chipcommon 7 0>;
+ mosi-gpios = <&chipcommon 4 0>;
cs-gpios = <&chipcommon 6 0>;
#address-cells = <1>;
#size-cells = <0>;

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@ -0,0 +1,54 @@
From c3acdd4901192bc69dc577012663d5abae21661e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 2 Jun 2023 15:34:54 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Drop invalid #usb-cells
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Such property simply doesn't exist (is not documented or used anywhere).
This fixes:
arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dtb: usb@21000: Unevaluated properties are not allowed ('#usb-cells' was unexpected)
From schema: Documentation/devicetree/bindings/usb/generic-ehci.yaml
arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dtb: usb@22000: Unevaluated properties are not allowed ('#usb-cells' was unexpected)
From schema: Documentation/devicetree/bindings/usb/generic-ohci.yaml
arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dtb: usb@23000: Unevaluated properties are not allowed ('#usb-cells' was unexpected)
From schema: Documentation/devicetree/bindings/usb/generic-xhci.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230602133455.7441-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/bcm-ns.dtsi | 6 ------
1 file changed, 6 deletions(-)
--- a/arch/arm/boot/dts/bcm-ns.dtsi
+++ b/arch/arm/boot/dts/bcm-ns.dtsi
@@ -192,8 +192,6 @@
interrupt-parent = <&gic>;
ehci: usb@21000 {
- #usb-cells = <0>;
-
compatible = "generic-ehci";
reg = <0x00021000 0x1000>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
@@ -214,8 +212,6 @@
};
ohci: usb@22000 {
- #usb-cells = <0>;
-
compatible = "generic-ohci";
reg = <0x00022000 0x1000>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
@@ -245,8 +241,6 @@
interrupt-parent = <&gic>;
xhci: usb@23000 {
- #usb-cells = <0>;
-
compatible = "generic-xhci";
reg = <0x00023000 0x1000>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;

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@ -0,0 +1,31 @@
From 676bf7d062c14191c3fc12f1e36e1f3809041483 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 2 Jun 2023 15:34:55 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Drop invalid properties from Meraki MR32
keys
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This fixes:
arch/arm/boot/dts/bcm53015-meraki-mr26.dtb: keys: '#address-cells', '#size-cells' do not match any of the regexes: '^(button|event|key|switch|(button|event|key|switch)-[a-z0-9-]+|[a-z0-9-]+-(button|event|key|switch))$', 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/input/gpio-keys.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230602133455.7441-2-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/bcm53015-meraki-mr26.dts | 2 --
1 file changed, 2 deletions(-)
--- a/arch/arm/boot/dts/bcm53015-meraki-mr26.dts
+++ b/arch/arm/boot/dts/bcm53015-meraki-mr26.dts
@@ -39,8 +39,6 @@
keys {
compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
key-restart {
label = "Reset";

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@ -0,0 +1,106 @@
From 1d5682ccc7d6088179b6cfd50a3e3bb6d2b0527e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 5 Jun 2023 08:10:49 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Relicense Christian's code to the GPL
2.0+ / MIT
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Move code added by Christian to the bcm-ns.dtsi which uses dual
licensing. That syncs more Northstar code to be based on the same
licensing schema.
Cc: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Christian Lamparter <chunkeey@gmail.com>
Link: https://lore.kernel.org/r/20230605061049.16136-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/bcm-ns.dtsi | 21 +++++++++++++++++++++
arch/arm/boot/dts/bcm5301x.dtsi | 23 -----------------------
2 files changed, 21 insertions(+), 23 deletions(-)
--- a/arch/arm/boot/dts/bcm-ns.dtsi
+++ b/arch/arm/boot/dts/bcm-ns.dtsi
@@ -182,6 +182,10 @@
reg = <0x00013000 0x1000>;
};
+ pcie2: pcie@14000 {
+ reg = <0x00014000 0x1000>;
+ };
+
usb2: usb2@21000 {
reg = <0x00021000 0x1000>;
@@ -274,6 +278,14 @@
};
};
+ pwm: pwm@18002000 {
+ compatible = "brcm,iproc-pwm";
+ reg = <0x18002000 0x28>;
+ clocks = <&osc>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
mdio: mdio@18003000 {
compatible = "brcm,iproc-mdio";
reg = <0x18003000 0x8>;
@@ -299,6 +311,15 @@
};
};
+ uart2: serial@18008000 {
+ compatible = "ns16550a";
+ reg = <0x18008000 0x20>;
+ clocks = <&iprocslow>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ status = "disabled";
+ };
+
dmu-bus@1800c000 {
compatible = "simple-bus";
ranges = <0 0x1800c000 0x1000>;
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -69,20 +69,6 @@
};
};
- axi@18000000 {
- pcie2: pcie@14000 {
- reg = <0x00014000 0x1000>;
- };
- };
-
- pwm: pwm@18002000 {
- compatible = "brcm,iproc-pwm";
- reg = <0x18002000 0x28>;
- clocks = <&osc>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
mdio-mux@18003000 {
compatible = "mdio-mux-mmioreg", "mdio-mux";
mdio-parent-bus = <&mdio>;
@@ -110,15 +96,6 @@
reg = <0x18105000 0x1000>;
};
- uart2: serial@18008000 {
- compatible = "ns16550a";
- reg = <0x18008000 0x20>;
- clocks = <&iprocslow>;
- interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
- reg-shift = <2>;
- status = "disabled";
- };
-
i2c0: i2c@18009000 {
compatible = "brcm,iproc-i2c";
reg = <0x18009000 0x50>;

View File

@ -0,0 +1,838 @@
From ba4aebce23b2affb810b8a60eae853674d2cded2 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 5 Jun 2023 15:21:09 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Describe switch ports in the main DTS
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
All Northstar SoCs have BCM5301x switches (BCM53011, BCM53012) with 8
ports (0-8 without 6). By design 3 switch ports (5, 7 and 8) are
hardwired to 3 on-SoC Ethernet interfaces. Switch port 8 requires
forcing link state.
It seems that global Northstar .dtsi file is the best place to describe
those hw details. Only device specific bits (like labels) should go to
device .dts files.
This seems to fit well with a tiny exception of Asus RT-AC88U which
somehow was designed to have switch 5 connected to an extra switch. This
case was simply handled with a /delete-property/.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Christian Lamparter <chunkeey@gmail.com> (MR32+MR26)
Link: https://lore.kernel.org/r/20230605132109.7933-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/bcm-ns.dtsi | 41 ++++++++++++++++++-
.../bcm4708-buffalo-wzr-1166dhp-common.dtsi | 7 ----
arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts | 4 --
arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts | 3 --
arch/arm/boot/dts/bcm4708-netgear-r6250.dts | 7 ----
arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts | 7 ----
.../boot/dts/bcm47081-buffalo-wzr-600dhp2.dts | 7 ----
arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts | 3 --
arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts | 7 ----
arch/arm/boot/dts/bcm4709-netgear-r8000.dts | 12 ------
arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts | 17 +-------
arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 12 ------
arch/arm/boot/dts/bcm47094-dlink-dir-890l.dts | 12 ------
.../boot/dts/bcm47094-linksys-panamera.dts | 34 ++++-----------
arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts | 7 ----
arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts | 4 --
arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts | 7 ----
arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts | 3 --
arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts | 7 ----
.../boot/dts/bcm47094-luxul-xwr-3150-v1.dts | 7 ----
arch/arm/boot/dts/bcm53015-meraki-mr26.dts | 3 --
arch/arm/boot/dts/bcm53016-meraki-mr32.dts | 3 --
22 files changed, 51 insertions(+), 163 deletions(-)
--- a/arch/arm/boot/dts/bcm-ns.dtsi
+++ b/arch/arm/boot/dts/bcm-ns.dtsi
@@ -304,10 +304,49 @@
status = "disabled";
- /* ports are defined in board DTS */
ports {
#address-cells = <1>;
#size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+ };
+
+ port@2 {
+ reg = <2>;
+ };
+
+ port@3 {
+ reg = <3>;
+ };
+
+ port@4 {
+ reg = <4>;
+ };
+
+ port@5 {
+ reg = <5>;
+ ethernet = <&gmac0>;
+ };
+
+ port@7 {
+ reg = <7>;
+ ethernet = <&gmac1>;
+ };
+
+ port@8 {
+ reg = <8>;
+ ethernet = <&gmac2>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
};
};
--- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1166dhp-common.dtsi
+++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1166dhp-common.dtsi
@@ -159,34 +159,27 @@
ports {
port@0 {
- reg = <0>;
label = "lan1";
};
port@1 {
- reg = <1>;
label = "lan2";
};
port@2 {
- reg = <2>;
label = "lan3";
};
port@3 {
- reg = <3>;
label = "lan4";
};
port@4 {
- reg = <4>;
label = "wan";
};
port@5 {
- reg = <5>;
label = "cpu";
- ethernet = <&gmac0>;
};
};
};
--- a/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
+++ b/arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
@@ -75,19 +75,15 @@
ports {
port@0 {
- reg = <0>;
label = "poe";
};
port@4 {
- reg = <4>;
label = "lan";
};
port@5 {
- reg = <5>;
label = "cpu";
- ethernet = <&gmac0>;
};
};
};
--- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
+++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
@@ -82,14 +82,11 @@
ports {
port@4 {
- reg = <4>;
label = "lan";
};
port@5 {
- reg = <5>;
label = "cpu";
- ethernet = <&gmac0>;
};
};
};
--- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
+++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
@@ -100,34 +100,27 @@
ports {
port@0 {
- reg = <0>;
label = "lan4";
};
port@1 {
- reg = <1>;
label = "lan3";
};
port@2 {
- reg = <2>;
label = "lan2";
};
port@3 {
- reg = <3>;
label = "lan1";
};
port@4 {
- reg = <4>;
label = "wan";
};
port@5 {
- reg = <5>;
label = "cpu";
- ethernet = <&gmac0>;
};
};
};
--- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
+++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
@@ -123,34 +123,27 @@
ports {
port@0 {
- reg = <0>;
label = "lan4";
};
port@1 {
- reg = <1>;
label = "lan3";
};
port@2 {
- reg = <2>;
label = "lan2";
};
port@3 {
- reg = <3>;
label = "lan1";
};
port@4 {
- reg = <4>;
label = "wan";
};
port@5 {
- reg = <5>;
label = "cpu";
- ethernet = <&gmac0>;
};
};
};
--- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
+++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
@@ -123,34 +123,27 @@
ports {
port@0 {
- reg = <0>;
label = "lan1";
};
port@1 {
- reg = <1>;
label = "lan2";
};
port@2 {
- reg = <2>;
label = "lan3";
};
port@3 {
- reg = <3>;
label = "lan4";
};
port@4 {
- reg = <4>;
label = "wan";
};
port@5 {
- reg = <5>;
label = "cpu";
- ethernet = <&gmac0>;
};
};
};
--- a/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
+++ b/arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
@@ -75,14 +75,11 @@
ports {
port@4 {
- reg = <4>;
label = "poe";
};
port@5 {
- reg = <5>;
label = "cpu";
- ethernet = <&gmac0>;
};
};
};
--- a/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
+++ b/arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
@@ -124,36 +124,29 @@
ports {
port@0 {
- reg = <0>;
label = "lan4";
};
port@1 {
- reg = <1>;
label = "lan3";
};
port@2 {
- reg = <2>;
label = "lan2";
};
port@3 {
- reg = <3>;
label = "lan1";
};
port@4 {
- reg = <4>;
label = "wan";
nvmem-cells = <&et0macaddr 5>;
nvmem-cell-names = "mac-address";
};
port@5 {
- reg = <5>;
label = "cpu";
- ethernet = <&gmac0>;
};
};
};
--- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
+++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
@@ -191,39 +191,27 @@
ports {
port@0 {
- reg = <0>;
label = "lan1";
};
port@1 {
- reg = <1>;
label = "lan2";
};
port@2 {
- reg = <2>;
label = "lan3";
};
port@3 {
- reg = <3>;
label = "lan4";
};
port@4 {
- reg = <4>;
label = "wan";
};
port@8 {
- reg = <8>;
label = "cpu";
- ethernet = <&gmac2>;
-
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
};
};
};
--- a/arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts
+++ b/arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts
@@ -181,32 +181,28 @@
ports {
port@0 {
- reg = <0>;
label = "lan4";
};
port@1 {
- reg = <1>;
label = "lan3";
};
port@2 {
- reg = <2>;
label = "lan2";
};
port@3 {
- reg = <3>;
label = "lan1";
};
port@4 {
- reg = <4>;
label = "wan";
};
sw0_p5: port@5 {
- reg = <5>;
+ /delete-property/ethernet;
+
label = "extsw";
phy-mode = "rgmii";
@@ -218,8 +214,6 @@
};
port@7 {
- reg = <7>;
- ethernet = <&gmac1>;
label = "cpu";
fixed-link {
@@ -229,14 +223,7 @@
};
port@8 {
- reg = <8>;
- ethernet = <&gmac2>;
label = "cpu";
-
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
};
};
};
--- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
+++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
@@ -124,39 +124,27 @@
ports {
port@0 {
- reg = <0>;
label = "lan4";
};
port@1 {
- reg = <1>;
label = "lan3";
};
port@2 {
- reg = <2>;
label = "lan2";
};
port@3 {
- reg = <3>;
label = "lan1";
};
port@4 {
- reg = <4>;
label = "wan";
};
port@8 {
- reg = <8>;
label = "cpu";
- ethernet = <&gmac2>;
-
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
};
};
};
--- a/arch/arm/boot/dts/bcm47094-dlink-dir-890l.dts
+++ b/arch/arm/boot/dts/bcm47094-dlink-dir-890l.dts
@@ -172,40 +172,28 @@
ports {
port@0 {
- reg = <0>;
label = "lan1";
};
port@1 {
- reg = <1>;
label = "lan2";
};
port@2 {
- reg = <2>;
label = "lan3";
};
port@3 {
- reg = <3>;
label = "lan4";
};
port@4 {
- reg = <4>;
label = "wan";
};
port@8 {
- reg = <8>;
label = "cpu";
- ethernet = <&gmac2>;
phy-mode = "rgmii";
-
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
};
};
};
--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
@@ -207,29 +207,32 @@
dsa,member = <0 0>;
ports {
+ sw0_p0: port@0 {
+ label = "extsw";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
port@1 {
- reg = <1>;
label = "lan7";
};
port@2 {
- reg = <2>;
label = "lan4";
};
port@3 {
- reg = <3>;
label = "lan8";
};
port@4 {
- reg = <4>;
label = "wan";
};
port@5 {
- reg = <5>;
- ethernet = <&gmac0>;
label = "cpu";
status = "disabled";
@@ -240,8 +243,6 @@
};
port@7 {
- reg = <7>;
- ethernet = <&gmac1>;
label = "cpu";
status = "disabled";
@@ -252,24 +253,7 @@
};
port@8 {
- reg = <8>;
- ethernet = <&gmac2>;
label = "cpu";
-
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
- };
-
- sw0_p0: port@0 {
- reg = <0>;
- label = "extsw";
-
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
};
};
};
--- a/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts
@@ -83,36 +83,29 @@
ports {
port@0 {
- reg = <0>;
label = "wan";
nvmem-cells = <&et0macaddr 1>;
nvmem-cell-names = "mac-address";
};
port@1 {
- reg = <1>;
label = "lan4";
};
port@2 {
- reg = <2>;
label = "lan3";
};
port@3 {
- reg = <3>;
label = "lan2";
};
port@4 {
- reg = <4>;
label = "lan1";
};
port@5 {
- reg = <5>;
label = "cpu";
- ethernet = <&gmac0>;
};
};
};
--- a/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts
@@ -73,19 +73,15 @@
ports {
port@0 {
- reg = <0>;
label = "poe";
};
port@1 {
- reg = <1>;
label = "lan";
};
port@5 {
- reg = <5>;
label = "cpu";
- ethernet = <&gmac0>;
};
};
};
--- a/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts
@@ -83,36 +83,29 @@
ports {
port@0 {
- reg = <0>;
label = "wan";
nvmem-cells = <&et0macaddr 1>;
nvmem-cell-names = "mac-address";
};
port@1 {
- reg = <1>;
label = "lan4";
};
port@2 {
- reg = <2>;
label = "lan3";
};
port@3 {
- reg = <3>;
label = "lan2";
};
port@4 {
- reg = <4>;
label = "lan1";
};
port@5 {
- reg = <5>;
label = "cpu";
- ethernet = <&gmac0>;
};
};
};
--- a/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts
@@ -69,14 +69,11 @@
ports {
port@0 {
- reg = <0>;
label = "lan";
};
port@5 {
- reg = <5>;
label = "cpu";
- ethernet = <&gmac0>;
};
};
};
--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
@@ -123,36 +123,29 @@
ports {
port@0 {
- reg = <0>;
label = "lan4";
};
port@1 {
- reg = <1>;
label = "lan3";
};
port@2 {
- reg = <2>;
label = "lan2";
};
port@3 {
- reg = <3>;
label = "lan1";
};
port@4 {
- reg = <4>;
label = "wan";
nvmem-cells = <&et0macaddr 5>;
nvmem-cell-names = "mac-address";
};
port@5 {
- reg = <5>;
label = "cpu";
- ethernet = <&gmac0>;
};
};
};
--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
@@ -98,36 +98,29 @@
ports {
port@0 {
- reg = <0>;
label = "lan4";
};
port@1 {
- reg = <1>;
label = "lan3";
};
port@2 {
- reg = <2>;
label = "lan2";
};
port@3 {
- reg = <3>;
label = "lan1";
};
port@4 {
- reg = <4>;
label = "wan";
nvmem-cells = <&et0macaddr 5>;
nvmem-cell-names = "mac-address";
};
port@5 {
- reg = <5>;
label = "cpu";
- ethernet = <&gmac0>;
};
};
};
--- a/arch/arm/boot/dts/bcm53015-meraki-mr26.dts
+++ b/arch/arm/boot/dts/bcm53015-meraki-mr26.dts
@@ -115,14 +115,11 @@
ports {
port@0 {
- reg = <0>;
label = "poe";
};
port@5 {
- reg = <5>;
label = "cpu";
- ethernet = <&gmac0>;
fixed-link {
speed = <1000>;
--- a/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
+++ b/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
@@ -176,14 +176,11 @@
ports {
port@0 {
- reg = <0>;
label = "poe";
};
port@5 {
- reg = <5>;
label = "cpu";
- ethernet = <&gmac0>;
fixed-link {
speed = <1000>;

View File

@ -0,0 +1,63 @@
From a6a1a156f5debaebf9f61850d111b966e9be9ee9 Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@gmail.com>
Date: Thu, 8 Jun 2023 17:36:27 +0200
Subject: [PATCH] ARM: dts: BCM5301X: MR26: MR32: remove bogus nand-ecc-algo
property
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
| bcm53015-meraki-mr26.dtb: nand-controller@18028000:
| nand@0:nand-ecc-algo:0: 'hw' is not one of ['hamming', 'bch', 'rs']
| From schema: Documentation/[...]/nand-controller.yaml
| bcm53016-meraki-mr32.dtb: nand-controller@18028000:
| nand@0:nand-ecc-algo:0: 'hw' is not one of ['hamming', 'bch', 'rs']
| From schema: Documentation/[...]/nand-controller.yaml
original ECC values for these old Merakis are sadly not
provided by the vendor. It looks like Meraki just stuck
with what Broadcom's SDK was doing... which left this
up to the proprietary nand driver.
Note: The invalid setting was and is handled by brcmnand. It
falls back to "bch" in brcmnand_setup_dev() when ecc.algo is
set to NAND_ECC_ALGO_UNKNOWN (since "hw" is not in the list
above).
A correct nand-ecc-algo = "bch"; is already specified in the
included "bcm5301x-nand-cs0-bch8.dtsi". So this line can be
dropped.
Reported-by: Rafał Miłecki <zajec5@gmail.com> (per Mail)
Fixes: 935327a73553 ("ARM: dts: BCM5301X: Add DT for Meraki MR26")
Fixes: ec88a9c344d9 ("ARM: BCM5301X: Add DT for Meraki MR32")
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Link: https://lore.kernel.org/r/2c4d00dd40124c2ddc0b139cbce7531b108f9052.1686238550.git.chunkeey@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/bcm53015-meraki-mr26.dts | 2 --
arch/arm/boot/dts/bcm53016-meraki-mr32.dts | 2 --
2 files changed, 4 deletions(-)
--- a/arch/arm/boot/dts/bcm53015-meraki-mr26.dts
+++ b/arch/arm/boot/dts/bcm53015-meraki-mr26.dts
@@ -72,8 +72,6 @@
};
&nandcs {
- nand-ecc-algo = "hw";
-
partitions {
compatible = "fixed-partitions";
#address-cells = <0x1>;
--- a/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
+++ b/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
@@ -125,8 +125,6 @@
};
&nandcs {
- nand-ecc-algo = "hw";
-
partitions {
/*
* The partition autodetection does not work for this device.

View File

@ -0,0 +1,54 @@
From d68b2f7d7d06872450d4f39d84d5926d7e7ae88c Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@gmail.com>
Date: Thu, 8 Jun 2023 17:36:28 +0200
Subject: [PATCH] ARM: dts: BCM5301X: MR32: remove partition index numbers
removes the partition indexes in the node names under.
This brings the device tree source in line with others.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Link: https://lore.kernel.org/r/627f57d568030a56499361790524b4d4f3381619.1686238550.git.chunkeey@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/bcm53016-meraki-mr32.dts | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
--- a/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
+++ b/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
@@ -138,31 +138,31 @@
#address-cells = <0x1>;
#size-cells = <0x1>;
- partition0@0 {
+ partition@0 {
label = "u-boot";
reg = <0x0 0x100000>;
read-only;
};
- partition1@100000 {
+ partition@100000 {
label = "bootkernel1";
reg = <0x100000 0x300000>;
read-only;
};
- partition2@400000 {
+ partition@400000 {
label = "nvram";
reg = <0x400000 0x100000>;
read-only;
};
- partition3@500000 {
+ partition@500000 {
label = "bootkernel2";
reg = <0x500000 0x300000>;
read-only;
};
- partition4@800000 {
+ partition@800000 {
label = "ubi";
reg = <0x800000 0x7780000>;
};

View File

@ -0,0 +1,44 @@
From fd274b733bfdde3ca72f0fa2a37f032f3a8c402c Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@gmail.com>
Date: Thu, 8 Jun 2023 17:36:29 +0200
Subject: [PATCH] ARM: dts: BCM5301X: fix duplex-full => full-duplex
this typo was found by the dtbs_check
| ports:port@5:fixed-link: 'oneOf' conditional failed,
| {'speed': [[1000]], 'duplex-full': True} is not of type 'array'
| 'duplex-full' does not match any of the regexes: 'pinctrl-[0-]..."
this should have been full-duplex;
Fixes: 935327a73553 ("ARM: dts: BCM5301X: Add DT for Meraki MR26")
Fixes: ec88a9c344d9 ("ARM: BCM5301X: Add DT for Meraki MR32")
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Link: https://lore.kernel.org/r/50522f45566951a9eabd22820647924cc6b4a264.1686238550.git.chunkeey@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/bcm53015-meraki-mr26.dts | 2 +-
arch/arm/boot/dts/bcm53016-meraki-mr32.dts | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
--- a/arch/arm/boot/dts/bcm53015-meraki-mr26.dts
+++ b/arch/arm/boot/dts/bcm53015-meraki-mr26.dts
@@ -121,7 +121,7 @@
fixed-link {
speed = <1000>;
- duplex-full;
+ full-duplex;
};
};
};
--- a/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
+++ b/arch/arm/boot/dts/bcm53016-meraki-mr32.dts
@@ -182,7 +182,7 @@
fixed-link {
speed = <1000>;
- duplex-full;
+ full-duplex;
};
};
};

View File

@ -0,0 +1,61 @@
From 752a63b8dbe6cc6900efd1035bea427a778a4b55 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 2 Jun 2023 15:59:25 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Add Netgear R8000 WiFi regulator mappings
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This allows setting FullMAC firmware regulatory domain.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230602135925.14143-3-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/bcm4709-netgear-r8000.dts | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
--- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
+++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
@@ -137,8 +137,10 @@
#size-cells = <2>;
wifi@0,1,0 {
+ compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
reg = <0x0000 0 0 0 0>;
ieee80211-freq-limit = <5735000 5835000>;
+ brcm,ccode-map = "JP-JP-78", "US-Q2-86";
};
};
};
@@ -159,6 +161,19 @@
#address-cells = <3>;
#size-cells = <2>;
+ bridge@1,0 {
+ reg = <0x800 0 0 0 0>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ wifi@0,0 {
+ compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
+ reg = <0x0000 0 0 0 0>;
+ brcm,ccode-map = "JP-JP-78", "US-Q2-86";
+ };
+ };
+
bridge@1,2,2 {
reg = <0x1000 0 0 0 0>;
@@ -166,8 +181,10 @@
#size-cells = <2>;
wifi@1,4,0 {
+ compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
reg = <0x0000 0 0 0 0>;
ieee80211-freq-limit = <5170000 5730000>;
+ brcm,ccode-map = "JP-JP-78", "US-Q2-86";
};
};
};

View File

@ -0,0 +1,59 @@
From b67cad33176e472df6d16a24ee7624299bdcd5d5 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 16 Jun 2023 12:58:27 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Add cells sizes to PCIe nodes
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This fixes:
arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dtb: pcie@12000: '#address-cells' is a required property
From schema: /lib/python3.10/site-packages/dtschema/schemas/pci/pci-bus.yaml
arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dtb: pcie@12000: '#size-cells' is a required property
From schema: /lib/python3.10/site-packages/dtschema/schemas/pci/pci-bus.yaml
arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dtb: pcie@13000: '#address-cells' is a required property
From schema: /lib/python3.10/site-packages/dtschema/schemas/pci/pci-bus.yaml
arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dtb: pcie@13000: '#size-cells' is a required property
From schema: /lib/python3.10/site-packages/dtschema/schemas/pci/pci-bus.yaml
arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dtb: pcie@14000: '#address-cells' is a required property
From schema: /lib/python3.10/site-packages/dtschema/schemas/pci/pci-bus.yaml
arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dtb: pcie@14000: '#size-cells' is a required property
From schema: /lib/python3.10/site-packages/dtschema/schemas/pci/pci-bus.yaml
Two properties that need to be added later are "device_type" and
"ranges". Adding "device_type" on its own causes a new warning and the
value of "ranges" needs to be determined yet.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230616105827.21656-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/bcm-ns.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
--- a/arch/arm/boot/dts/bcm-ns.dtsi
+++ b/arch/arm/boot/dts/bcm-ns.dtsi
@@ -176,14 +176,23 @@
pcie0: pcie@12000 {
reg = <0x00012000 0x1000>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
};
pcie1: pcie@13000 {
reg = <0x00013000 0x1000>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
};
pcie2: pcie@14000 {
reg = <0x00014000 0x1000>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
};
usb2: usb2@21000 {

View File

@ -0,0 +1,37 @@
From 4b8e16de053fc88eac406ad63da2693dd8279043 Mon Sep 17 00:00:00 2001
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Date: Wed, 5 Jul 2023 17:01:07 +0200
Subject: [PATCH] ARM: dts: broadcom: add missing space before {
Add missing whitespace between node name/label and opening {.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230705150108.293999-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm47094-linksys-panamera.dts | 2 +-
arch/arm/boot/dts/broadcom/bcm47094-phicomm-k3.dts | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
@@ -279,7 +279,7 @@
reg = <0x080000 0x0100000>;
};
- partition@180000{
+ partition@180000 {
label = "devinfo";
reg = <0x0180000 0x080000>;
};
--- a/arch/arm/boot/dts/bcm47094-phicomm-k3.dts
+++ b/arch/arm/boot/dts/bcm47094-phicomm-k3.dts
@@ -55,7 +55,7 @@
reg = <0x0080000 0x0100000>;
};
- partition@180000{
+ partition@180000 {
label = "phicomm";
reg = <0x0180000 0x0280000>;
read-only;

View File

@ -0,0 +1,107 @@
From 8960f095de3b80beb3639075f0c8161b6ea98c61 Mon Sep 17 00:00:00 2001
From: Dan Haab <dan.haab@luxul.com>
Date: Wed, 5 Jul 2023 09:32:51 -0600
Subject: [PATCH] ARM: dts: BCM5301X: Add Wi-Fi regulatory mappings for Luxul
devices
This allows setting FullMAC firmware regulatory domain.
Signed-off-by: Dan Haab <dan.haab@luxul.com>
Link: https://lore.kernel.org/r/20230705153251.739236-1-riproute@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
.../dts/broadcom/bcm47094-luxul-xap-1610.dts | 37 +++++++++++++++++++
.../broadcom/bcm47094-luxul-xwr-3150-v1.dts | 36 ++++++++++++++++++
2 files changed, 73 insertions(+)
--- a/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts
@@ -64,6 +64,43 @@
nvmem-cell-names = "mac-address";
};
+
+&pcie0 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ bridge@0,0 {
+ reg = <0x0000 0 0 0 0>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ wifi@0,0 {
+ compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
+ reg = <0x0000 0 0 0 0>;
+ brcm,ccode-map = "AU-AU-920", "CA-CA-892", "GB-DE-964", "NZ-AU-920", "US-US-825";
+ };
+ };
+};
+
+&pcie1 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ bridge@0,0 {
+ reg = <0x0000 0 0 0 0>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ wifi@0,0 {
+ compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
+ reg = <0x0000 0 0 0 0>;
+ brcm,ccode-map = "AU-AU-920", "CA-CA-892", "GB-DE-964", "NZ-AU-920", "US-US-825";
+ };
+ };
+};
+
&spi_nor {
status = "okay";
};
--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
@@ -81,6 +81,42 @@
nvmem-cell-names = "mac-address";
};
+&pcie0 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ bridge@0,0 {
+ reg = <0x0000 0 0 0 0>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ wifi@0,0 {
+ compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
+ reg = <0x0000 0 0 0 0>;
+ brcm,ccode-map = "AU-AU-953", "CA-CA-946", "GB-E0-846", "NZ-AU-953", "US-Q2-930";
+ };
+ };
+};
+
+&pcie1 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ bridge@0,0 {
+ reg = <0x0000 0 0 0 0>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ wifi@0,0 {
+ compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
+ reg = <0x0000 0 0 0 0>;
+ brcm,ccode-map = "AU-AU-953", "CA-CA-946", "GB-E0-846", "NZ-AU-953", "US-Q2-930";
+ };
+ };
+};
+
&usb3 {
vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
};

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@ -0,0 +1,53 @@
From 2ce61fa62183cf994666fcc911da34075c7183b5 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 7 Jul 2023 11:15:19 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Add Ethernet interfaces links
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Northstar SoCs have 3 usable Ethernet interfaces each connected to one
of switch ports. They all use fixed links.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230707091519.21673-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm-ns.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
--- a/arch/arm/boot/dts/bcm-ns.dtsi
+++ b/arch/arm/boot/dts/bcm-ns.dtsi
@@ -272,14 +272,32 @@
gmac0: ethernet@24000 {
reg = <0x24000 0x800>;
+ phy-mode = "internal";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
};
gmac1: ethernet@25000 {
reg = <0x25000 0x800>;
+ phy-mode = "internal";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
};
gmac2: ethernet@26000 {
reg = <0x26000 0x800>;
+ phy-mode = "internal";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
};
gmac3: ethernet@27000 {

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@ -0,0 +1,57 @@
From be7e1e5b0f67c58ec4be0a54db23b6a4fa6e2116 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 7 Jul 2023 13:40:01 +0200
Subject: [PATCH] ARM: dts: BCM53573: Drop nonexistent "default-off" LED
trigger
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
There is no such trigger documented or implemented in Linux. It was a
copy & paste mistake.
This fixes:
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dtb: leds: led-wlan:linux,default-trigger: 'oneOf' conditional failed, one must be fixed:
'default-off' is not one of ['backlight', 'default-on', 'heartbeat', 'disk-activity', 'disk-read', 'disk-write', 'timer', 'pattern', 'audio-micmute', 'audio-mute', 'bluetooth-power', 'flash', 'kbd-capslock', 'mtd', 'nand-disk', 'none', 'torch', 'usb-gadget', 'usb-host', 'usbport']
'default-off' does not match '^cpu[0-9]*$'
'default-off' does not match '^hci[0-9]+-power$'
'default-off' does not match '^mmc[0-9]+$'
'default-off' does not match '^phy[0-9]+tx$'
From schema: Documentation/devicetree/bindings/leds/leds-gpio.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230707114004.2740-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dts | 1 -
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-810.dts | 2 --
2 files changed, 3 deletions(-)
--- a/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
@@ -26,7 +26,6 @@
led-wlan {
label = "bcm53xx:blue:wlan";
gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;
- linux,default-trigger = "default-off";
};
led-system {
--- a/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
@@ -26,7 +26,6 @@
led-5ghz {
label = "bcm53xx:blue:5ghz";
gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "default-off";
};
led-system {
@@ -42,7 +41,6 @@
led-2ghz {
label = "bcm53xx:blue:2ghz";
gpios = <&pcie0_chipcommon 3 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "default-off";
};
};

View File

@ -0,0 +1,32 @@
From 05d2c3d552b8c92fc397377d9d1112fc58e2cd59 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 7 Jul 2023 13:40:02 +0200
Subject: [PATCH] ARM: dts: BCM53573: Drop nonexistent #usb-cells
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Such property simply doesn't exist (is not documented or used anywhere).
This fixes:
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dtb: usb@d000: Unevaluated properties are not allowed ('#usb-cells' was unexpected)
From schema: Documentation/devicetree/bindings/usb/generic-ohci.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230707114004.2740-2-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm53573.dtsi | 2 --
1 file changed, 2 deletions(-)
--- a/arch/arm/boot/dts/bcm53573.dtsi
+++ b/arch/arm/boot/dts/bcm53573.dtsi
@@ -156,8 +156,6 @@
};
ohci: usb@d000 {
- #usb-cells = <0>;
-
compatible = "generic-ohci";
reg = <0xd000 0x1000>;
interrupt-parent = <&gic>;

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@ -0,0 +1,37 @@
From 3392ef368d9b04622fe758b1079b512664b6110a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 7 Jul 2023 13:40:03 +0200
Subject: [PATCH] ARM: dts: BCM53573: Add cells sizes to PCIe node
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This fixes:
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dtb: pcie@2000: '#address-cells' is a required property
From schema: /lib/python3.10/site-packages/dtschema/schemas/pci/pci-bus.yaml
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dtb: pcie@2000: '#size-cells' is a required property
From schema: /lib/python3.10/site-packages/dtschema/schemas/pci/pci-bus.yaml
Two properties that need to be added later are "device_type" and
"ranges". Adding "device_type" on its own causes a new warning and the
value of "ranges" needs to be determined yet.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230707114004.2740-3-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm53573.dtsi | 3 +++
1 file changed, 3 insertions(+)
--- a/arch/arm/boot/dts/bcm53573.dtsi
+++ b/arch/arm/boot/dts/bcm53573.dtsi
@@ -127,6 +127,9 @@
pcie0: pcie@2000 {
reg = <0x00002000 0x1000>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
};
usb2: usb2@4000 {

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@ -0,0 +1,44 @@
From 2c0fd6b3d0778ceab40205315ccef74568490f17 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 7 Jul 2023 13:40:04 +0200
Subject: [PATCH] ARM: dts: BCM53573: Use updated "spi-gpio" binding properties
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Switch away from deprecated properties.
This fixes:
arch/arm/boot/dts/broadcom/bcm947189acdbmr.dtb: spi: gpio-sck: False schema does not allow [[3, 21, 0]]
From schema: Documentation/devicetree/bindings/spi/spi-gpio.yaml
arch/arm/boot/dts/broadcom/bcm947189acdbmr.dtb: spi: gpio-miso: False schema does not allow [[3, 22, 0]]
From schema: Documentation/devicetree/bindings/spi/spi-gpio.yaml
arch/arm/boot/dts/broadcom/bcm947189acdbmr.dtb: spi: gpio-mosi: False schema does not allow [[3, 23, 0]]
From schema: Documentation/devicetree/bindings/spi/spi-gpio.yaml
arch/arm/boot/dts/broadcom/bcm947189acdbmr.dtb: spi: 'sck-gpios' is a required property
From schema: Documentation/devicetree/bindings/spi/spi-gpio.yaml
arch/arm/boot/dts/broadcom/bcm947189acdbmr.dtb: spi: Unevaluated properties are not allowed ('gpio-miso', 'gpio-mosi', 'gpio-sck' were unexpected)
From schema: Documentation/devicetree/bindings/spi/spi-gpio.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230707114004.2740-4-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm947189acdbmr.dts | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
--- a/arch/arm/boot/dts/bcm947189acdbmr.dts
+++ b/arch/arm/boot/dts/bcm947189acdbmr.dts
@@ -60,9 +60,9 @@
spi {
compatible = "spi-gpio";
num-chipselects = <1>;
- gpio-sck = <&chipcommon 21 0>;
- gpio-miso = <&chipcommon 22 0>;
- gpio-mosi = <&chipcommon 23 0>;
+ sck-gpios = <&chipcommon 21 0>;
+ miso-gpios = <&chipcommon 22 0>;
+ mosi-gpios = <&chipcommon 23 0>;
cs-gpios = <&chipcommon 24 0>;
#address-cells = <1>;
#size-cells = <0>;

View File

@ -0,0 +1,34 @@
From: Aleksey Nasibulin <alealexpro100@ya.ru>
Date: Wed, 12 Jul 2023 03:40:17 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Extend RAM to full 256MB for Linksys
EA6500 V2
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Linksys ea6500-v2 have 256MB of ram. Currently we only use 128MB.
Expand the definition to use all the available RAM.
Fixes: 03e96644d7a8 ("ARM: dts: BCM5301X: Add basic DT for Linksys EA6500 V2")
Signed-off-by: Aleksey Nasibulin <alealexpro100@ya.ru>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Cc: stable@vger.kernel.org
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230712014017.28123-1-ansuelsmth@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm4708-linksys-ea6500-v2.dts | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
+++ b/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
@@ -19,7 +19,8 @@
memory@0 {
device_type = "memory";
- reg = <0x00000000 0x08000000>;
+ reg = <0x00000000 0x08000000>,
+ <0x88000000 0x08000000>;
};
gpio-keys {

View File

@ -0,0 +1,72 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 13 Jul 2023 13:05:44 +0200
Subject: [PATCH] ARM: dts: BCM53573: Fix Ethernet info for Luxul devices
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Both Luxul's XAP devices (XAP-810 and XAP-1440) are access points that
use a non-default design. They don't include switch but have a single
Ethernet port and BCM54210E PHY connected to the Ethernet controller's
MDIO bus.
Support for those devices regressed due to two changes:
1. Describing MDIO bus with switch
After commit 9fb90ae6cae7 ("ARM: dts: BCM53573: Describe on-SoC BCM53125
rev 4 switch") Linux stopped probing for MDIO devices.
2. Dropping hardcoded BCM54210E delays
In commit fea7fda7f50a ("net: phy: broadcom: Fix RGMII delays
configuration for BCM54210E") support for other PHY modes was added but
that requires a proper "phy-mode" value in DT.
Both above changes are correct (they don't need to be reverted or
anything) but they need this fix for DT data to be correct and for Linux
to work properly.
Fixes: 9fb90ae6cae7 ("ARM: dts: BCM53573: Describe on-SoC BCM53125 rev 4 switch")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
.../boot/dts/broadcom/bcm47189-luxul-xap-1440.dts | 13 +++++++++++++
.../boot/dts/broadcom/bcm47189-luxul-xap-810.dts | 13 +++++++++++++
2 files changed, 26 insertions(+)
--- a/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
@@ -45,3 +45,16 @@
};
};
};
+
+&gmac0 {
+ phy-mode = "rgmii";
+ phy-handle = <&bcm54210e>;
+
+ mdio {
+ /delete-node/ switch@1e;
+
+ bcm54210e: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+};
--- a/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
@@ -81,3 +81,16 @@
};
};
};
+
+&gmac0 {
+ phy-mode = "rgmii";
+ phy-handle = <&bcm54210e>;
+
+ mdio {
+ /delete-node/ switch@1e;
+
+ bcm54210e: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+};

View File

@ -10,7 +10,7 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
--- a/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts
+++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts
@@ -93,3 +93,40 @@
@@ -92,3 +92,40 @@
&usb3_phy {
status = "okay";
};
@ -182,7 +182,7 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+};
--- a/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
+++ b/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
@@ -42,3 +42,40 @@
@@ -43,3 +43,40 @@
&usb3_phy {
status = "okay";
};

View File

@ -21,8 +21,8 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
max-brightness = <255>;
};
- green {
+ led_status: green {
- led-1 {
+ led_status: led-1 {
/* SYS-LED 1 - Tricolor */
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_GREEN>;

View File

@ -0,0 +1,84 @@
From b5375509184dc23d2b7fa0c5ed8763899ccc9674 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Sat, 2 Oct 2021 19:58:11 +0200
Subject: [PATCH] net: bgmac: improve handling PHY
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
1. Use info from DT if available
It allows describing for example a fixed link. It's more accurate than
just guessing there may be one (depending on a chipset).
2. Verify PHY ID before trying to connect PHY
PHY addr 0x1e (30) is special in Broadcom routers and means a switch
connected as MDIO devices instead of a real PHY. Don't try connecting to
it.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/broadcom/bgmac-bcma.c | 33 ++++++++++++++--------
1 file changed, 21 insertions(+), 12 deletions(-)
--- a/drivers/net/ethernet/broadcom/bgmac-bcma.c
+++ b/drivers/net/ethernet/broadcom/bgmac-bcma.c
@@ -11,6 +11,7 @@
#include <linux/bcma/bcma.h>
#include <linux/brcmphy.h>
#include <linux/etherdevice.h>
+#include <linux/of_mdio.h>
#include <linux/of_net.h>
#include "bgmac.h"
@@ -86,17 +87,28 @@ static int bcma_phy_connect(struct bgmac
struct phy_device *phy_dev;
char bus_id[MII_BUS_ID_SIZE + 3];
+ /* DT info should be the most accurate */
+ phy_dev = of_phy_get_and_connect(bgmac->net_dev, bgmac->dev->of_node,
+ bgmac_adjust_link);
+ if (phy_dev)
+ return 0;
+
/* Connect to the PHY */
- snprintf(bus_id, sizeof(bus_id), PHY_ID_FMT, bgmac->mii_bus->id,
- bgmac->phyaddr);
- phy_dev = phy_connect(bgmac->net_dev, bus_id, bgmac_adjust_link,
- PHY_INTERFACE_MODE_MII);
- if (IS_ERR(phy_dev)) {
- dev_err(bgmac->dev, "PHY connection failed\n");
- return PTR_ERR(phy_dev);
+ if (bgmac->mii_bus && bgmac->phyaddr != BGMAC_PHY_NOREGS) {
+ snprintf(bus_id, sizeof(bus_id), PHY_ID_FMT, bgmac->mii_bus->id,
+ bgmac->phyaddr);
+ phy_dev = phy_connect(bgmac->net_dev, bus_id, bgmac_adjust_link,
+ PHY_INTERFACE_MODE_MII);
+ if (IS_ERR(phy_dev)) {
+ dev_err(bgmac->dev, "PHY connection failed\n");
+ return PTR_ERR(phy_dev);
+ }
+
+ return 0;
}
- return 0;
+ /* Assume a fixed link to the switch port */
+ return bgmac_phy_connect_direct(bgmac);
}
static const struct bcma_device_id bgmac_bcma_tbl[] = {
@@ -297,10 +309,7 @@ static int bgmac_probe(struct bcma_devic
bgmac->cco_ctl_maskset = bcma_bgmac_cco_ctl_maskset;
bgmac->get_bus_clock = bcma_bgmac_get_bus_clock;
bgmac->cmn_maskset32 = bcma_bgmac_cmn_maskset32;
- if (bgmac->mii_bus)
- bgmac->phy_connect = bcma_phy_connect;
- else
- bgmac->phy_connect = bgmac_phy_connect_direct;
+ bgmac->phy_connect = bcma_phy_connect;
err = bgmac_enet_probe(bgmac);
if (err)

View File

@ -0,0 +1,54 @@
From 45c9d966688e7fad7f24bfc450547d91e4304d0b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Sat, 2 Oct 2021 19:58:12 +0200
Subject: [PATCH] net: bgmac: support MDIO described in DT
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Check ethernet controller DT node for "mdio" subnode and use it with
of_mdiobus_register() when present. That allows specifying MDIO and its
PHY devices in a standard DT based way.
This is required for BCM53573 SoC support. That family is sometimes
called Northstar (by marketing?) but is quite different from it. It uses
different CPU(s) and many different hw blocks.
One of shared blocks in BCM53573 is Ethernet controller. Switch however
is not SRAB accessible (as it Northstar) but is MDIO attached.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/broadcom/bgmac-bcma-mdio.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
--- a/drivers/net/ethernet/broadcom/bgmac-bcma-mdio.c
+++ b/drivers/net/ethernet/broadcom/bgmac-bcma-mdio.c
@@ -10,6 +10,7 @@
#include <linux/bcma/bcma.h>
#include <linux/brcmphy.h>
+#include <linux/of_mdio.h>
#include "bgmac.h"
static bool bcma_mdio_wait_value(struct bcma_device *core, u16 reg, u32 mask,
@@ -211,6 +212,7 @@ struct mii_bus *bcma_mdio_mii_register(s
{
struct bcma_device *core = bgmac->bcma.core;
struct mii_bus *mii_bus;
+ struct device_node *np;
int err;
mii_bus = mdiobus_alloc();
@@ -229,7 +231,9 @@ struct mii_bus *bcma_mdio_mii_register(s
mii_bus->parent = &core->dev;
mii_bus->phy_mask = ~(1 << bgmac->phyaddr);
- err = mdiobus_register(mii_bus);
+ np = of_get_child_by_name(core->dev.of_node, "mdio");
+
+ err = of_mdiobus_register(mii_bus, np);
if (err) {
dev_err(&core->dev, "Registration of mii bus failed\n");
goto err_free_bus;

View File

@ -0,0 +1,76 @@
From 327dabbd0111910a7d174b0b812d608d6b67bead Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 8 Aug 2022 23:05:25 +0200
Subject: [PATCH] bgmac: fix *initial* chip reset to support BCM5358
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
While bringing hardware up we should perform a full reset including the
switch bit (BGMAC_BCMA_IOCTL_SW_RESET aka SICF_SWRST). It's what
specification says and what reference driver does.
This seems to be critical for the BCM5358. Without this hardware doesn't
get initialized properly and doesn't seem to transmit or receive any
packets.
Originally bgmac was calling bgmac_chip_reset() before setting
"has_robosw" property which resulted in expected behaviour. That has
changed as a side effect of adding platform device support which
regressed BCM5358 support.
Fixes: f6a95a24957a ("net: ethernet: bgmac: Add platform device support")
Cc: Jon Mason <jdmason@kudzu.us>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
drivers/net/ethernet/broadcom/bgmac.c | 8 ++++++--
drivers/net/ethernet/broadcom/bgmac.h | 2 ++
2 files changed, 8 insertions(+), 2 deletions(-)
--- a/drivers/net/ethernet/broadcom/bgmac.c
+++ b/drivers/net/ethernet/broadcom/bgmac.c
@@ -890,13 +890,13 @@ static void bgmac_chip_reset_idm_config(
if (iost & BGMAC_BCMA_IOST_ATTACHED) {
flags = BGMAC_BCMA_IOCTL_SW_CLKEN;
- if (!bgmac->has_robosw)
+ if (bgmac->in_init || !bgmac->has_robosw)
flags |= BGMAC_BCMA_IOCTL_SW_RESET;
}
bgmac_clk_enable(bgmac, flags);
}
- if (iost & BGMAC_BCMA_IOST_ATTACHED && !bgmac->has_robosw)
+ if (iost & BGMAC_BCMA_IOST_ATTACHED && (bgmac->in_init || !bgmac->has_robosw))
bgmac_idm_write(bgmac, BCMA_IOCTL,
bgmac_idm_read(bgmac, BCMA_IOCTL) &
~BGMAC_BCMA_IOCTL_SW_RESET);
@@ -1489,6 +1489,8 @@ int bgmac_enet_probe(struct bgmac *bgmac
struct net_device *net_dev = bgmac->net_dev;
int err;
+ bgmac->in_init = true;
+
bgmac_chip_intrs_off(bgmac);
net_dev->irq = bgmac->irq;
@@ -1538,6 +1540,8 @@ int bgmac_enet_probe(struct bgmac *bgmac
net_dev->hw_features = net_dev->features;
net_dev->vlan_features = net_dev->features;
+ bgmac->in_init = false;
+
err = register_netdev(bgmac->net_dev);
if (err) {
dev_err(bgmac->dev, "Cannot register net device\n");
--- a/drivers/net/ethernet/broadcom/bgmac.h
+++ b/drivers/net/ethernet/broadcom/bgmac.h
@@ -511,6 +511,8 @@ struct bgmac {
int irq;
u32 int_mask;
+ bool in_init;
+
/* Current MAC state */
int mac_speed;
int mac_duplex;

View File

@ -0,0 +1,45 @@
From e7731194fdf085f46d58b1adccfddbd0dfee4873 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 7 Jul 2023 08:53:25 +0200
Subject: [PATCH] net: bgmac: postpone turning IRQs off to avoid SoC hangs
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Turning IRQs off is done by accessing Ethernet controller registers.
That can't be done until device's clock is enabled. It results in a SoC
hang otherwise.
This bug remained unnoticed for years as most bootloaders keep all
Ethernet interfaces turned on. It seems to only affect a niche SoC
family BCM47189. It has two Ethernet controllers but CFE bootloader uses
only the first one.
Fixes: 34322615cbaa ("net: bgmac: Mask interrupts during probe")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Michal Kubiak <michal.kubiak@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/broadcom/bgmac.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/drivers/net/ethernet/broadcom/bgmac.c
+++ b/drivers/net/ethernet/broadcom/bgmac.c
@@ -1491,8 +1491,6 @@ int bgmac_enet_probe(struct bgmac *bgmac
bgmac->in_init = true;
- bgmac_chip_intrs_off(bgmac);
-
net_dev->irq = bgmac->irq;
SET_NETDEV_DEV(net_dev, bgmac->dev);
dev_set_drvdata(bgmac->dev, bgmac);
@@ -1510,6 +1508,8 @@ int bgmac_enet_probe(struct bgmac *bgmac
*/
bgmac_clk_enable(bgmac, 0);
+ bgmac_chip_intrs_off(bgmac);
+
/* This seems to be fixing IRQ by assigning OOB #6 to the core */
if (!(bgmac->feature_flags & BGMAC_FEAT_IDM_MASK)) {
if (bgmac->feature_flags & BGMAC_FEAT_IRQ_ID_OOB_6)

View File

@ -14,7 +14,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
--- a/drivers/net/ethernet/broadcom/bgmac-bcma.c
+++ b/drivers/net/ethernet/broadcom/bgmac-bcma.c
@@ -268,6 +268,7 @@ static int bgmac_probe(struct bcma_devic
@@ -280,6 +280,7 @@ static int bgmac_probe(struct bcma_devic
bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
bgmac->feature_flags |= BGMAC_FEAT_NO_RESET;
bgmac->feature_flags |= BGMAC_FEAT_FORCE_SPEED_2500;
@ -50,7 +50,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
/**************************************************
* MII
**************************************************/
@@ -1538,6 +1550,14 @@ int bgmac_enet_probe(struct bgmac *bgmac
@@ -1540,6 +1552,14 @@ int bgmac_enet_probe(struct bgmac *bgmac
net_dev->hw_features = net_dev->features;
net_dev->vlan_features = net_dev->features;
@ -62,10 +62,10 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+ bgmac->b53_device = &bgmac_b53_dev;
+ }
+
bgmac->in_init = false;
err = register_netdev(bgmac->net_dev);
if (err) {
dev_err(bgmac->dev, "Cannot register net device\n");
@@ -1560,6 +1580,10 @@ EXPORT_SYMBOL_GPL(bgmac_enet_probe);
@@ -1564,6 +1584,10 @@ EXPORT_SYMBOL_GPL(bgmac_enet_probe);
void bgmac_enet_remove(struct bgmac *bgmac)
{
@ -86,7 +86,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
struct bgmac_slot_info {
union {
@@ -532,6 +533,9 @@ struct bgmac {
@@ -534,6 +535,9 @@ struct bgmac {
void (*cmn_maskset32)(struct bgmac *bgmac, u16 offset, u32 mask,
u32 set);
int (*phy_connect)(struct bgmac *bgmac);

View File

@ -506,7 +506,7 @@ Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
+MODULE_ALIAS("nf-flow-table-hw");
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
@@ -5802,6 +5802,13 @@ static int nf_tables_flowtable_parse_hoo
@@ -5805,6 +5805,13 @@ static int nf_tables_flowtable_parse_hoo
if (err < 0)
return err;
@ -520,7 +520,7 @@ Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
ops = kcalloc(n, sizeof(struct nf_hook_ops), GFP_KERNEL);
if (!ops)
return -ENOMEM;
@@ -5932,10 +5939,19 @@ static int nf_tables_newflowtable(struct
@@ -5935,10 +5942,19 @@ static int nf_tables_newflowtable(struct
}
flowtable->data.type = type;
@ -540,7 +540,7 @@ Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
err = nf_tables_flowtable_parse_hook(&ctx, nla[NFTA_FLOWTABLE_HOOK],
flowtable);
if (err < 0)
@@ -6061,7 +6077,8 @@ static int nf_tables_fill_flowtable_info
@@ -6064,7 +6080,8 @@ static int nf_tables_fill_flowtable_info
nla_put_string(skb, NFTA_FLOWTABLE_NAME, flowtable->name) ||
nla_put_be32(skb, NFTA_FLOWTABLE_USE, htonl(flowtable->use)) ||
nla_put_be64(skb, NFTA_FLOWTABLE_HANDLE, cpu_to_be64(flowtable->handle),

View File

@ -0,0 +1,523 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) 2021 Sartura Ltd.
*
* Driver for the SMSC/Microchip EMC2301/2/3/5 fan controller.
*
* Author: Robert Marko <robert.marko@sartura.hr>
*/
#include <linux/bitfield.h>
#include <linux/delay.h>
#include <linux/hwmon-sysfs.h>
#include <linux/hwmon.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/regmap.h>
#define MANUFACTURER_ID_REG 0xfe
#define SMSC_MANUFACTURER_ID 0x5d
#define PRODUCT_ID_REG 0xfd
#define EMC2305_PRODUCT_ID 0x34
#define EMC2303_PRODUCT_ID 0x35
#define EMC2302_PRODUCT_ID 0x36
#define EMC2301_PRODUCT_ID 0x37
#define PWM_OUTPUT_CONFIG 0x2b
#define TACH1_HIGH_BYTE 0x3e
#define TACH1_LOW_BYTE 0x3f
#define FAN1_DRIVE_SETTING 0x30
#define FAN1_CONFIG 0x32
#define FAN_CONFIG_ENAG_BIT BIT(7)
#define FAN_TACH_RANGE_MASK GENMASK(6, 5)
#define FAN_TACH_MULTIPLIER_8 3
#define FAN_TACH_MULTIPLIER_4 2
#define FAN_TACH_MULTIPLIER_2 1
#define FAN_TACH_MULTIPLIER_1 0
#define FAN_TACH_CONSTANT 3932160
#define FAN_TACH_READING_MASK GENMASK(15,3)
#define TACH1_TARGET_LOW_BYTE 0x3c
#define TACH1_TARGET_HIGH_BYTE 0x3d
#define TACH_TARGET_HIGH_MASK GENMASK(12,5)
#define TACH_TARGET_LOW_MASK GENMASK(4,0)
#define FANX_OFFSET 0x10
#define FAN_MAX_NUM 5
struct emc2305_fan_data {
u32 pwm_output_type;
};
struct emc2305_data {
struct regmap *regmap;
struct i2c_client *client;
struct emc2305_fan_data fan_data[FAN_MAX_NUM];
};
static struct regmap_config emc2305_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = 0xff,
};
static int emc2305_read_fan(struct emc2305_data *data, int channel,
long *val)
{
unsigned int regval, high_byte, low_byte;
u8 range, multiplier;
int ret;
ret = regmap_read(data->regmap,
FAN1_CONFIG + channel * FANX_OFFSET,
&regval);
if (ret < 0)
return ret;
range = FIELD_GET(FAN_TACH_RANGE_MASK, regval);
switch (range) {
case FAN_TACH_MULTIPLIER_8:
multiplier = 8;
break;
case FAN_TACH_MULTIPLIER_4:
multiplier = 4;
break;
case FAN_TACH_MULTIPLIER_2:
multiplier = 2;
break;
case FAN_TACH_MULTIPLIER_1:
multiplier = 1;
break;
default:
return -EINVAL;
}
ret = regmap_read(data->regmap,
TACH1_HIGH_BYTE + channel * FANX_OFFSET,
&high_byte);
if (ret < 0)
return ret;
ret = regmap_read(data->regmap,
TACH1_LOW_BYTE + channel * FANX_OFFSET,
&low_byte);
if (ret < 0)
return ret;
regval = (u8) high_byte << 8 | (u8) low_byte;
*val = (FAN_TACH_CONSTANT * multiplier) / FIELD_GET(FAN_TACH_READING_MASK, regval);
return 0;
}
static int emc2305_read_fan_target(struct emc2305_data *data, int channel,
long *val)
{
unsigned int regval;
int ret;
ret = regmap_bulk_read(data->regmap,
TACH1_TARGET_LOW_BYTE + channel * FANX_OFFSET,
&regval,
2);
if (ret < 0)
return ret;
*val = FIELD_GET(FAN_TACH_READING_MASK, regval);
return 0;
}
static int emc2305_set_fan_target(struct emc2305_data *data, int channel,
long val)
{
int ret;
ret = regmap_write(data->regmap,
TACH1_TARGET_LOW_BYTE + channel * FANX_OFFSET,
val & TACH_TARGET_LOW_MASK);
if (ret < 0)
return ret;
ret = regmap_write(data->regmap,
TACH1_TARGET_HIGH_BYTE + channel * FANX_OFFSET,
(val & TACH_TARGET_HIGH_MASK) >> 5);
if (ret < 0)
return ret;
return 0;
}
static int emc2305_get_pwm_enable(struct emc2305_data *data, int channel,
long *val)
{
unsigned int regval;
int ret;
ret = regmap_read(data->regmap,
FAN1_CONFIG + channel * FANX_OFFSET,
&regval);
if (ret < 0)
return ret;
switch (FIELD_GET(FAN_CONFIG_ENAG_BIT, regval)) {
case 0:
*val = 1;
break;
case 1:
*val = 2;
break;
default:
return -EINVAL;
}
return 0;
}
static int emc2305_set_pwm_enable(struct emc2305_data *data, int channel,
long val)
{
int ret;
switch (val) {
case 1:
ret = regmap_update_bits(data->regmap,
FAN1_CONFIG + channel * FANX_OFFSET,
FAN_CONFIG_ENAG_BIT,
0);
break;
case 2:
ret = regmap_update_bits(data->regmap,
FAN1_CONFIG + channel * FANX_OFFSET,
FAN_CONFIG_ENAG_BIT,
FAN_CONFIG_ENAG_BIT);
break;
default:
return -EINVAL;
}
return ret;
}
static int emc2305_get_pwm_input(struct emc2305_data *data, int channel,
long *val)
{
unsigned int regval;
int ret;
ret = regmap_read(data->regmap,
FAN1_DRIVE_SETTING + channel * FANX_OFFSET,
&regval);
if (ret < 0)
return ret;
*val = regval;
return 0;
}
static int emc2305_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
struct emc2305_data *data = dev_get_drvdata(dev);
int err;
switch (type) {
case hwmon_fan:
switch (attr) {
case hwmon_fan_target:
err = emc2305_set_fan_target(data, channel, val);
break;
default:
return -EOPNOTSUPP;
}
break;
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_enable:
err = emc2305_set_pwm_enable(data, channel, val);
break;
case hwmon_pwm_input:
if (val < 0 || val > 255) {
err = -EINVAL;
break;
}
err = regmap_write(data->regmap,
FAN1_DRIVE_SETTING + channel * FANX_OFFSET,
val);
break;
default:
return -EOPNOTSUPP;
}
break;
default:
return -EOPNOTSUPP;
}
return err;
}
static int emc2305_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
struct emc2305_data *data = dev_get_drvdata(dev);
int err;
switch (type) {
case hwmon_fan:
switch (attr) {
case hwmon_fan_input:
err = emc2305_read_fan(data, channel, val);
break;
case hwmon_fan_target:
err = emc2305_read_fan_target(data, channel, val);
break;
default:
return -EOPNOTSUPP;
}
break;
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_enable:
err = emc2305_get_pwm_enable(data, channel, val);
break;
case hwmon_pwm_input:
err = emc2305_get_pwm_input(data, channel, val);
break;
default:
return -EOPNOTSUPP;
}
break;
default:
return -EOPNOTSUPP;
}
return err;
}
static umode_t emc2305_is_visible(const void *data, enum hwmon_sensor_types type,
u32 attr, int channel)
{
switch (type) {
case hwmon_fan:
switch (attr) {
case hwmon_fan_input:
return 0444;
case hwmon_fan_target:
return 0644;
default:
return 0;
}
case hwmon_pwm:
switch (attr) {
case hwmon_pwm_enable:
case hwmon_pwm_input:
return 0644;
default:
return 0;
}
default:
return 0;
}
}
static const struct hwmon_channel_info *emc2301_info[] = {
HWMON_CHANNEL_INFO(fan,
HWMON_F_INPUT | HWMON_F_TARGET),
HWMON_CHANNEL_INFO(pwm,
HWMON_PWM_ENABLE | HWMON_PWM_INPUT),
NULL
};
static const struct hwmon_channel_info *emc2302_info[] = {
HWMON_CHANNEL_INFO(fan,
HWMON_F_INPUT | HWMON_F_TARGET,
HWMON_F_INPUT | HWMON_F_TARGET),
HWMON_CHANNEL_INFO(pwm,
HWMON_PWM_ENABLE | HWMON_PWM_INPUT,
HWMON_PWM_ENABLE | HWMON_PWM_INPUT),
NULL
};
static const struct hwmon_channel_info *emc2303_info[] = {
HWMON_CHANNEL_INFO(fan,
HWMON_F_INPUT | HWMON_F_TARGET,
HWMON_F_INPUT | HWMON_F_TARGET,
HWMON_F_INPUT | HWMON_F_TARGET),
HWMON_CHANNEL_INFO(pwm,
HWMON_PWM_ENABLE | HWMON_PWM_INPUT,
HWMON_PWM_ENABLE | HWMON_PWM_INPUT,
HWMON_PWM_ENABLE | HWMON_PWM_INPUT),
NULL
};
static const struct hwmon_channel_info *emc2305_info[] = {
HWMON_CHANNEL_INFO(fan,
HWMON_F_INPUT | HWMON_F_TARGET,
HWMON_F_INPUT | HWMON_F_TARGET,
HWMON_F_INPUT | HWMON_F_TARGET,
HWMON_F_INPUT | HWMON_F_TARGET,
HWMON_F_INPUT | HWMON_F_TARGET),
HWMON_CHANNEL_INFO(pwm,
HWMON_PWM_ENABLE | HWMON_PWM_INPUT,
HWMON_PWM_ENABLE | HWMON_PWM_INPUT,
HWMON_PWM_ENABLE | HWMON_PWM_INPUT,
HWMON_PWM_ENABLE | HWMON_PWM_INPUT,
HWMON_PWM_ENABLE | HWMON_PWM_INPUT),
NULL
};
static const struct hwmon_ops emc2305_hwmon_ops = {
.is_visible = emc2305_is_visible,
.write = emc2305_write,
.read = emc2305_read,
};
static struct hwmon_chip_info emc2305_chip_info = {
.ops = &emc2305_hwmon_ops,
};
static int emc2305_set_pwm_output_type(struct emc2305_data *data, u32 fan_id)
{
int value, ret;
if (data->fan_data[fan_id].pwm_output_type)
value = BIT(fan_id);
else
value = 0;
ret = regmap_update_bits(data->regmap,
PWM_OUTPUT_CONFIG,
BIT(fan_id),
value);
return ret;
}
static int emc2305_of_parse(struct device *dev, struct device_node *child,
struct emc2305_data *data)
{
u32 fan_id, pwm_output_type;
int ret;
ret = of_property_read_u32(child, "reg", &fan_id);
if (ret)
return ret;
ret = of_property_read_u32(child, "pwm-output-mode", &pwm_output_type);
if (ret)
pwm_output_type = 0;
if (pwm_output_type < 0 || pwm_output_type > 1)
return -EINVAL;
data->fan_data[fan_id].pwm_output_type = pwm_output_type;
return emc2305_set_pwm_output_type(data, fan_id);
}
static int emc2305_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct device_node *child;
struct emc2305_data *data;
struct device *hwmon_dev;
const char *model_name;
unsigned int regval;
int ret;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
i2c_set_clientdata(client, data);
data->regmap = devm_regmap_init_i2c(client, &emc2305_regmap_config);
if (IS_ERR(data->regmap)) {
dev_err(dev, "failed to allocate register map\n");
return PTR_ERR(data->regmap);
}
ret = regmap_read(data->regmap, MANUFACTURER_ID_REG, &regval);
if (ret < 0)
return ret;
if (regval != SMSC_MANUFACTURER_ID) {
dev_err(dev, "Invalid manufacturer id: 0x%x\n", regval);
return -ENODEV;
}
ret = regmap_read(data->regmap, PRODUCT_ID_REG, &regval);
if (ret < 0)
return ret;
switch (regval) {
case EMC2305_PRODUCT_ID:
model_name = "emc2305";
emc2305_chip_info.info = emc2305_info;
break;
case EMC2303_PRODUCT_ID:
model_name = "emc2303";
emc2305_chip_info.info = emc2303_info;
break;
case EMC2302_PRODUCT_ID:
model_name = "emc2302";
emc2305_chip_info.info = emc2302_info;
break;
case EMC2301_PRODUCT_ID:
model_name = "emc2301";
emc2305_chip_info.info = emc2301_info;
break;
default:
dev_err(dev, "Unknown ID detected: 0x%x\n", regval);
return -ENODEV;
}
dev_info(dev, "%s detected\n", model_name);
for_each_child_of_node(dev->of_node, child) {
ret = emc2305_of_parse(dev, child, data);
if (ret) {
of_node_put(child);
return ret;
}
}
hwmon_dev = devm_hwmon_device_register_with_info(dev, model_name,
data, &emc2305_chip_info,
NULL);
if (IS_ERR(hwmon_dev))
return PTR_ERR(hwmon_dev);
return 0;
}
static const struct of_device_id emc2305_of_match[] = {
{ .compatible = "smsc,emc2301", },
{ .compatible = "smsc,emc2302", },
{ .compatible = "smsc,emc2303", },
{ .compatible = "smsc,emc2305", },
{ },
};
MODULE_DEVICE_TABLE(of, emc2305_of_match);
static struct i2c_driver emc2305_driver = {
.probe_new = emc2305_probe,
.driver = {
.name = "emc2305",
.of_match_table = of_match_ptr(emc2305_of_match),
},
};
module_i2c_driver(emc2305_driver);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Robert Marko <robert.marko@sartura.hr>");
MODULE_DESCRIPTION("SMSC EMC2301/2/3/5 fan controller");

View File

@ -435,7 +435,7 @@ define Device/xiaomi_mi-router-hd
UBINIZE_OPTS := -E 5
IMAGES := factory.bin sysupgrade.bin
IMAGE/factory.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-ubi | pad-to $$$$(BLOCKSIZE) | check-size
DEVICE_PACKAGES := kmod-i2c-gpio kmod-hwmon-lm75 hwmon-drivetemp \
DEVICE_PACKAGES := kmod-i2c-gpio kmod-hwmon-emc2305 kmod-hwmon-lm75 hwmon-drivetemp \
kmod-usb-storage-uas ath10k-firmware-qca9984-ct ath10k-firmware-qca99x0-ct
endef
TARGET_DEVICES += xiaomi_mi-router-hd

View File

@ -14,3 +14,19 @@ define KernelPackage/phy-qcom-ipq806x-usb/description
endef
$(eval $(call KernelPackage,phy-qcom-ipq806x-usb))
define KernelPackage/hwmon-emc2305
TITLE:=SMSC EMC2301/2/3/5 fan controller
KCONFIG:=CONFIG_SENSORS_EMC2305
FILES:=$(LINUX_DIR)/drivers/hwmon/emc2305.ko
AUTOLOAD:=$(call AutoProbe,emc2305)
$(call AddDepends/hwmon,+kmod-i2c-core +kmod-thermal +kmod-regmap-i2c)
endef
define KernelPackage/hwmon-emc2305/description
Kernel module for SMSC EMC2301/EMC2302/EMC2303/EMC2305 fan controllers
endef
$(eval $(call KernelPackage,hwmon-emc2305))

View File

@ -0,0 +1,51 @@
From a58b73b20db06f91025c5c847fcf2b53e341a6ff Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Mon, 14 Jun 2021 19:01:14 +0200
Subject: [PATCH] hwmon: Add SMSC EMC2301/2/3/5 fan controller driver
Add support for SMSC EMC2305, EMC2303, EMC2302, EMC2301 fan controller
chips.
The driver primary supports the EMC2305 chip which provides RPM-based
PWM control and monitoring for up to 5 fans.
According to the SMSC data sheets the EMC2303, EMC2302 and EMC2301 chips
have basically the same functionality and register layout, but support
less fans and (in case of EMC2302 and EMC2301) less possible I2C addresses.
The driver supports them, too.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
drivers/hwmon/Kconfig | 11 +++++++++++
drivers/hwmon/Makefile | 1 +
2 files changed, 12 insertions(+)
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1601,6 +1601,17 @@ config SENSORS_EMC2103
This driver can also be built as a module. If so, the module
will be called emc2103.
+config SENSORS_EMC2305
+ tristate "SMSC EMC2305"
+ depends on I2C
+ select REGMAP_I2C
+ help
+ If you say yes here you get support for the fan monitoring
+ and control features of the SMSC EMC2301/2/3/5 chips.
+
+ This driver can also be built as a module. If so, the module
+ will be called emc2305.
+
config SENSORS_EMC6W201
tristate "SMSC EMC6W201"
depends on I2C
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -66,6 +66,7 @@ obj-$(CONFIG_SENSORS_DS620) += ds620.o
obj-$(CONFIG_SENSORS_DS1621) += ds1621.o
obj-$(CONFIG_SENSORS_EMC1403) += emc1403.o
obj-$(CONFIG_SENSORS_EMC2103) += emc2103.o
+obj-$(CONFIG_SENSORS_EMC2305) += emc2305.o
obj-$(CONFIG_SENSORS_EMC6W201) += emc6w201.o
obj-$(CONFIG_SENSORS_F71805F) += f71805f.o
obj-$(CONFIG_SENSORS_F71882FG) += f71882fg.o

View File

@ -87,7 +87,7 @@ Signed-off-by: Li Yang <leoyang.li@nxp.com>
}
/**
@@ -3994,6 +4010,7 @@ static int cgroup_add_file(struct cgroup
@@ -4008,6 +4024,7 @@ static int cgroup_add_file(struct cgroup
{
char name[CGROUP_FILE_NAME_MAX];
struct kernfs_node *kn;
@ -95,7 +95,7 @@ Signed-off-by: Li Yang <leoyang.li@nxp.com>
struct lock_class_key *key = NULL;
int ret;
@@ -4024,6 +4041,14 @@ static int cgroup_add_file(struct cgroup
@@ -4038,6 +4055,14 @@ static int cgroup_add_file(struct cgroup
spin_unlock_irq(&cgroup_file_kn_lock);
}

View File

@ -89,7 +89,7 @@ Signed-off-by: Li Yang <leoyang.li@nxp.com>
}
/**
@@ -4010,7 +3994,6 @@ static int cgroup_add_file(struct cgroup
@@ -4024,7 +4008,6 @@ static int cgroup_add_file(struct cgroup
{
char name[CGROUP_FILE_NAME_MAX];
struct kernfs_node *kn;
@ -97,7 +97,7 @@ Signed-off-by: Li Yang <leoyang.li@nxp.com>
struct lock_class_key *key = NULL;
int ret;
@@ -4041,14 +4024,6 @@ static int cgroup_add_file(struct cgroup
@@ -4055,14 +4038,6 @@ static int cgroup_add_file(struct cgroup
spin_unlock_irq(&cgroup_file_kn_lock);
}