mediatek: add BPI-R3MINI-NAND 110M Layout (#185)

This commit is contained in:
potatoigit 2023-12-05 23:06:06 +08:00 committed by GitHub
parent 4a5fefb8ec
commit 72034420c2
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 401 additions and 0 deletions

View File

@ -0,0 +1,43 @@
/ {
nmbm_spim_nand {
compatible = "generic,nmbm";
#address-cells = <1>;
#size-cells = <1>;
lower-mtd-device = <&spi_nand>;
forced-create;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "BL2";
reg = <0x00000 0x0100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x0100000 0x0080000>;
};
factory: partition@180000 {
label = "zerofact0ry";
reg = <0x180000 0x0200000>;
};
partition@380000 {
label = "FIP";
reg = <0x380000 0x0200000>;
};
partition@580000 {
label = "ubi";
reg = <0x580000 0x6c00000>;
};
};
};
};

View File

@ -0,0 +1,338 @@
/dts-v1/;
#include "mt7986a.dtsi"
#include "mt7986a-pinctrl.dtsi"
#include "mt7986-spim-nand-partition-bpir3_mini-110m.dtsi"
/ {
model = "Bananapi BPI-R3MINI 110M Layout";
compatible = "bananapi,bpi-r3mini", "mediatek,mt7986a";
chosen {
bootargs = "console=ttyS0,115200n1 loglevel=8 \
earlycon=uart8250,mmio32,0x11002000";
};
memory {
reg = <0 0x40000000 0 0x10000000>;
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
sound {
compatible = "mediatek,mt7986-wm8960-machine";
mediatek,platform = <&afe>;
audio-routing = "Headphone", "HP_L",
"Headphone", "HP_R",
"LINPUT1", "AMIC",
"RINPUT1", "AMIC";
mediatek,audio-codec = <&wm8960>;
status = "okay";
};
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm0_pin &pwm1_pin_g1>;
status = "okay";
};
&uart0 {
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "disabled";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c_pins>;
status = "okay";
/* MAC Address EEPROM */
eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
address-bits = <8>;
page-size = <8>;
size = <256>;
};
wm8960: wm8960@1a {
compatible = "wlf,wm8960";
reg = <0x1a>;
};
};
&auxadc {
status = "okay";
};
&watchdog {
status = "okay";
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
phy14: phy@14 {
/* EN8811H PHY ID */
compatible = "ethernet-phy-id03a2.a411";
/* PHY Address */
reg = <14>;
reset-gpios = <&pio 49 1>; /* GPIO49 */
reset-assert-us = <10000>;
reset-deassert-us = <20000>;
phy-mode = "2500base-x";
full-duplex;
pause;
};
phy15: phy@15 {
/* EN8811H PHY ID */
compatible = "ethernet-phy-id03a2.a411";
/* PHY Address */
reg = <15>;
reset-gpios = <&pio 47 1>; /* GPIO47 */
reset-assert-us = <10000>;
reset-deassert-us = <20000>;
phy-mode = "2500base-x";
full-duplex;
pause;
};
};
};
&hnat {
mtketh-wan = "eth1";
mtketh-lan = "eth0";
mtketh-max-gmac = <2>;
status = "okay";
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi_flash_pins>;
cs-gpios = <0>, <0>;
status = "okay";
spi_nor@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <20000000>;
spi-tx-buswidth = <4>;
spi-rx-buswidth = <4>;
};
spi_nand: spi_nand@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <1>;
spi-max-frequency = <20000000>;
spi-tx-buswidth = <4>;
spi-rx-buswidth = <4>;
};
};
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spic_pins_g2>;
status = "okay";
};
&mmc0 {
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc0_pins_default>;
pinctrl-1 = <&mmc0_pins_uhs>;
bus-width = <8>;
max-frequency = <200000000>;
cap-mmc-highspeed;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
hs400-ds-delay = <0x14014>;
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_1p8v>;
non-removable;
no-sd;
no-sdio;
status = "okay";
};
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pins>;
status = "okay";
};
&wbsys {
mediatek,mtd-eeprom = <&factory 0x0000>;
status = "okay";
pinctrl-names = "default", "dbdc";
pinctrl-0 = <&wf_2g_5g_pins>;
pinctrl-1 = <&wf_dbdc_pins>;
};
&pio {
mmc0_pins_default: mmc0-pins-50-to-61-default {
mux {
function = "flash";
groups = "emmc_51";
};
conf-cmd-dat {
pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
drive-strength = <MTK_DRIVE_4mA>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
drive-strength = <MTK_DRIVE_6mA>;
mediatek,pull-down-adv = <2>; /* pull-down 50K */
};
conf-ds {
pins = "EMMC_DSL";
mediatek,pull-down-adv = <2>; /* pull-down 50K */
};
conf-rst {
pins = "EMMC_RSTB";
drive-strength = <MTK_DRIVE_4mA>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
};
};
mmc0_pins_uhs: mmc0-pins-50-to-61-uhs {
mux {
function = "flash";
groups = "emmc_51";
};
conf-cmd-dat {
pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
drive-strength = <MTK_DRIVE_4mA>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
drive-strength = <MTK_DRIVE_6mA>;
mediatek,pull-down-adv = <2>; /* pull-down 50K */
};
conf-ds {
pins = "EMMC_DSL";
mediatek,pull-down-adv = <2>; /* pull-down 50K */
};
conf-rst {
pins = "EMMC_RSTB";
drive-strength = <MTK_DRIVE_4mA>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
};
};
spi_flash_pins: spi-flash-pins-33-to-38 {
mux {
function = "flash";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <MTK_DRIVE_8mA>;
mediatek,pull-up-adv = <0>; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <MTK_DRIVE_8mA>;
mediatek,pull-down-adv = <0>; /* bias-disable */
};
};
wf_2g_5g_pins: wf_2g_5g-pins {
mux {
function = "wifi";
groups = "wf_2g", "wf_5g";
};
conf {
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <MTK_DRIVE_4mA>;
};
};
wf_dbdc_pins: wf_dbdc-pins {
mux {
function = "wifi";
groups = "wf_dbdc";
};
conf {
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <MTK_DRIVE_4mA>;
};
};
};

View File

@ -416,6 +416,26 @@ define Device/BPI-R3MINI-NAND
endef
TARGET_DEVICES += BPI-R3MINI-NAND
define Device/BPI-R3MINI-NAND-110M
DEVICE_VENDOR := Banana Pi
DEVICE_MODEL := Banana Pi R3MINI
DEVICE_TITLE := MTK7986a BPI R3MINI NAND 110M Layout
DEVICE_DTS := mt7986a-bananapi-bpi-r3mini-nand-110m
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
DEVICE_PACKAGES := $(MT7986_USB_PKGS) $(MT7986_WWAN_PKGS) \
kmod-phy-air-en8811h bpir3_mini-properties pciutils
SUPPORTED_DEVICES := bananapi,bpi-r3mini
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
IMAGE_SIZE := 110592k
KERNEL_IN_UBI := 1
IMAGES += factory.bin
IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE)
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
TARGET_DEVICES += BPI-R3MINI-NAND-110M
define Device/BPI-R3MINI-EMMC
DEVICE_VENDOR := Banana Pi
DEVICE_MODEL := Banana Pi R3MINI