Backups/immortalwrt-mt798x
1
0
Fork 0
mirror of https://github.com/hanwckf/immortalwrt-mt798x.git synced 2025-01-10 19:12:33 +08:00
Code Issues Actions Packages Projects Releases Wiki Activity

ath79: set mib-poll-interval on mdio0 attached ar83xx switch

Browse Source 
Commit "generic: ar8216: add mib_poll_interval switch attribute" sets
mib-poll-interval as disabled by default (was set to 2s), so it makes
switch LEDs trigger disfunctional on devices which don't have
mib-poll-interval set.

So this patch sets mib-poll-interval to 500ms on devices which have
ar83xx switch connected to mdio0 bus, as the same value was set for
built in switches in 443fc9ac35 ("ath79: use ar8216 for builtin
switch").

Some measurements performed on TP-Link Archer C7-v5:

 mib-type=0, mib-poll-interval=500ms (10s pidstat)

  Average:  %usr %system  %guest   %wait    %CPU   CPU  Command
  Average:  0.00    1.93    0.00    0.00    1.93     -  kworker/0:2

  iperf3 (30s): 334 Mbits/sec

 mib-type=0, mib-poll-interval=2s (10s pidstat)

  Average:  %usr %system  %guest   %wait    %CPU   CPU  Command
  Average:  0.00    1.14    0.00    0.00    1.14     -  kworker/0:2

  iperf3 (30s): 334 Mbits/sec

So it seems like we get 4x faster LED refresh rate for additional 0.8%
CPU load.

Signed-off-by: Petr Štetiar <ynezz@true.cz>
This commit is contained in:
Petr Štetiar 2019-04-14 17:26:04 +02:00
parent aac8b52184
commit 6648e9458f
6 changed files with 6 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
target/linux/ath79/dts/qca9563_dlink_dir-859-a1.dts
View File

@ -149,6 +149,7 @@
phy0: ethernet-phy@0 { phy0: ethernet-phy@0 {
reg = <0>; reg = <0>;
phy-mode = "sgmii"; phy-mode = "sgmii";
qca,mib-poll-interval = <500>;
qca,ar8327-initvals = < qca,ar8327-initvals = <
0x04 0x00080080 /* PORT0 PAD MODE CTRL */ 0x04 0x00080080 /* PORT0 PAD MODE CTRL */

1
target/linux/ath79/dts/qca9563_tplink_archer-c2-v3.dts
View File

@ -159,6 +159,7 @@
phy0: ethernet-phy@0 { phy0: ethernet-phy@0 {
reg = <0>; reg = <0>;
phy-mode = "sgmii"; phy-mode = "sgmii";
qca,mib-poll-interval = <500>;
qca,ar8327-initvals = < qca,ar8327-initvals = <
0x04 0x00080080 /* PORT0 PAD MODE CTRL */ 0x04 0x00080080 /* PORT0 PAD MODE CTRL */

1
target/linux/ath79/dts/qca9563_tplink_archer-c7-v4.dts
View File

@ -245,6 +245,7 @@
phy0: ethernet-phy@0 { phy0: ethernet-phy@0 {
reg = <0>; reg = <0>;
phy-mode = "sgmii"; phy-mode = "sgmii";
qca,mib-poll-interval = <500>;
qca,ar8327-initvals = < qca,ar8327-initvals = <
0x04 0x80080080 /* PORT0 PAD MODE CTRL */ 0x04 0x80080080 /* PORT0 PAD MODE CTRL */

1
target/linux/ath79/dts/qca9563_tplink_archer-x6-v2.dtsi
View File

@ -146,6 +146,7 @@
phy0: ethernet-phy@0 { phy0: ethernet-phy@0 {
reg = <0>; reg = <0>;
phy-mode = "sgmii"; phy-mode = "sgmii";
qca,mib-poll-interval = <500>;
qca,ar8327-initvals = < qca,ar8327-initvals = <
0x04 0x00080080 /* PORT0 PAD MODE CTRL */ 0x04 0x00080080 /* PORT0 PAD MODE CTRL */

1
target/linux/ath79/dts/qca9563_tplink_archer-x7-v5.dtsi
View File

@ -156,6 +156,7 @@
phy0: ethernet-phy@0 { phy0: ethernet-phy@0 {
reg = <0>; reg = <0>;
phy-mode = "sgmii"; phy-mode = "sgmii";
qca,mib-poll-interval = <500>;
qca,ar8327-initvals = < qca,ar8327-initvals = <
0x04 0x80080080 /* PORT0 PAD MODE CTRL */ 0x04 0x80080080 /* PORT0 PAD MODE CTRL */

1
target/linux/ath79/dts/qca9563_tplink_tl-wr1043n.dtsi
View File

@ -103,6 +103,7 @@
phy0: ethernet-phy@0 { phy0: ethernet-phy@0 {
reg = <0>; reg = <0>;
phy-mode = "sgmii"; phy-mode = "sgmii";
qca,mib-poll-interval = <500>;
qca,ar8327-initvals = < qca,ar8327-initvals = <
0x04 0x00080080 /* PORT0 PAD MODE CTRL */ 0x04 0x00080080 /* PORT0 PAD MODE CTRL */