Merge Official Source

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>

package/base-files/files/etc/shinit

@@ -22,7 +22,7 @@ service() {
 			printf "%-30s\t%10s\t%10s\n"  "$F" \
 			$( $($F enabled) && echo "enabled" || echo "disabled" ) \
 			$( [ "$(ubus call service list "{ 'verbose': true, 'name': '$(basename $F)' }" \
-			| jsonfilter -q -e "@.$(basename $F).instances[*].running")" = "true" ] \
+			| jsonfilter -q -e "@.$(basename $F).instances[*].running" | uniq)" = "true" ] \
 			&& echo "running" || echo "stopped" )
 		done;
 		return 1

package/boot/uboot-envtools/files/mvebu

@@ -14,6 +14,9 @@ touch /etc/config/ubootenv
 board=$(board_name)
 
 case "$board" in
+buffalo,ls421de)
+	ubootenv_add_uci_config "/dev/mtd3" "0x0" "0x10000"
+	;;
 cznic,turris-omnia)
 	if grep -q 'U-Boot 2015.10-rc2' /dev/mtd0; then
 		ubootenv_add_uci_config "/dev/mtd0" "0xc0000" "0x10000" "0x40000"

package/boot/uboot-envtools/files/realtek

@@ -11,6 +11,9 @@ case "$board" in
 d-link,dgs-1210-16|\
 d-link,dgs-1210-28|\
 d-link,dgs-1210-10p|\
+zyxel,gs1900-8|\
+zyxel,gs1900-8hp-v1|\
+zyxel,gs1900-8hp-v2|\
 zyxel,gs1900-10hp)
 	idx="$(find_mtd_index u-boot-env)"
 	[ -n "$idx" ] && \

package/boot/uboot-imx6/Makefile

@@ -24,6 +24,7 @@ define U-Boot/apalis_imx6
   NAME:=Toradex Apalis
   UBOOT_IMAGE:=SPL u-boot.img u-boot-with-spl.imx
   UBOOT_MAKE_FLAGS:=SPL u-boot.img u-boot-with-spl.imx
+  BUILD_DEVICES:=apalis
 endef
 
 define U-Boot/mx6cuboxi

package/network/services/umdns/files/umdns.json

@@ -3,40 +3,44 @@
 	"syscalls": [
 		{
 			"names": [
-				"read",
-				"write",
-				"writev",
-				"open",
-				"close",
-				"time",
-				"brk",
-				"ioctl",
-				"uname",
 				"bind",
+				"brk",
+				"clock_gettime",
+				"close",
 				"connect",
-				"getsockname",
-				"recvmsg",
-				"recvfrom",
-				"sendmsg",
-				"sendto",
-				"setsockopt",
-				"socket",
-				"pipe",
-				"poll",
-				"fcntl64",
 				"epoll_create",
 				"epoll_create1",
 				"epoll_ctl",
-				"epoll_wait",
 				"epoll_pwait",
-				"rt_sigaction",
-				"sigreturn",
-				"rt_sigreturn",
-				"rt_sigprocmask",
-				"exit_group",
+				"epoll_wait",
 				"exit",
+				"exit_group",
 				"fcntl",
-				"clock_gettime"
+				"fcntl64",
+				"fstat",
+				"getsockname",
+				"ioctl",
+				"open",
+				"openat",
+				"pipe",
+				"pipe2",
+				"poll",
+				"ppoll",
+				"read",
+				"recvfrom",
+				"recvmsg",
+				"rt_sigaction",
+				"rt_sigprocmask",
+				"rt_sigreturn",
+				"sendmsg",
+				"sendto",
+				"setsockopt",
+				"sigreturn",
+				"socket",
+				"time",
+				"uname",
+				"write",
+				"writev"
 			],
 			"action": "SCMP_ACT_ALLOW"
 		}

package/system/zram-swap/files/zram.init

@@ -150,6 +150,11 @@ zram_compact()
 
 start()
 {
+	[ -e /proc/swaps ] || {
+		logger -s -t zram_start -p daemon.crit "kernel doesn't support swap"
+		return 1
+	}
+
 	if [ $( grep -cs zram /proc/swaps ) -ne 0 ]; then
 		logger -s -t zram_start -p daemon.notice "[OK] zram swap is already mounted"
 		return 1

target/linux/ath79/dts/qca9563_tplink_eap2x5-1port.dtsi

@@ -112,6 +112,7 @@
 
 	phy-handle = <&phy4>;
 	phy-mode = "sgmii";
+	pll-data = <0x03000000 0x00000101 0x00001313>;
 
 	mtd-mac-address = <&info 0x8>;
 

target/linux/ath79/dts/qca9563_ubnt_unifiac-lite.dtsi

@@ -24,4 +24,6 @@
 	mtd-mac-address = <&art 0x0>;
 	phy-mode = "sgmii";
 	phy-handle = <&phy4>;
+
+	pll-data = <0x03000000 0x00000101 0x00001313>;
 };

target/linux/mvebu/cortexa53/base-files/lib/upgrade/platform.sh

@@ -9,6 +9,7 @@ REQUIRE_IMAGE_METADATA=1
 
 platform_check_image() {
 	case "$(board_name)" in
+	glinet,gl-mv1000|\
 	globalscale,espressobin|\
 	globalscale,espressobin-emmc|\
 	globalscale,espressobin-ultra|\
@@ -24,6 +25,7 @@ platform_check_image() {
 
 platform_do_upgrade() {
 	case "$(board_name)" in
+	glinet,gl-mv1000|\
 	globalscale,espressobin|\
 	globalscale,espressobin-emmc|\
 	globalscale,espressobin-ultra|\
@@ -41,6 +43,7 @@ platform_do_upgrade() {
 }
 platform_copy_config() {
 	case "$(board_name)" in
+	glinet,gl-mv1000|\
 	globalscale,espressobin|\
 	globalscale,espressobin-emmc|\
 	globalscale,espressobin-ultra|\

target/linux/mvebu/patches-5.10/317-armada-370-dts-fix-crypto-engine.patch

@@ -0,0 +1,29 @@
+--- a/arch/arm/boot/dts/armada-370.dtsi
++++ b/arch/arm/boot/dts/armada-370.dtsi
+@@ -234,7 +234,7 @@
+ 				clocks = <&gateclk 23>;
+ 				clock-names = "cesa0";
+ 				marvell,crypto-srams = <&crypto_sram>;
+-				marvell,crypto-sram-size = <0x7e0>;
++				marvell,crypto-sram-size = <0x800>;
+ 			};
+ 		};
+ 
+@@ -255,12 +255,17 @@
+ 			 * cpuidle workaround.
+ 			 */
+ 			idle-sram@0 {
++				status = "disabled";
+ 				reg = <0x0 0x20>;
+ 			};
+ 		};
+ 	};
+ };
+ 
++&coherencyfab {
++	broken-idle;
++};
++
+ /*
+  * Default UART pinctrl setting without RTS/CTS, can be overwritten on
+  * board level if a different configuration is used.

target/linux/mvebu/patches-5.4/320-armada-370-dts-fix-crypto-engine.patch

@@ -0,0 +1,29 @@
+--- a/arch/arm/boot/dts/armada-370.dtsi
++++ b/arch/arm/boot/dts/armada-370.dtsi
+@@ -234,7 +234,7 @@
+ 				clocks = <&gateclk 23>;
+ 				clock-names = "cesa0";
+ 				marvell,crypto-srams = <&crypto_sram>;
+-				marvell,crypto-sram-size = <0x7e0>;
++				marvell,crypto-sram-size = <0x800>;
+ 			};
+ 		};
+ 
+@@ -255,12 +255,17 @@
+ 			 * cpuidle workaround.
+ 			 */
+ 			idle-sram@0 {
++				status = "disabled";
+ 				reg = <0x0 0x20>;
+ 			};
+ 		};
+ 	};
+ };
+ 
++&coherencyfab {
++	broken-idle;
++};
++
+ /*
+  * Default UART pinctrl setting without RTS/CTS, can be overwritten on
+  * board level if a different configuration is used.

target/linux/ramips/dts/mt7621_xiaomi_mi-router-4a-3g-v2.dtsi

@@ -49,7 +49,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <50000000>;
 		m25p,fast-read;
 
 		partitions {

target/linux/ramips/files/drivers/net/ethernet/ralink/mt7530.c

@@ -290,9 +290,11 @@ mt7530_r32(struct mt7530_priv *priv, u32 reg)
 	if (priv->bus) {
 		u16 high, low;
 
-		mdiobus_write(priv->bus, 0x1f, 0x1f, (reg >> 6) & 0x3ff);
-		low = mdiobus_read(priv->bus, 0x1f, (reg >> 2) & 0xf);
-		high = mdiobus_read(priv->bus, 0x1f, 0x10);
+		mutex_lock(&priv->bus->mdio_lock);
+		__mdiobus_write(priv->bus, 0x1f, 0x1f, (reg >> 6) & 0x3ff);
+		low = __mdiobus_read(priv->bus, 0x1f, (reg >> 2) & 0xf);
+		high = __mdiobus_read(priv->bus, 0x1f, 0x10);
+		mutex_unlock(&priv->bus->mdio_lock);
 
 		return (high << 16) | (low & 0xffff);
 	}
@@ -307,9 +309,11 @@ static void
 mt7530_w32(struct mt7530_priv *priv, u32 reg, u32 val)
 {
 	if (priv->bus) {
-		mdiobus_write(priv->bus, 0x1f, 0x1f, (reg >> 6) & 0x3ff);
-		mdiobus_write(priv->bus, 0x1f, (reg >> 2) & 0xf,  val & 0xffff);
-		mdiobus_write(priv->bus, 0x1f, 0x10, val >> 16);
+		mutex_lock(&priv->bus->mdio_lock);
+		__mdiobus_write(priv->bus, 0x1f, 0x1f, (reg >> 6) & 0x3ff);
+		__mdiobus_write(priv->bus, 0x1f, (reg >> 2) & 0xf,  val & 0xffff);
+		__mdiobus_write(priv->bus, 0x1f, 0x10, val >> 16);
+		mutex_unlock(&priv->bus->mdio_lock);
 		return;
 	}
 

target/linux/ramips/image/mt7621.mk

@@ -845,6 +845,7 @@ TARGET_DEVICES += mikrotik_routerboard-m33g
 
 define Device/mqmaker_witi
   $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
   IMAGE_SIZE := 16064k
   DEVICE_VENDOR := MQmaker
   DEVICE_MODEL := WiTi
@@ -856,6 +857,7 @@ TARGET_DEVICES += mqmaker_witi
 
 define Device/mtc_wr1201
   $(Device/dsa-migration)
+  $(Device/uimage-lzma-loader)
   IMAGE_SIZE := 16000k
   DEVICE_VENDOR := MTC
   DEVICE_MODEL := Wireless Router WR1201

target/linux/ramips/image/rt305x.mk

@@ -1196,6 +1196,7 @@ endef
 TARGET_DEVICES += zyxel_keenetic
 
 define Device/zyxel_keenetic-lite-b
+  $(Device/uimage-lzma-loader)
   SOC := rt5350
   IMAGE_SIZE := 7872k
   DEVICE_VENDOR := ZyXEL

target/linux/realtek/config-5.4

@@ -82,6 +82,7 @@ CONFIG_HAS_DMA=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT_MAP=y
 # CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_HWMON=y
 CONFIG_HZ=250
 CONFIG_HZ_250=y
 CONFIG_HZ_PERIODIC=y
@@ -101,6 +102,7 @@ CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=256
 CONFIG_LIBFDT=y
 CONFIG_LOCK_DEBUGGING_SUPPORT=y
+CONFIG_MARVELL_PHY=y
 CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
 CONFIG_MDIO_I2C=y
@@ -159,6 +161,7 @@ CONFIG_PINCTRL=y
 CONFIG_POWER_RESET=y
 CONFIG_POWER_RESET_SYSCON=y
 CONFIG_PSB6970_PHY=y
+CONFIG_REALTEK_PHY=y
 CONFIG_REGMAP=y
 CONFIG_REGMAP_MMIO=y
 CONFIG_RESET_CONTROLLER=y

target/linux/realtek/dts/rtl8380_netgear_gigabit.dtsi

@@ -47,31 +47,30 @@
 			#size-cells = <1>;
 
 			partition@0 {
-				label = "loader";
+				label = "u-boot";
 				reg = <0x0000000 0x00e0000>;
 				read-only;
 			};
 
 			partition@e0000 {
-				label = "bdinfo";
+				label = "u-boot-env";
 				reg = <0x00e0000 0x0010000>;
 				read-only;
 			};
 
 			partition@f0000 {
-				label = "sysinfo";
+				label = "u-boot-env2";
 				reg = <0x00f0000 0x0010000>;
-				read-only;
 			};
 
 			partition@100000 {
-				label = "jffs2_cfg";
+				label = "jffs";
 				reg = <0x0100000 0x0100000>;
 				read-only;
 			};
 
 			partition@200000 {
-				label = "jffs2_log";
+				label = "jffs2";
 				reg = <0x0200000 0x0100000>;
 				read-only;
 			};

target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts

@@ -17,7 +17,7 @@
 	};
 
 	sfp0: sfp-p9 {
-		compatible = "_sff,sfp";
+		compatible = "sff,sfp";
 		i2c-bus = <&i2c0>;
 		los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
 		tx-fault-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
@@ -36,7 +36,7 @@
 	};
 
 	sfp1: sfp-p10 {
-		compatible = "_sff,sfp";
+		compatible = "sff,sfp";
 		i2c-bus = <&i2c1>;
 		los-gpio = <&gpio1 33 GPIO_ACTIVE_HIGH>;
 		tx-fault-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
@@ -55,29 +55,17 @@
 		port@24 {
 			reg = <24>;
 			label = "lan9";
-			phy-mode = "rgmii-id";
-			phy-handle = <&phy24>;
+			phy-mode = "1000base-x";
+			managed = "in-band-status";
 			sfp = <&sfp0>;
-
-			fixed-link {
-				speed = <1000>;
-				full-duplex;
-				pause;
-			};
 		};
 
 		port@26 {
 			reg = <26>;
 			label = "lan10";
-			phy-mode = "rgmii-id";
-			phy-handle = <&phy26>;
+			phy-mode = "1000base-x";
+			managed = "in-band-status";
 			sfp = <&sfp1>;
-
-			fixed-link {
-				speed = <1000>;
-				full-duplex;
-				pause;
-			};
 		};
 	};
 };

target/linux/realtek/dts/rtl8380_zyxel_gs1900-8.dts

@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "rtl8380_zyxel_gs1900.dtsi"
+
+/ {
+	compatible = "zyxel,gs1900-8", "realtek,rtl838x-soc";
+	model = "ZyXEL GS1900-8 Switch";
+};
+
+&gpio1 {
+	/delete-node/ poe_enable;
+};

target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi

@@ -79,7 +79,6 @@
 			partition@50000 {
 				label = "u-boot-env2";
 				reg = <0x50000 0x10000>;
-				read-only;
 			};
 			partition@60000 {
 				label = "jffs";

target/linux/realtek/dts/rtl8382_allnet_all-sg8208m.dts

@@ -79,7 +79,6 @@
 			partition@90000 {
 				label = "u-boot-env2";
 				reg = <0x90000 0x10000>;
-				read-only;
 			};
 
 			partition@a0000 {

target/linux/realtek/dts/rtl8382_d-link_dgs-1210-10p.dts

@@ -77,7 +77,6 @@
 			partition@c0000 {
 				label = "u-boot-env2";
 				reg = <0x000c0000 0x40000>;
-				read-only;
 			};
 			partition@280000 {
 				label = "firmware";

target/linux/realtek/dts/rtl8382_d-link_dgs-1210.dtsi

@@ -61,7 +61,6 @@
 			partition@c0000 {
 				label = "u-boot-env2";
 				reg = <0x000c0000 0x40000>;
-				read-only;
 			};
 			partition@280000 {
 				label = "firmware";

target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/common.c

@@ -368,8 +368,8 @@ static int __init rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv)
 
 	/* Enable PHY control via SoC */
 	if (priv->family_id == RTL8380_FAMILY_ID) {
-		/* Enable PHY control via SoC */
-		sw_w32_mask(0, BIT(15), RTL838X_SMI_GLB_CTRL);
+		/* Enable SerDes NWAY and PHY control via SoC */
+		sw_w32_mask(BIT(7), BIT(15), RTL838X_SMI_GLB_CTRL);
 	} else {
 		/* Disable PHY polling via SoC */
 		sw_w32_mask(BIT(7), 0, RTL839X_SMI_GLB_CTRL);
@@ -555,7 +555,6 @@ static int __init rtl83xx_sw_probe(struct platform_device *pdev)
 	int err = 0, i;
 	struct rtl838x_switch_priv *priv;
 	struct device *dev = &pdev->dev;
-	u64 irq_mask;
 	u64 bpdu_mask;
 
 	pr_debug("Probing RTL838X switch device\n");
@@ -651,8 +650,8 @@ static int __init rtl83xx_sw_probe(struct platform_device *pdev)
 	/* Enable link and media change interrupts. Are the SERDES masks needed? */
 	sw_w32_mask(0, 3, priv->r->isr_glb_src);
 
-	priv->r->set_port_reg_le(irq_mask, priv->r->isr_port_link_sts_chg);
-	priv->r->set_port_reg_le(irq_mask, priv->r->imr_port_link_sts_chg);
+	priv->r->set_port_reg_le(priv->irq_mask, priv->r->isr_port_link_sts_chg);
+	priv->r->set_port_reg_le(priv->irq_mask, priv->r->imr_port_link_sts_chg);
 
 	priv->link_state_irq = platform_get_irq(pdev, 0);
 	pr_info("LINK state irq: %d\n", priv->link_state_irq);

target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/dsa.c

@@ -245,6 +245,7 @@ static void rtl83xx_phylink_validate(struct dsa_switch *ds, int port,
 	pr_debug("In %s port %d", __func__, port);
 
 	if (!phy_interface_mode_is_rgmii(state->interface) &&
+	    state->interface != PHY_INTERFACE_MODE_NA &&
 	    state->interface != PHY_INTERFACE_MODE_1000BASEX &&
 	    state->interface != PHY_INTERFACE_MODE_MII &&
 	    state->interface != PHY_INTERFACE_MODE_REVMII &&
@@ -310,7 +311,7 @@ static int rtl83xx_phylink_mac_link_state(struct dsa_switch *ds, int port,
 	link = priv->r->get_port_reg_le(priv->r->mac_link_sts);
 	if (link & BIT_ULL(port))
 		state->link = 1;
-	pr_info("%s: link state: %llx\n", __func__, link & BIT_ULL(port));
+	pr_debug("%s: link state: %llx\n", __func__, link & BIT_ULL(port));
 
 	state->duplex = 0;
 	if (priv->r->get_port_reg_le(priv->r->mac_link_dup_sts) & BIT_ULL(port))
@@ -343,6 +344,44 @@ static int rtl83xx_phylink_mac_link_state(struct dsa_switch *ds, int port,
 	return 1;
 }
 
+
+static void rtl83xx_config_interface(int port, phy_interface_t interface)
+{
+	u32 old, int_shift, sds_shift;
+
+	switch (port) {
+	case 24:
+		int_shift = 0;
+		sds_shift = 5;
+		break;
+	case 26:
+		int_shift = 3;
+		sds_shift = 0;
+		break;
+	default:
+		return;
+	}
+
+	old = sw_r32(RTL838X_SDS_MODE_SEL);
+	switch (interface) {
+	case PHY_INTERFACE_MODE_1000BASEX:
+		if ((old >> sds_shift & 0x1f) == 4)
+			return;
+		sw_w32_mask(0x7 << int_shift, 1 << int_shift, RTL838X_INT_MODE_CTRL);
+		sw_w32_mask(0x1f << sds_shift, 4 << sds_shift, RTL838X_SDS_MODE_SEL);
+		break;
+	case PHY_INTERFACE_MODE_SGMII:
+		if ((old >> sds_shift & 0x1f) == 2)
+			return;
+		sw_w32_mask(0x7 << int_shift, 2 << int_shift, RTL838X_INT_MODE_CTRL);
+		sw_w32_mask(0x1f << sds_shift, 2 << sds_shift, RTL838X_SDS_MODE_SEL);
+		break;
+	default:
+		return;
+	}
+	pr_debug("configured port %d for interface %s\n", port, phy_modes(interface));
+}
+
 static void rtl83xx_phylink_mac_config(struct dsa_switch *ds, int port,
 					unsigned int mode,
 					const struct phylink_link_state *state)
@@ -376,10 +415,11 @@ static void rtl83xx_phylink_mac_config(struct dsa_switch *ds, int port,
 	reg = sw_r32(priv->r->mac_force_mode_ctrl(port));
 	/* Auto-Negotiation does not work for MAC in RTL8390 */
 	if (priv->family_id == RTL8380_FAMILY_ID) {
-		if (mode == MLO_AN_PHY) {
+		if (mode == MLO_AN_PHY || phylink_autoneg_inband(mode)) {
 			pr_debug("PHY autonegotiates\n");
 			reg |= BIT(2);
 			sw_w32(reg, priv->r->mac_force_mode_ctrl(port));
+			rtl83xx_config_interface(port, state->interface);
 			return;
 		}
 	}

target/linux/realtek/files-5.4/drivers/net/ethernet/rtl838x_eth.c

@@ -855,7 +855,7 @@ static int rtl838x_eth_open(struct net_device *ndev)
 	struct ring_b *ring = priv->membase;
 	int i, err;
 
-	pr_info("%s called: RX rings %d(length %d), TX rings %d(length %d)\n",
+	pr_debug("%s called: RX rings %d(length %d), TX rings %d(length %d)\n",
 		__func__, priv->rxrings, priv->rxringlen, TXRINGS, TXRINGLEN);
 
 	spin_lock_irqsave(&priv->lock, flags);
@@ -1342,7 +1342,7 @@ static void rtl838x_validate(struct phylink_config *config,
 {
 	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
 
-	pr_info("In %s\n", __func__);
+	pr_debug("In %s\n", __func__);
 
 	if (!phy_interface_mode_is_rgmii(state->interface) &&
 	    state->interface != PHY_INTERFACE_MODE_1000BASEX &&
@@ -1404,7 +1404,7 @@ static void rtl838x_mac_an_restart(struct phylink_config *config)
 	if (priv->family_id != RTL8380_FAMILY_ID)
 		return;
 
-	pr_info("In %s\n", __func__);
+	pr_debug("In %s\n", __func__);
 	/* Restart by disabling and re-enabling link */
 	sw_w32(0x6192D, priv->r->mac_force_mode_ctrl + priv->cpu_port * 4);
 	mdelay(20);
@@ -1419,7 +1419,7 @@ static int rtl838x_mac_pcs_get_state(struct phylink_config *config,
 	struct rtl838x_eth_priv *priv = netdev_priv(dev);
 	int port = priv->cpu_port;
 
-	pr_info("In %s\n", __func__);
+	pr_debug("In %s\n", __func__);
 
 	state->link = priv->r->get_mac_link_sts(port) ? 1 : 0;
 	state->duplex = priv->r->get_mac_link_dup_sts(port) ? 1 : 0;
@@ -1456,7 +1456,7 @@ static void rtl838x_mac_link_down(struct phylink_config *config,
 	struct net_device *dev = container_of(config->dev, struct net_device, dev);
 	struct rtl838x_eth_priv *priv = netdev_priv(dev);
 
-	pr_info("In %s\n", __func__);
+	pr_debug("In %s\n", __func__);
 	/* Stop TX/RX to port */
 	sw_w32_mask(0x03, 0, priv->r->mac_port_ctrl(priv->cpu_port));
 }
@@ -1468,7 +1468,7 @@ static void rtl838x_mac_link_up(struct phylink_config *config, unsigned int mode
 	struct net_device *dev = container_of(config->dev, struct net_device, dev);
 	struct rtl838x_eth_priv *priv = netdev_priv(dev);
 
-	pr_info("In %s\n", __func__);
+	pr_debug("In %s\n", __func__);
 	/* Restart TX/RX to port */
 	sw_w32_mask(0, 0x03, priv->r->mac_port_ctrl(priv->cpu_port));
 }
@@ -1479,7 +1479,7 @@ static void rtl838x_set_mac_hw(struct net_device *dev, u8 *mac)
 	unsigned long flags;
 
 	spin_lock_irqsave(&priv->lock, flags);
-	pr_info("In %s\n", __func__);
+	pr_debug("In %s\n", __func__);
 	sw_w32((mac[0] << 8) | mac[1], priv->r->mac);
 	sw_w32((mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | mac[5], priv->r->mac + 4);
 
@@ -1547,7 +1547,7 @@ static int rtl838x_get_link_ksettings(struct net_device *ndev,
 {
 	struct rtl838x_eth_priv *priv = netdev_priv(ndev);
 
-	pr_info("%s called\n", __func__);
+	pr_debug("%s called\n", __func__);
 	return phylink_ethtool_ksettings_get(priv->phylink, cmd);
 }
 
@@ -1556,7 +1556,7 @@ static int rtl838x_set_link_ksettings(struct net_device *ndev,
 {
 	struct rtl838x_eth_priv *priv = netdev_priv(ndev);
 
-	pr_info("%s called\n", __func__);
+	pr_debug("%s called\n", __func__);
 	return phylink_ethtool_ksettings_set(priv->phylink, cmd);
 }
 
@@ -1678,7 +1678,7 @@ static int rtl931x_mdio_write(struct mii_bus *bus, int mii_id,
 
 static int rtl838x_mdio_reset(struct mii_bus *bus)
 {
-	pr_info("%s called\n", __func__);
+	pr_debug("%s called\n", __func__);
 	/* Disable MAC polling the PHY so that we can start configuration */
 	sw_w32(0x00000000, RTL838X_SMI_POLL_CTRL);
 
@@ -1693,7 +1693,7 @@ static int rtl839x_mdio_reset(struct mii_bus *bus)
 {
 	return 0;
 
-	pr_info("%s called\n", __func__);
+	pr_debug("%s called\n", __func__);
 	/* BUG: The following does not work, but should! */
 	/* Disable MAC polling the PHY so that we can start configuration */
 	sw_w32(0x00000000, RTL839X_SMI_PORT_POLLING_CTRL);
@@ -1710,7 +1710,7 @@ static int rtl931x_mdio_reset(struct mii_bus *bus)
 	sw_w32(0x00000000, RTL931X_SMI_PORT_POLLING_CTRL);
 	sw_w32(0x00000000, RTL931X_SMI_PORT_POLLING_CTRL + 4);
 
-	pr_info("%s called\n", __func__);
+	pr_debug("%s called\n", __func__);
 
 	return 0;
 }
@@ -1767,7 +1767,7 @@ static int rtl838x_mdio_init(struct rtl838x_eth_priv *priv)
 	struct device_node *mii_np;
 	int ret;
 
-	pr_info("%s called\n", __func__);
+	pr_debug("%s called\n", __func__);
 	mii_np = of_get_child_by_name(priv->pdev->dev.of_node, "mdio-bus");
 
 	if (!mii_np) {
@@ -1827,7 +1827,7 @@ err_put_node:
 
 static int rtl838x_mdio_remove(struct rtl838x_eth_priv *priv)
 {
-	pr_info("%s called\n", __func__);
+	pr_debug("%s called\n", __func__);
 	if (!priv->mii_bus)
 		return 0;
 

target/linux/realtek/image/Makefile

@@ -6,6 +6,8 @@ include $(INCLUDE_DIR)/image.mk
 KERNEL_LOADADDR = 0x80000000
 KERNEL_ENTRY = 0x80000400
 
+DEVICE_VARS += ZYXEL_VERS
+
 define Build/zyxel-vers
        ( echo VERS;\
        for hw in $(1); do\
@@ -84,37 +86,44 @@ define Device/netgear_gs110tpp-v1
 endef
 TARGET_DEVICES += netgear_gs110tpp-v1
 
-define Device/zyxel_gs1900-10hp
+define Device/zyxel_gs1900
   SOC := rtl8380
   IMAGE_SIZE := 6976k
   DEVICE_VENDOR := ZyXEL
-  DEVICE_MODEL := GS1900-10HP
   UIMAGE_MAGIC := 0x83800000
-  KERNEL_INITRAMFS := kernel-bin | append-dtb | gzip | zyxel-vers AAZI | uImage gzip
+  KERNEL_INITRAMFS := kernel-bin | append-dtb | gzip | zyxel-vers $$$$(ZYXEL_VERS) | \
+	uImage gzip
+endef
+
+define Device/zyxel_gs1900-10hp
+  $(Device/zyxel_gs1900)
+  DEVICE_MODEL := GS1900-10HP
+  ZYXEL_VERS := AAZI
 endef
 TARGET_DEVICES += zyxel_gs1900-10hp
 
+define Device/zyxel_gs1900-8
+  $(Device/zyxel_gs1900)
+  DEVICE_MODEL := GS1900-8
+  ZYXEL_VERS := AAHH
+endef
+TARGET_DEVICES += zyxel_gs1900-8
+
 define Device/zyxel_gs1900-8hp-v1
-  SOC := rtl8380
-  IMAGE_SIZE := 6976k
-  DEVICE_VENDOR := ZyXEL
+  $(Device/zyxel_gs1900)
   DEVICE_MODEL := GS1900-8HP
   DEVICE_VARIANT := v1
+  ZYXEL_VERS := AAHI
   DEVICE_PACKAGES += lua-rs232
-  UIMAGE_MAGIC := 0x83800000
-  KERNEL_INITRAMFS := kernel-bin | append-dtb | gzip | zyxel-vers AAHI | uImage gzip
 endef
 TARGET_DEVICES += zyxel_gs1900-8hp-v1
 
 define Device/zyxel_gs1900-8hp-v2
-  SOC := rtl8380
-  IMAGE_SIZE := 6976k
-  DEVICE_VENDOR := ZyXEL
+  $(Device/zyxel_gs1900)
   DEVICE_MODEL := GS1900-8HP
   DEVICE_VARIANT := v2
+  ZYXEL_VERS := AAHI
   DEVICE_PACKAGES += lua-rs232
-  UIMAGE_MAGIC := 0x83800000
-  KERNEL_INITRAMFS := kernel-bin | append-dtb | gzip | zyxel-vers AAHI | uImage gzip
 endef
 TARGET_DEVICES += zyxel_gs1900-8hp-v2
 

toolchain/gdb/Makefile

@@ -22,6 +22,7 @@ HOST_BUILD_PARALLEL:=1
 include $(INCLUDE_DIR)/toolchain-build.mk
 
 HOST_CONFIGURE_VARS += \
+	acx_cv_cc_gcc_supports_ada=false \
 	gdb_cv_func_sigsetjmp=yes
 
 HOST_CONFIGURE_ARGS = \

toolchain/glibc/common.mk

@@ -12,8 +12,8 @@ PKG_RELEASE:=2
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_SUBDIR:=$(PKG_NAME)-$(PKG_VERSION)
-PKG_SOURCE_VERSION:=db32fc27e7bdfb5468200a94e9152bcc1c971d25
-PKG_MIRROR_HASH:=e02f8b7df03d675db6279b99212c8a645aa50f1ae7789fafd7bc1987145a4c92
+PKG_SOURCE_VERSION:=12ff80b312c11b0284df7a1c5cb9be6418f85228
+PKG_MIRROR_HASH:=84b7715886320794f9787976b20c868f5d6967e0ab08e6c821a8d42103c0721b
 PKG_SOURCE_URL:=https://sourceware.org/git/glibc.git
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION)-$(PKG_SOURCE_VERSION).tar.xz