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target/rockchip: sync with recently changes from upstream

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David Bauer 2020-07-26 19:12:03 +02:00 committed by CN_SZTL
parent 2ceb8e57f9
commit 2db75c07fc
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GPG Key ID: 6850B6345C862176
16 changed files with 327 additions and 1596 deletions
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24
package/boot/uboot-rockchip/Makefile
View File

@ -20,15 +20,8 @@ define U-Boot/Default
HIDDEN:=1
endef
define U-Boot/rockpro64-rk3399
BUILD_SUBTARGET:=armv8
NAME:=RockPro64
BUILD_DEVICES:= \
pine64_rockpro64
DEPENDS:=+PACKAGE_u-boot-rockpro64-rk3399:arm-trusted-firmware-rockchip
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip
ATF:=rk3399_bl31.elf
endef
# RK3328 boards
define U-Boot/nanopi-r2s-rk3328
BUILD_SUBTARGET:=armv8
@ -41,6 +34,19 @@ define U-Boot/nanopi-r2s-rk3328
OF_PLATDATA:=$(1)
endef
# RK3399 boards
define U-Boot/rockpro64-rk3399
BUILD_SUBTARGET:=armv8
NAME:=RockPro64
BUILD_DEVICES:= \
pine64_rockpro64
DEPENDS:=+PACKAGE_u-boot-rockpro64-rk3399:arm-trusted-firmware-rockchip
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip
ATF:=rk3399_bl31.elf
endef
UBOOT_TARGETS := \
rockpro64-rk3399 \
nanopi-r2s-rk3328

68
package/boot/uboot-rockchip/patches/100-rockchip-rk3328-Add-support-for-FriendlyARM-NanoPi-R.patch
View File

@ -1,4 +1,4 @@
From 42e21846e8faa537f2eda0297e1faa7d8a0abddb Mon Sep 17 00:00:00 2001
From bd067ecdb13efb78e0f166b53837dc141ca47380 Mon Sep 17 00:00:00 2001
From: David Bauer <mail@david-bauer.net>
Date: Fri, 10 Jul 2020 14:58:30 +0200
Subject: [PATCH] rockchip: rk3328: Add support for FriendlyARM NanoPi R2S
@ -18,17 +18,19 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 34 +++
arch/arm/dts/rk3328-nanopi-r2s.dts | 317 +++++++++++++++++++++
arch/arm/dts/rk3328-nanopi-r2s.dts | 323 +++++++++++++++++++++
board/rockchip/evb_rk3328/MAINTAINERS | 7 +
configs/nanopi-r2s-rk3328_defconfig | 99 +++++++
5 files changed, 458 insertions(+)
5 files changed, 464 insertions(+)
create mode 100644 arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3328-nanopi-r2s.dts
create mode 100644 configs/nanopi-r2s-rk3328_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index cee10f533f..a6bd8ea0d8 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -106,6 +106,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
@@ -107,6 +107,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
dtb-$(CONFIG_ROCKCHIP_RK3328) += \
rk3328-evb.dtb \
@ -36,6 +38,9 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
rk3328-roc-cc.dtb \
rk3328-rock64.dtb \
rk3328-rock-pi-e.dtb
diff --git a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
new file mode 100644
index 0000000000..4159348402
--- /dev/null
+++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
@@ -0,0 +1,34 @@
@ -73,9 +78,12 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
+&vcc_sd {
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/rk3328-nanopi-r2s.dts b/arch/arm/dts/rk3328-nanopi-r2s.dts
new file mode 100644
index 0000000000..073cfd7bb2
--- /dev/null
+++ b/arch/arm/dts/rk3328-nanopi-r2s.dts
@@ -0,0 +1,317 @@
@@ -0,0 +1,323 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
@ -113,6 +121,23 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
+ vin-supply = <&vcc_io>;
+ };
+
+ vcc_sdio: sdmmcio-regulator {
+ compatible = "regulator-gpio";
+ gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ states = <1800000 0x1
+ 3300000 0x0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio_vcc_pin>;
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_sdio";
+ regulator-settling-time-us = <5000>;
+ regulator-type = "voltage";
+ vin-supply = <&vcc_io>;
+ };
+
+ vcc_sys: vcc-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_sys";
@ -122,18 +147,6 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
+ regulator-max-microvolt = <5000000>;
+ };
+
+ vcc_rtl8153: vcc-rtl8153-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtl8153_en_drv>;
+ regulator-always-on;
+ regulator-name = "vcc_rtl8153";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
@ -321,7 +334,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
+
+ vccio1-supply = <&vcc_io>;
+ vccio2-supply = <&vcc18_emmc>;
+ vccio3-supply = <&vcc_io>;
+ vccio3-supply = <&vcc_sdio>;
+ vccio4-supply = <&vcc_18>;
+ vccio5-supply = <&vcc_io>;
+ vccio6-supply = <&vcc_io>;
@ -330,7 +343,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
+
+&pinctrl {
+ leds {
+ led_pins: led_pins {
+ led_pins: led-pins {
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>,
+ <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
+ <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
@ -338,7 +351,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
+ };
+
+ button {
+ button_pins: button_pins {
+ button_pins: button-pins {
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
@ -349,9 +362,9 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
+ };
+ };
+
+ usb {
+ rtl8153_en_drv: rtl8153-en-drv {
+ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ sd {
+ sdio_vcc_pin: sdio-vcc-pin {
+ rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
@ -365,6 +378,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
+ vmmc-supply = <&vcc_sd>;
+ vqmmc-supply = <&vcc_sdio>;
+ status = "okay";
+};
+
@ -393,6 +407,8 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
+&usb_host0_ohci {
+ status = "okay";
+};
diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS
index e7dd59ff4e..14fda46e8f 100644
--- a/board/rockchip/evb_rk3328/MAINTAINERS
+++ b/board/rockchip/evb_rk3328/MAINTAINERS
@@ -5,6 +5,13 @@ F: board/rockchip/evb_rk3328
@ -409,6 +425,9 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
ROC-RK3328-CC
M: Loic Devulder <ldevulder@suse.com>
M: Chen-Yu Tsai <wens@csie.org>
diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig
new file mode 100644
index 0000000000..2c028e9d0b
--- /dev/null
+++ b/configs/nanopi-r2s-rk3328_defconfig
@@ -0,0 +1,99 @@
@ -511,3 +530,6 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
+CONFIG_TPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_SMBIOS_MANUFACTURER="pine64"
--
2.27.0

15
package/boot/uboot-rockchip/src/of-platdata/nanopi-r2s-rk3328/dt-platdata.c
View File

@ -19,7 +19,7 @@ U_BOOT_DEVICE(syscon_at_ff100000) = {
static const struct dtd_rockchip_rk3328_cru dtv_clock_controller_at_ff440000 = {
.reg = {0xff440000, 0x1000},
.rockchip_grf = 0x39,
.rockchip_grf = 0x3a,
};
U_BOOT_DEVICE(clock_controller_at_ff440000) = {
.name = "rockchip_rk3328_cru",
@ -35,7 +35,7 @@ static const struct dtd_rockchip_rk3328_uart dtv_serial_at_ff130000 = {
.dma_names = {"tx", "rx"},
.dmas = {0x10, 0x6, 0x10, 0x7},
.interrupts = {0x0, 0x39, 0x4},
.pinctrl_0 = 0x25,
.pinctrl_0 = 0x26,
.pinctrl_names = "default",
.reg = {0xff130000, 0x100},
.reg_io_width = 0x4,
@ -60,11 +60,12 @@ static const struct dtd_rockchip_rk3328_dw_mshc dtv_mmc_at_ff500000 = {
.fifo_depth = 0x100,
.interrupts = {0x0, 0xc, 0x4},
.max_frequency = 0x8f0d180,
.pinctrl_0 = {0x46, 0x47, 0x48, 0x49},
.pinctrl_0 = {0x47, 0x48, 0x49, 0x4a},
.pinctrl_names = "default",
.reg = {0xff500000, 0x4000},
.u_boot_spl_fifo_mode = true,
.vmmc_supply = 0x4a,
.vmmc_supply = 0x4b,
.vqmmc_supply = 0x1e,
};
U_BOOT_DEVICE(mmc_at_ff500000) = {
.name = "rockchip_rk3328_dw_mshc",
@ -74,7 +75,7 @@ U_BOOT_DEVICE(mmc_at_ff500000) = {
static const struct dtd_rockchip_rk3328_pinctrl dtv_pinctrl = {
.ranges = true,
.rockchip_grf = 0x39,
.rockchip_grf = 0x3a,
};
U_BOOT_DEVICE(pinctrl) = {
.name = "rockchip_rk3328_pinctrl",
@ -97,8 +98,8 @@ U_BOOT_DEVICE(gpio0_at_ff210000) = {
};
static const struct dtd_regulator_fixed dtv_sdmmc_regulator = {
.gpio = {0x5e, 0x1e, 0x1},
.pinctrl_0 = 0x5f,
.gpio = {0x5f, 0x1e, 0x1},
.pinctrl_0 = 0x60,
.pinctrl_names = "default",
.regulator_max_microvolt = 0x325aa0,
.regulator_min_microvolt = 0x325aa0,

1
package/boot/uboot-rockchip/src/of-platdata/nanopi-r2s-rk3328/dt-structs-gen.h
View File

@ -44,6 +44,7 @@ struct dtd_rockchip_rk3328_dw_mshc {
fdt64_t reg[2];
bool u_boot_spl_fifo_mode;
fdt32_t vmmc_supply;
fdt32_t vqmmc_supply;
};
struct dtd_rockchip_rk3328_grf {
fdt64_t reg[2];

40
target/linux/rockchip/patches-5.4/001-rockchip-rk3328-Add-support-for-FriendlyARM-NanoPi-R.patch
View File

@ -1,9 +1,9 @@
From 7e772d77a4ac5174803c1524598c5eb677360aec Mon Sep 17 00:00:00 2001
From c222b8b15193f3ed15562fe7e06f3573aac05b70 Mon Sep 17 00:00:00 2001
From: David Bauer <mail@david-bauer.net>
Date: Fri, 10 Jul 2020 15:57:46 +0200
Subject: [PATCH] rockchip: rk3328: Add support for FriendlyARM NanoPi R2S
This adds support for the NanoPi R2S from FriendlyArm.
This adds support for the NanoPi R2S from FriendlyARM.
Rockchip RK3328 SoC
1GB DDR4 RAM
@ -17,8 +17,8 @@ WAN - LAN - SYS LED
Signed-off-by: David Bauer <mail@david-bauer.net>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 299 ++++++++++++++++++
2 files changed, 300 insertions(+)
.../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 323 ++++++++++++++++++
2 files changed, 324 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
--- a/arch/arm64/boot/dts/rockchip/Makefile
@ -33,7 +33,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
@@ -0,0 +1,299 @@
@@ -0,0 +1,323 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
@ -71,6 +71,23 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
+ vin-supply = <&vcc_io>;
+ };
+
+ vcc_sdio: sdmmcio-regulator {
+ compatible = "regulator-gpio";
+ gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ states = <1800000 0x1
+ 3300000 0x0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio_vcc_pin>;
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_sdio";
+ regulator-settling-time-us = <5000>;
+ regulator-type = "voltage";
+ vin-supply = <&vcc_io>;
+ };
+
+ vcc_sys: vcc-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_sys";
@ -267,7 +284,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
+
+ vccio1-supply = <&vcc_io>;
+ vccio2-supply = <&vcc18_emmc>;
+ vccio3-supply = <&vcc_io>;
+ vccio3-supply = <&vcc_sdio>;
+ vccio4-supply = <&vcc_18>;
+ vccio5-supply = <&vcc_io>;
+ vccio6-supply = <&vcc_io>;
@ -276,7 +293,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
+
+&pinctrl {
+ leds {
+ led_pins: led_pins {
+ led_pins: led-pins {
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>,
+ <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
+ <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
@ -284,7 +301,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
+ };
+
+ button {
+ button_pins: button_pins {
+ button_pins: button-pins {
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
@ -294,6 +311,12 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
+ rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ sd {
+ sdio_vcc_pin: sdio-vcc-pin {
+ rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&sdmmc {
@ -305,6 +328,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
+ vmmc-supply = <&vcc_sd>;
+ vqmmc-supply = <&vcc_sdio>;
+ status = "okay";
+};
+

4
target/linux/rockchip/patches-5.4/004-rockchip-rk3328-allow-higher-frequency.patch → target/linux/rockchip/patches-5.4/003-rockchip-rk3328-allow-higher-frequency.patch
View File

@ -1,9 +1,7 @@
From: QiuSimons
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 8dabc6e29..d58c893a6 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -125,6 +125,16 @@
@@ -123,6 +123,16 @@
opp-microvolt = <1300000>;
clock-latency-ns = <40000>;
};

74
target/linux/rockchip/patches-5.4/004-net-usb-r8152-add-LED-configuration-from-OF.patch Normal file
View File

@ -0,0 +1,74 @@
From 82985725e071f2a5735052f18e109a32aeac3a0b Mon Sep 17 00:00:00 2001
From: David Bauer <mail@david-bauer.net>
Date: Sun, 26 Jul 2020 02:38:31 +0200
Subject: [PATCH] net: usb: r8152: add LED configuration from OF
This adds the ability to configure the LED configuration register using
OF. This way, the correct value for board specific LED configuration can
be determined.
Signed-off-by: David Bauer <mail@david-bauer.net>
---
drivers/net/usb/r8152.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -11,6 +11,7 @@
#include <linux/mii.h>
#include <linux/ethtool.h>
#include <linux/usb.h>
+#include <linux/of.h>
#include <linux/crc32.h>
#include <linux/if_vlan.h>
#include <linux/uaccess.h>
@@ -4363,6 +4364,22 @@ static void rtl_tally_reset(struct r8152
ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
}
+static int r8152_led_configuration(struct r8152 *tp)
+{
+ u32 led_data;
+ int ret;
+
+ ret = of_property_read_u32(tp->udev->dev.of_node, "realtek,led-data",
+ &led_data);
+
+ if (ret)
+ return ret;
+
+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_LEDSEL, led_data);
+
+ return 0;
+}
+
static void r8152b_init(struct r8152 *tp)
{
u32 ocp_data;
@@ -4404,6 +4421,8 @@ static void r8152b_init(struct r8152 *tp
ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
+
+ r8152_led_configuration(tp);
}
static void r8153_init(struct r8152 *tp)
@@ -4533,6 +4552,8 @@ static void r8153_init(struct r8152 *tp)
tp->coalesce = COALESCE_SLOW;
break;
}
+
+ r8152_led_configuration(tp);
}
static void r8153b_init(struct r8152 *tp)
@@ -4609,6 +4630,8 @@ static void r8153b_init(struct r8152 *tp
rtl_tally_reset(tp);
tp->coalesce = 15000; /* 15 us */
+
+ r8152_led_configuration(tp);
}
static int rtl8152_pre_reset(struct usb_interface *intf)

54
target/linux/rockchip/patches-5.4/005-dt-bindings-net-add-RTL8152-binding-documentation.patch Normal file
View File

@ -0,0 +1,54 @@
From 3ee05f4aa64fc86af3be5bc176ba5808de9260a7 Mon Sep 17 00:00:00 2001
From: David Bauer <mail@david-bauer.net>
Date: Sun, 26 Jul 2020 15:30:33 +0200
Subject: [PATCH] dt-bindings: net: add RTL8152 binding documentation
Add binding documentation for the Realtek RTL8152 / RTL8153 USB ethernet
adapters.
Signed-off-by: David Bauer <mail@david-bauer.net>
---
.../bindings/net/realtek,rtl8152.yaml | 36 +++++++++++++++++++
1 file changed, 36 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/realtek,rtl8152.yaml
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/realtek,rtl8152.yaml
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/realtek,rtl8152.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Realtek RTL8152/RTL8153 series USB ethernet
+
+maintainers:
+ - David Bauer <mail@david-bauer.net>
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - realtek,rtl8152
+ - realtek,rtl8153
+
+ reg:
+ description: The device number on the USB bus
+
+ realtek,led-data:
+ description: Value to be written to the LED configuration register.
+
+required:
+ - compatible
+ - reg
+
+examples:
+ - |
+ usb-eth@2 {
+ compatible = "realtek,rtl8153";
+ reg = <2>;
+ realtek,led-data = <0x87>;
+ };
\ No newline at end of file

71
target/linux/rockchip/patches-5.4/005-rockchip-rk3328-add-idle-state.patch
View File

@ -1,71 +0,0 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Robin Murphy <robin.murphy@arm.com>
Date: Sun, 29 Dec 2019 20:16:17 +0000
Subject: [PATCH] arm64: dts: rockchip: Add RK3328 idle state
Downstream RK3328 DTBs describe a CPU idle state matching that present
on other SoCs like RK3399. This works with upstream Trusted Firmware-A
too, so let's add it here.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/a8c83e705d387446ea8121516d410e38b2d9c57b.1577640736.git.robin.murphy@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 91306ebed4da..c9ff1188bd7b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -41,6 +41,7 @@
reg = <0x0 0x0>;
clocks = <&cru ARMCLK>;
#cooling-cells = <2>;
+ cpu-idle-states = <&CPU_SLEEP>;
dynamic-power-coefficient = <120>;
enable-method = "psci";
next-level-cache = <&l2>;
@@ -53,6 +54,7 @@
reg = <0x0 0x1>;
clocks = <&cru ARMCLK>;
#cooling-cells = <2>;
+ cpu-idle-states = <&CPU_SLEEP>;
dynamic-power-coefficient = <120>;
enable-method = "psci";
next-level-cache = <&l2>;
@@ -65,6 +67,7 @@
reg = <0x0 0x2>;
clocks = <&cru ARMCLK>;
#cooling-cells = <2>;
+ cpu-idle-states = <&CPU_SLEEP>;
dynamic-power-coefficient = <120>;
enable-method = "psci";
next-level-cache = <&l2>;
@@ -77,12 +80,26 @@
reg = <0x0 0x3>;
clocks = <&cru ARMCLK>;
#cooling-cells = <2>;
+ cpu-idle-states = <&CPU_SLEEP>;
dynamic-power-coefficient = <120>;
enable-method = "psci";
next-level-cache = <&l2>;
operating-points-v2 = <&cpu0_opp_table>;
};
+ idle-states {
+ entry-method = "psci";
+
+ CPU_SLEEP: cpu-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x0010000>;
+ entry-latency-us = <120>;
+ exit-latency-us = <250>;
+ min-residency-us = <900>;
+ };
+ };
+
l2: l2-cache0 {
compatible = "cache";
};

2
target/linux/rockchip/patches-5.4/100-rockchip-use-system-LED-for-OpenWrt.patch
View File

@ -29,7 +29,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
gmac_clkin: external-gmac-clock {
compatible = "fixed-clock";
clock-frequency = <125000000>;
@@ -50,7 +57,7 @@
@@ -67,7 +74,7 @@
pinctrl-names = "default";
pinctrl-0 = <&led_pins>;

62
target/linux/rockchip/patches-5.4/101-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch Normal file
View File

@ -0,0 +1,62 @@
From: William Wu <william.wu@rock-chips.com>
RK3328 has one USB 3.0 OTG controller which uses DWC_USB3
core's general architecture. It can act as static xHCI host
controller, static device controller, USB 3.0/2.0 OTG basing
on ID of USB3.0 PHY.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Leonidas P. Papadakos <papadakospan@gmail.com>
---
NOTE: This binding still has issues. From the original thread:
the rk3328 usb3-phy has an issue with detecting any plugin events
after a previous device got removed - see the inno-usb3-phy driver
in the vendor kernel.
The current state is good-enough for enabling the USB3 attached LAN
port of the NanoPi R2S. However, it might explode depending on your
use-case. You've been warned.
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 27 ++++++++++++++++++++++++
1 file changed, 27 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -936,6 +936,33 @@
status = "disabled";
};
+ usbdrd3: usb@ff600000 {
+ compatible = "rockchip,rk3328-dwc3", "rockchip,rk3399-dwc3";
+ clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>,
+ <&cru ACLK_USB3OTG>;
+ clock-names = "ref_clk", "suspend_clk",
+ "bus_clk";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ usbdrd_dwc3: dwc3@ff600000 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0xff600000 0x0 0x100000>;
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+ dr_mode = "otg";
+ phy_type = "utmi_wide";
+ snps,dis_enblslpm_quirk;
+ snps,dis-u2-freeclk-exists-quirk;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ snps,dis-del-phy-power-chg-quirk;
+ snps,dis-tx-ipgap-linecheck-quirk;
+ status = "disabled";
+ };
+ };
+
gic: interrupt-controller@ff811000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;

36
target/linux/rockchip/patches-5.4/101-rockchip-rework-rtl8152-LEDs-for-FriendlyARM-NanoPi-R2S.patch
View File

@ -1,36 +0,0 @@
From 2d4f786f94b331904682c24a792462726d474007 Mon Sep 17 00:00:00 2001
From: hmz007 <hmz007@gmail.com>
Date: Mon, 23 Dec 2019 13:10:06 +0800
Subject: [PATCH] r8152: Add module param for customized LEDs
Signed-off-by: hmz007 <hmz007@gmail.com>
---
drivers/net/usb/r8152.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index eb78f6d9390c..ec737fffcded 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -37,6 +37,11 @@
#define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
#define MODULENAME "r8152"
+/* LED0: Activity, LED1: Link */
+static int ledsel = 0x78;
+module_param(ledsel, int, 0);
+MODULE_PARM_DESC(ledsel, "Override default LED configuration");
+
#define R8152_PHY_ID 32
#define PLA_IDR 0xc000
@@ -4545,6 +4550,9 @@ static void r8153b_init(struct r8152 *tp)
ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
+ /* set customized led */
+ ocp_write_word(tp, MCU_TYPE_PLA, PLA_LEDSEL, ledsel);
+
rtl_tally_reset(tp);
tp->coalesce = 15000; /* 15 us */

1432
target/linux/rockchip/patches-5.4/102-rockchip-add-usb3-controller-driver-for-RK3328-SoCs.patch
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File diff suppressed because it is too large Load Diff

12
target/linux/rockchip/patches-5.4/003-rockchip-rk3328-enable-LAN-port-on-NanoPi-R2S.patch → target/linux/rockchip/patches-5.4/102-rockchip-enable-LAN-port-on-NanoPi-R2S.patch
View File

@ -1,7 +1,7 @@
From 6636512096c0749514b27d492db71858150b6e9c Mon Sep 17 00:00:00 2001
From 0fc3b9b7619c4878f73a6a7989863f0d1a3fd392 Mon Sep 17 00:00:00 2001
From: David Bauer <mail@david-bauer.net>
Date: Fri, 10 Jul 2020 21:12:16 +0200
Subject: [PATCH] rockchip: enable LAN port on NanoPi R2S
Subject: [PATCH] rockchip: enabled LAN port on NanoPi R2S
Enable the USB3 port on the FriendlyARM NanoPi R2S.
This is required for the USB3 attached LAN port to work.
@ -13,7 +13,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
--- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
@@ -51,6 +51,18 @@
@@ -68,6 +68,18 @@
regulator-max-microvolt = <5000000>;
};
@ -32,8 +32,8 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
leds {
compatible = "gpio-leds";
@@ -265,6 +277,12 @@
rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
@@ -288,6 +300,12 @@
rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
+
@ -45,7 +45,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
};
&sdmmc {
@@ -304,3 +322,12 @@
@@ -328,3 +346,12 @@
&usb_host0_ohci {
status = "okay";
};

28
target/linux/rockchip/patches-5.4/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch Normal file
View File

@ -0,0 +1,28 @@
From 2795c8b31a686bdb8338f9404d18ef7a154f0d75 Mon Sep 17 00:00:00 2001
From: David Bauer <mail@david-bauer.net>
Date: Sun, 26 Jul 2020 13:32:59 +0200
Subject: [PATCH] arm64: rockchip: add OF node for USB eth on NanoPi R2S
This adds the OF node for the USB3 ethernet adapter on the FriendlyARM
NanoPi R2S. Add the correct value for the RTL8153 LED configuration
register to match the blink behavior of the other port on the device.
Signed-off-by: David Bauer <mail@david-bauer.net>
---
arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts | 7 +++++++
1 file changed, 7 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
@@ -354,4 +354,11 @@
&usbdrd_dwc3 {
dr_mode = "host";
status = "okay";
+
+ usb-eth@2 {
+ compatible = "realtek,rtl8153";
+ reg = <2>;
+
+ realtek,led-data = <0x87>;
+ };
};

0
target/linux/rockchip/patches-5.4/103-rockchip-add-hwmon-support-for-SoCs-and-GPUs.patch → target/linux/rockchip/patches-5.4/104-rockchip-add-hwmon-support-for-SoCs-and-GPUs.patch
View File