mirror of
https://github.com/hanwckf/immortalwrt-mt798x.git
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mediatek: remove unused mt7622/7623/7629 targets
This commit is contained in:
hanwckf
parent
b869f11410
commit
1cf1922e1a
@ -5,7 +5,7 @@ include $(TOPDIR)/rules.mk
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ARCH:=arm
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BOARD:=mediatek
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BOARDNAME:=MediaTek Ralink ARM
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SUBTARGETS:=mt7622 mt7623 mt7629 mt7986 mt7981
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SUBTARGETS:=mt7986 mt7981
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FEATURES:=squashfs nand emmc ramdisk fpu
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KERNEL_PATCHVER:=5.4
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@ -1,591 +0,0 @@
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/*
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* Copyright (c) 2018 MediaTek Inc.
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* Author: Ryder Lee <ryder.lee@mediatek.com>
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*
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* SPDX-License-Identifier: (GPL-2.0-only OR MIT)
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*/
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "mt7622.dtsi"
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#include "mt6380.dtsi"
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/ {
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model = "Bananapi BPI-R64";
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compatible = "bananapi,bpi-r64-rootdisk", "mediatek,mt7622";
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512 root=/dev/mmcblk0p7 rootfstype=squashfs,f2fs";
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};
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cpus {
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cpu@0 {
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proc-supply = <&mt6380_vcpu_reg>;
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sram-supply = <&mt6380_vm_reg>;
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};
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cpu@1 {
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proc-supply = <&mt6380_vcpu_reg>;
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sram-supply = <&mt6380_vm_reg>;
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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factory {
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label = "factory";
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linux,code = <BTN_0>;
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gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
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};
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wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 102 GPIO_ACTIVE_HIGH>;
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};
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};
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leds {
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compatible = "gpio-leds";
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green {
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label = "bpi-r64:pio:green";
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gpios = <&pio 89 GPIO_ACTIVE_HIGH>;
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};
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red {
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label = "bpi-r64:pio:red";
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gpios = <&pio 88 GPIO_ACTIVE_HIGH>;
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};
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};
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memory {
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reg = <0 0x40000000 0 0x40000000>;
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_5v: regulator-5v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-5V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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&bch {
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status = "disabled";
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};
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&btif {
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status = "okay";
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};
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&cir {
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pinctrl-names = "default";
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pinctrl-0 = <&irrx_pins>;
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status = "okay";
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};
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ð {
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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gmac1: mac@1 {
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compatible = "mediatek,eth-mac";
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reg = <1>;
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phy-mode = "rgmii";
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fixed-link {
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speed = <1000>;
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full-duplex;
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pause;
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};
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};
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mdio: mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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switch@1f {
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compatible = "mediatek,mt7531";
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reg = <0x1f>;
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reset-gpios = <&pio 54 0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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wan: port@0 {
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reg = <0>;
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label = "wan";
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};
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port@1 {
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reg = <1>;
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label = "lan0";
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};
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port@2 {
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reg = <2>;
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label = "lan1";
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};
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port@3 {
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reg = <3>;
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label = "lan2";
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};
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port@4 {
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reg = <4>;
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label = "lan3";
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};
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port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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};
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins>;
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status = "okay";
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_pins>;
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status = "okay";
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};
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&mmc0 {
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&emmc_pins_default>;
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pinctrl-1 = <&emmc_pins_uhs>;
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status = "okay";
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bus-width = <8>;
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max-frequency = <50000000>;
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cap-mmc-highspeed;
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mmc-hs200-1_8v;
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_1p8v>;
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assigned-clocks = <&topckgen CLK_TOP_MSDC30_0_SEL>;
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assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
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non-removable;
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};
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&mmc1 {
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&sd0_pins_default>;
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pinctrl-1 = <&sd0_pins_uhs>;
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status = "okay";
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bus-width = <4>;
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max-frequency = <50000000>;
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cap-sd-highspeed;
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r_smpl = <1>;
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cd-gpios = <&pio 81 GPIO_ACTIVE_LOW>;
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_3p3v>;
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assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>;
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assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
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};
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&nandc {
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pinctrl-names = "default";
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pinctrl-0 = <¶llel_nand_pins>;
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status = "disabled";
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};
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&nor_flash {
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pinctrl-names = "default";
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pinctrl-0 = <&spi_nor_pins>;
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status = "disabled";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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};
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};
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&pcie0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie0_pins>;
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status = "okay";
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};
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&pcie1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie1_pins>;
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status = "okay";
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};
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&pio {
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/* Attention: GPIO 90 is used to switch between PCIe@1,0 and
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* SATA functions. i.e. output-high: PCIe, output-low: SATA
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*/
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asm_sel {
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gpio-hog;
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gpios = <90 GPIO_ACTIVE_HIGH>;
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output-high;
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};
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/* eMMC is shared pin with parallel NAND */
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emmc_pins_default: emmc-pins-default {
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mux {
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function = "emmc", "emmc_rst";
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groups = "emmc";
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};
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/* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7",
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* "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4,
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* DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively
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*/
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conf-cmd-dat {
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pins = "NDL0", "NDL1", "NDL2",
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"NDL3", "NDL4", "NDL5",
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"NDL6", "NDL7", "NRB";
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input-enable;
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bias-pull-up;
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};
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conf-clk {
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pins = "NCLE";
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bias-pull-down;
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};
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};
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emmc_pins_uhs: emmc-pins-uhs {
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mux {
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function = "emmc";
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groups = "emmc";
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};
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conf-cmd-dat {
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pins = "NDL0", "NDL1", "NDL2",
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"NDL3", "NDL4", "NDL5",
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"NDL6", "NDL7", "NRB";
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input-enable;
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drive-strength = <4>;
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bias-pull-up;
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};
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conf-clk {
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pins = "NCLE";
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drive-strength = <4>;
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bias-pull-down;
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};
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};
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eth_pins: eth-pins {
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mux {
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function = "eth";
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groups = "mdc_mdio", "rgmii_via_gmac2";
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};
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};
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i2c1_pins: i2c1-pins {
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mux {
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function = "i2c";
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groups = "i2c1_0";
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};
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};
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i2c2_pins: i2c2-pins {
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mux {
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function = "i2c";
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groups = "i2c2_0";
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};
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};
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i2s1_pins: i2s1-pins {
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mux {
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function = "i2s";
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groups = "i2s_out_mclk_bclk_ws",
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"i2s1_in_data",
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"i2s1_out_data";
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};
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conf {
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pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK",
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"I2S_WS", "I2S_MCLK";
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drive-strength = <12>;
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bias-pull-down;
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};
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};
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irrx_pins: irrx-pins {
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mux {
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function = "ir";
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groups = "ir_1_rx";
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};
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};
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irtx_pins: irtx-pins {
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mux {
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function = "ir";
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groups = "ir_1_tx";
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};
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};
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/* Parallel nand is shared pin with eMMC */
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parallel_nand_pins: parallel-nand-pins {
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mux {
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function = "flash";
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groups = "par_nand";
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};
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};
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pcie0_pins: pcie0-pins {
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mux {
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function = "pcie";
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groups = "pcie0_pad_perst",
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"pcie0_1_waken",
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"pcie0_1_clkreq";
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};
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};
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pcie1_pins: pcie1-pins {
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mux {
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function = "pcie";
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groups = "pcie1_pad_perst",
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"pcie1_0_waken",
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"pcie1_0_clkreq";
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};
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};
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pmic_bus_pins: pmic-bus-pins {
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mux {
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function = "pmic";
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groups = "pmic_bus";
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};
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};
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pwm7_pins: pwm1-2-pins {
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mux {
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function = "pwm";
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groups = "pwm_ch7_2";
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};
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};
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wled_pins: wled-pins {
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mux {
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function = "led";
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groups = "wled";
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};
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};
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sd0_pins_default: sd0-pins-default {
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mux {
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function = "sd";
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groups = "sd_0";
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};
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/* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN",
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* "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1,
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* DAT2, DAT3, CMD, CLK for SD respectively.
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*/
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conf-cmd-data {
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pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
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"I2S2_IN","I2S4_OUT";
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input-enable;
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drive-strength = <8>;
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bias-pull-up;
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};
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conf-clk {
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pins = "I2S3_OUT";
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drive-strength = <12>;
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bias-pull-down;
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};
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conf-cd {
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pins = "TXD3";
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bias-pull-up;
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};
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};
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sd0_pins_uhs: sd0-pins-uhs {
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mux {
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function = "sd";
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groups = "sd_0";
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};
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conf-cmd-data {
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pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
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"I2S2_IN","I2S4_OUT";
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input-enable;
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bias-pull-up;
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};
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conf-clk {
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pins = "I2S3_OUT";
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bias-pull-down;
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};
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};
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/* Serial NAND is shared pin with SPI-NOR */
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serial_nand_pins: serial-nand-pins {
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mux {
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function = "flash";
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groups = "snfi";
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};
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};
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spic0_pins: spic0-pins {
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mux {
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function = "spi";
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groups = "spic0_0";
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};
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};
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spic1_pins: spic1-pins {
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mux {
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function = "spi";
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groups = "spic1_0";
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};
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};
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/* SPI-NOR is shared pin with serial NAND */
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spi_nor_pins: spi-nor-pins {
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mux {
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function = "flash";
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groups = "spi_nor";
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};
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};
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/* serial NAND is shared pin with SPI-NOR */
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serial_nand_pins: serial-nand-pins {
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mux {
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function = "flash";
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groups = "snfi";
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};
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};
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uart0_pins: uart0-pins {
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mux {
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function = "uart";
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groups = "uart0_0_tx_rx" ;
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};
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};
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uart2_pins: uart2-pins {
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mux {
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function = "uart";
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groups = "uart2_1_tx_rx" ;
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};
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};
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watchdog_pins: watchdog-pins {
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mux {
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function = "watchdog";
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groups = "watchdog";
|
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};
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};
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};
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&pwm {
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pinctrl-names = "default";
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pinctrl-0 = <&pwm7_pins>;
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status = "okay";
|
||||
};
|
||||
|
||||
&pwrap {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmic_bus_pins>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "disable";
|
||||
};
|
||||
|
||||
&sata_phy {
|
||||
status = "disable";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spic0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spic1_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ssusb {
|
||||
vusb33-supply = <®_3p3v>;
|
||||
vbus-supply = <®_5v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u3phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&watchdog {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&watchdog_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
@ -1,608 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2017 MediaTek Inc.
|
||||
* Author: Ming Huang <ming.huang@mediatek.com>
|
||||
* Sean Wang <sean.wang@mediatek.com>
|
||||
*
|
||||
* SPDX-License-Identifier: (GPL-2.0-only OR MIT)
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
#include "mt7622.dtsi"
|
||||
#include "mt6380.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Elecom WRC-2533";
|
||||
compatible = "elecom,wrc-2533gent", "mediatek,mt7622";
|
||||
|
||||
aliases {
|
||||
led-boot = &led_power;
|
||||
led-failsafe = &led_power;
|
||||
led-running = &led_power;
|
||||
led-upgrade = &led_power;
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512 console=ttyS0,115200n8";
|
||||
};
|
||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
proc-supply = <&mt6380_vcpu_reg>;
|
||||
sram-supply = <&mt6380_vm_reg>;
|
||||
};
|
||||
|
||||
cpu@1 {
|
||||
proc-supply = <&mt6380_vcpu_reg>;
|
||||
sram-supply = <&mt6380_vm_reg>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
poll-interval = <100>;
|
||||
|
||||
wps {
|
||||
label = "wps";
|
||||
linux,code = <KEY_WPS_BUTTON>;
|
||||
gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
factory {
|
||||
label = "factory";
|
||||
linux,code = <KEY_WPS_BUTTON>;
|
||||
gpios = <&pio 102 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
switch0 {
|
||||
label = "switch0";
|
||||
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_0>;
|
||||
linux,input-type = <EV_SW>;
|
||||
};
|
||||
|
||||
switch1 {
|
||||
label = "switch1";
|
||||
gpios = <&pio 16 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_1>;
|
||||
linux,input-type = <EV_SW>;
|
||||
};
|
||||
|
||||
switch2 {
|
||||
label = "switch2";
|
||||
gpios = <&pio 17 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_2>;
|
||||
linux,input-type = <EV_SW>;
|
||||
};
|
||||
|
||||
switch3 {
|
||||
label = "switch3";
|
||||
gpios = <&pio 18 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_3>;
|
||||
linux,input-type = <EV_SW>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led_power: power_g {
|
||||
label = "wrc-2533:green:power";
|
||||
gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
power_b {
|
||||
label = "wrc-2533:blue:power";
|
||||
gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
power_r {
|
||||
label = "wrc-2533:red:power";
|
||||
gpios = <&pio 73 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
usb {
|
||||
label = "wrc-2533:blue:usb";
|
||||
gpios = <&pio 74 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
wps {
|
||||
label = "wrc-2533:red:wps";
|
||||
gpios = <&pio 76 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
wifi2 {
|
||||
label = "wrc-2533:blue:wifi2g";
|
||||
gpios = <&pio 85 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
wifi5 {
|
||||
label = "wrc-2533:blue:wifi5g";
|
||||
gpios = <&pio 91 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
reg_usb_vbus: regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&pio 22 GPIO_ACTIVE_LOW>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0 0x40000000 0 0x3F000000>;
|
||||
};
|
||||
|
||||
reg_1p8v: regulator-1p8v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "fixed-1.8V";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "fixed-3.3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
rtkgsw: rtkgsw@0 {
|
||||
compatible = "mediatek,rtk-gsw";
|
||||
mediatek,ethsys = <ðsys>;
|
||||
mediatek,mdio = <&mdio>;
|
||||
mediatek,reset-pin = <&pio 54 0>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&pcie0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&slot0 {
|
||||
mt7615@0,0 {
|
||||
reg = <0x0000 0 0 0 0>;
|
||||
mediatek,mtd-eeprom = <&factory 0x05000>;
|
||||
};
|
||||
};
|
||||
|
||||
&pio {
|
||||
/* eMMC is shared pin with parallel NAND */
|
||||
emmc_pins_default: emmc-pins-default {
|
||||
mux {
|
||||
function = "emmc", "emmc_rst";
|
||||
groups = "emmc";
|
||||
};
|
||||
|
||||
/* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7",
|
||||
* "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4,
|
||||
* DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively
|
||||
*/
|
||||
conf-cmd-dat {
|
||||
pins = "NDL0", "NDL1", "NDL2",
|
||||
"NDL3", "NDL4", "NDL5",
|
||||
"NDL6", "NDL7", "NRB";
|
||||
input-enable;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
conf-clk {
|
||||
pins = "NCLE";
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
emmc_pins_uhs: emmc-pins-uhs {
|
||||
mux {
|
||||
function = "emmc";
|
||||
groups = "emmc";
|
||||
};
|
||||
|
||||
conf-cmd-dat {
|
||||
pins = "NDL0", "NDL1", "NDL2",
|
||||
"NDL3", "NDL4", "NDL5",
|
||||
"NDL6", "NDL7", "NRB";
|
||||
input-enable;
|
||||
drive-strength = <4>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
conf-clk {
|
||||
pins = "NCLE";
|
||||
drive-strength = <4>;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
eth_pins: eth-pins {
|
||||
mux {
|
||||
function = "eth";
|
||||
groups = "mdc_mdio", "rgmii_via_gmac2";
|
||||
};
|
||||
};
|
||||
|
||||
i2c1_pins: i2c1-pins {
|
||||
mux {
|
||||
function = "i2c";
|
||||
groups = "i2c1_0";
|
||||
};
|
||||
};
|
||||
|
||||
i2c2_pins: i2c2-pins {
|
||||
mux {
|
||||
function = "i2c";
|
||||
groups = "i2c2_0";
|
||||
};
|
||||
};
|
||||
|
||||
i2s1_pins: i2s1-pins {
|
||||
mux {
|
||||
function = "i2s";
|
||||
groups = "i2s_out_mclk_bclk_ws",
|
||||
"i2s1_in_data",
|
||||
"i2s1_out_data";
|
||||
};
|
||||
|
||||
conf {
|
||||
pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK",
|
||||
"I2S_WS", "I2S_MCLK";
|
||||
drive-strength = <12>;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
irrx_pins: irrx-pins {
|
||||
mux {
|
||||
function = "ir";
|
||||
groups = "ir_1_rx";
|
||||
};
|
||||
};
|
||||
|
||||
irtx_pins: irtx-pins {
|
||||
mux {
|
||||
function = "ir";
|
||||
groups = "ir_1_tx";
|
||||
};
|
||||
};
|
||||
|
||||
/* Parallel nand is shared pin with eMMC */
|
||||
parallel_nand_pins: parallel-nand-pins {
|
||||
mux {
|
||||
function = "flash";
|
||||
groups = "par_nand";
|
||||
};
|
||||
};
|
||||
|
||||
pcie0_pins: pcie0-pins {
|
||||
mux {
|
||||
function = "pcie";
|
||||
groups = "pcie0_pad_perst",
|
||||
"pcie0_1_waken",
|
||||
"pcie0_1_clkreq";
|
||||
};
|
||||
};
|
||||
|
||||
pcie1_pins: pcie1-pins {
|
||||
mux {
|
||||
function = "pcie";
|
||||
groups = "pcie1_pad_perst",
|
||||
"pcie1_0_waken",
|
||||
"pcie1_0_clkreq";
|
||||
};
|
||||
};
|
||||
|
||||
pmic_bus_pins: pmic-bus-pins {
|
||||
mux {
|
||||
function = "pmic";
|
||||
groups = "pmic_bus";
|
||||
};
|
||||
};
|
||||
|
||||
pwm7_pins: pwm1-2-pins {
|
||||
mux {
|
||||
function = "pwm";
|
||||
groups = "pwm_ch7_2";
|
||||
};
|
||||
};
|
||||
|
||||
wled_pins: wled-pins {
|
||||
mux {
|
||||
function = "led";
|
||||
groups = "wled";
|
||||
};
|
||||
};
|
||||
|
||||
sd0_pins_default: sd0-pins-default {
|
||||
mux {
|
||||
function = "sd";
|
||||
groups = "sd_0";
|
||||
};
|
||||
|
||||
/* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN",
|
||||
* "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1,
|
||||
* DAT2, DAT3, CMD, CLK for SD respectively.
|
||||
*/
|
||||
conf-cmd-data {
|
||||
pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
|
||||
"I2S2_IN","I2S4_OUT";
|
||||
input-enable;
|
||||
drive-strength = <8>;
|
||||
bias-pull-up;
|
||||
};
|
||||
conf-clk {
|
||||
pins = "I2S3_OUT";
|
||||
drive-strength = <12>;
|
||||
bias-pull-down;
|
||||
};
|
||||
conf-cd {
|
||||
pins = "TXD3";
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
sd0_pins_uhs: sd0-pins-uhs {
|
||||
mux {
|
||||
function = "sd";
|
||||
groups = "sd_0";
|
||||
};
|
||||
|
||||
conf-cmd-data {
|
||||
pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
|
||||
"I2S2_IN","I2S4_OUT";
|
||||
input-enable;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
conf-clk {
|
||||
pins = "I2S3_OUT";
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
/* Serial NAND is shared pin with SPI-NOR */
|
||||
serial_nand_pins: serial-nand-pins {
|
||||
mux {
|
||||
function = "flash";
|
||||
groups = "snfi";
|
||||
};
|
||||
};
|
||||
|
||||
spic0_pins: spic0-pins {
|
||||
mux {
|
||||
function = "spi";
|
||||
groups = "spic0_0";
|
||||
};
|
||||
};
|
||||
|
||||
spic1_pins: spic1-pins {
|
||||
mux {
|
||||
function = "spi";
|
||||
groups = "spic1_0";
|
||||
};
|
||||
};
|
||||
|
||||
/* SPI-NOR is shared pin with serial NAND */
|
||||
spi_nor_pins: spi-nor-pins {
|
||||
mux {
|
||||
function = "flash";
|
||||
groups = "spi_nor";
|
||||
};
|
||||
};
|
||||
|
||||
/* serial NAND is shared pin with SPI-NOR */
|
||||
serial_nand_pins: serial-nand-pins {
|
||||
mux {
|
||||
function = "flash";
|
||||
groups = "snfi";
|
||||
};
|
||||
};
|
||||
|
||||
uart0_pins: uart0-pins {
|
||||
mux {
|
||||
function = "uart";
|
||||
groups = "uart0_0_tx_rx" ;
|
||||
};
|
||||
};
|
||||
|
||||
uart2_pins: uart2-pins {
|
||||
mux {
|
||||
function = "uart";
|
||||
groups = "uart2_1_tx_rx" ;
|
||||
};
|
||||
};
|
||||
|
||||
watchdog_pins: watchdog-pins {
|
||||
mux {
|
||||
function = "watchdog";
|
||||
groups = "watchdog";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&bch {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&btif {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&cir {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&irrx_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ð {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <ð_pins>;
|
||||
gmac0: mac@0 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <0>;
|
||||
phy-mode = "sgmii";
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
|
||||
gmac1: mac@1 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <1>;
|
||||
phy-mode = "rgmii";
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
|
||||
mdio: mdio-bus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm7_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwrap {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmic_bus_pins>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&snfi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&serial_nand_pins>;
|
||||
status = "okay";
|
||||
|
||||
spi_nand@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spi-nand";
|
||||
spi-max-frequency = <104000000>;
|
||||
reg = <0>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "Preloader";
|
||||
reg = <0x00000 0x0080000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@80000 {
|
||||
label = "ATF";
|
||||
reg = <0x80000 0x0040000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@c0000 {
|
||||
label = "uboot";
|
||||
reg = <0xc0000 0x0080000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@140000 {
|
||||
label = "uboot-env";
|
||||
reg = <0x140000 0x0080000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
factory: partition@1c0000 {
|
||||
label = "factory";
|
||||
reg = <0x1c0000 0x0040000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@200000 {
|
||||
label = "firmware";
|
||||
reg = <0x200000 0x2000000>;
|
||||
};
|
||||
|
||||
partition@2200000 {
|
||||
label = "reserved";
|
||||
reg = <0x2200000 0x4000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spic0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spic1_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ssusb {
|
||||
vusb33-supply = <®_3p3v>;
|
||||
vbus-supply = <®_usb_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u3phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&watchdog {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&watchdog_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wmac {
|
||||
mediatek,mtd-eeprom = <&factory 0x0000>;
|
||||
status = "okay";
|
||||
};
|
||||
@ -1,644 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2018 MediaTek Inc.
|
||||
* Author: Ryder Lee <ryder.lee@mediatek.com>
|
||||
*
|
||||
* SPDX-License-Identifier: (GPL-2.0-only OR MIT)
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
#include "mt7622.dtsi"
|
||||
#include "mt6380.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MT7622_MT7531 RFB";
|
||||
compatible = "mediatek,mt7622,ubi";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
|
||||
};
|
||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
proc-supply = <&mt6380_vcpu_reg>;
|
||||
sram-supply = <&mt6380_vm_reg>;
|
||||
};
|
||||
|
||||
cpu@1 {
|
||||
proc-supply = <&mt6380_vcpu_reg>;
|
||||
sram-supply = <&mt6380_vm_reg>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
factory {
|
||||
label = "factory";
|
||||
linux,code = <BTN_0>;
|
||||
gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
wps {
|
||||
label = "wps";
|
||||
linux,code = <KEY_WPS_BUTTON>;
|
||||
gpios = <&pio 102 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
gsw: gsw@0 {
|
||||
compatible = "mediatek,mt753x";
|
||||
mediatek,ethsys = <ðsys>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
green {
|
||||
label = "bpi-r64:pio:green";
|
||||
gpios = <&pio 89 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
red {
|
||||
label = "bpi-r64:pio:red";
|
||||
gpios = <&pio 88 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0 0x40000000 0 0x40000000>;
|
||||
};
|
||||
|
||||
reg_1p8v: regulator-1p8v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "fixed-1.8V";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "fixed-3.3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_5v: regulator-5v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "fixed-5V";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&bch {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&btif {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cir {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&irrx_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ð {
|
||||
status = "okay";
|
||||
gmac0: mac@0 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <0>;
|
||||
phy-mode = "2500base-x";
|
||||
|
||||
fixed-link {
|
||||
speed = <2500>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
|
||||
gmac1: mac@1 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <1>;
|
||||
phy-mode = "rgmii";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
|
||||
mdio: mdio-bus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&gsw {
|
||||
mediatek,mdio = <&mdio>;
|
||||
mediatek,portmap = "llllw";
|
||||
mediatek,mdio_master_pinmux = <0>;
|
||||
reset-gpios = <&pio 54 0>;
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "okay";
|
||||
|
||||
port5: port@5 {
|
||||
compatible = "mediatek,mt753x-port";
|
||||
reg = <5>;
|
||||
phy-mode = "rgmii";
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
port6: port@6 {
|
||||
compatible = "mediatek,mt753x-port";
|
||||
reg = <6>;
|
||||
phy-mode = "sgmii";
|
||||
fixed-link {
|
||||
speed = <2500>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc0 {
|
||||
pinctrl-names = "default", "state_uhs";
|
||||
pinctrl-0 = <&emmc_pins_default>;
|
||||
pinctrl-1 = <&emmc_pins_uhs>;
|
||||
status = "okay";
|
||||
bus-width = <8>;
|
||||
max-frequency = <50000000>;
|
||||
cap-mmc-highspeed;
|
||||
mmc-hs200-1_8v;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
vqmmc-supply = <®_1p8v>;
|
||||
assigned-clocks = <&topckgen CLK_TOP_MSDC30_0_SEL>;
|
||||
assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
|
||||
non-removable;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
pinctrl-names = "default", "state_uhs";
|
||||
pinctrl-0 = <&sd0_pins_default>;
|
||||
pinctrl-1 = <&sd0_pins_uhs>;
|
||||
status = "okay";
|
||||
bus-width = <4>;
|
||||
max-frequency = <50000000>;
|
||||
cap-sd-highspeed;
|
||||
r_smpl = <1>;
|
||||
cd-gpios = <&pio 81 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
vqmmc-supply = <®_3p3v>;
|
||||
assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>;
|
||||
assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
|
||||
};
|
||||
|
||||
&nandc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <¶llel_nand_pins>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&nor_flash {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi_nor_pins>;
|
||||
status = "disabled";
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&pcie0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie1_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pio {
|
||||
/* Attention: GPIO 90 is used to switch between PCIe@1,0 and
|
||||
* SATA functions. i.e. output-high: PCIe, output-low: SATA
|
||||
*/
|
||||
asm_sel {
|
||||
gpio-hog;
|
||||
gpios = <90 GPIO_ACTIVE_HIGH>;
|
||||
output-high;
|
||||
};
|
||||
|
||||
/* eMMC is shared pin with parallel NAND */
|
||||
emmc_pins_default: emmc-pins-default {
|
||||
mux {
|
||||
function = "emmc", "emmc_rst";
|
||||
groups = "emmc";
|
||||
};
|
||||
|
||||
/* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7",
|
||||
* "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4,
|
||||
* DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively
|
||||
*/
|
||||
conf-cmd-dat {
|
||||
pins = "NDL0", "NDL1", "NDL2",
|
||||
"NDL3", "NDL4", "NDL5",
|
||||
"NDL6", "NDL7", "NRB";
|
||||
input-enable;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
conf-clk {
|
||||
pins = "NCLE";
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
emmc_pins_uhs: emmc-pins-uhs {
|
||||
mux {
|
||||
function = "emmc";
|
||||
groups = "emmc";
|
||||
};
|
||||
|
||||
conf-cmd-dat {
|
||||
pins = "NDL0", "NDL1", "NDL2",
|
||||
"NDL3", "NDL4", "NDL5",
|
||||
"NDL6", "NDL7", "NRB";
|
||||
input-enable;
|
||||
drive-strength = <4>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
conf-clk {
|
||||
pins = "NCLE";
|
||||
drive-strength = <4>;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
eth_pins: eth-pins {
|
||||
mux {
|
||||
function = "eth";
|
||||
groups = "mdc_mdio", "rgmii_via_gmac2";
|
||||
};
|
||||
};
|
||||
|
||||
i2c1_pins: i2c1-pins {
|
||||
mux {
|
||||
function = "i2c";
|
||||
groups = "i2c1_0";
|
||||
};
|
||||
};
|
||||
|
||||
i2c2_pins: i2c2-pins {
|
||||
mux {
|
||||
function = "i2c";
|
||||
groups = "i2c2_0";
|
||||
};
|
||||
};
|
||||
|
||||
i2s1_pins: i2s1-pins {
|
||||
mux {
|
||||
function = "i2s";
|
||||
groups = "i2s_out_mclk_bclk_ws",
|
||||
"i2s1_in_data",
|
||||
"i2s1_out_data";
|
||||
};
|
||||
|
||||
conf {
|
||||
pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK",
|
||||
"I2S_WS", "I2S_MCLK";
|
||||
drive-strength = <12>;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
irrx_pins: irrx-pins {
|
||||
mux {
|
||||
function = "ir";
|
||||
groups = "ir_1_rx";
|
||||
};
|
||||
};
|
||||
|
||||
irtx_pins: irtx-pins {
|
||||
mux {
|
||||
function = "ir";
|
||||
groups = "ir_1_tx";
|
||||
};
|
||||
};
|
||||
|
||||
/* Parallel nand is shared pin with eMMC */
|
||||
parallel_nand_pins: parallel-nand-pins {
|
||||
mux {
|
||||
function = "flash";
|
||||
groups = "par_nand";
|
||||
};
|
||||
};
|
||||
|
||||
pcie0_pins: pcie0-pins {
|
||||
mux {
|
||||
function = "pcie";
|
||||
groups = "pcie0_pad_perst",
|
||||
"pcie0_1_waken",
|
||||
"pcie0_1_clkreq";
|
||||
};
|
||||
};
|
||||
|
||||
pcie1_pins: pcie1-pins {
|
||||
mux {
|
||||
function = "pcie";
|
||||
groups = "pcie1_pad_perst",
|
||||
"pcie1_0_waken",
|
||||
"pcie1_0_clkreq";
|
||||
};
|
||||
};
|
||||
|
||||
pmic_bus_pins: pmic-bus-pins {
|
||||
mux {
|
||||
function = "pmic";
|
||||
groups = "pmic_bus";
|
||||
};
|
||||
};
|
||||
|
||||
pwm7_pins: pwm1-2-pins {
|
||||
mux {
|
||||
function = "pwm";
|
||||
groups = "pwm_ch7_2";
|
||||
};
|
||||
};
|
||||
|
||||
wled_pins: wled-pins {
|
||||
mux {
|
||||
function = "led";
|
||||
groups = "wled";
|
||||
};
|
||||
};
|
||||
|
||||
sd0_pins_default: sd0-pins-default {
|
||||
mux {
|
||||
function = "sd";
|
||||
groups = "sd_0";
|
||||
};
|
||||
|
||||
/* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN",
|
||||
* "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1,
|
||||
* DAT2, DAT3, CMD, CLK for SD respectively.
|
||||
*/
|
||||
conf-cmd-data {
|
||||
pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
|
||||
"I2S2_IN","I2S4_OUT";
|
||||
input-enable;
|
||||
drive-strength = <8>;
|
||||
bias-pull-up;
|
||||
};
|
||||
conf-clk {
|
||||
pins = "I2S3_OUT";
|
||||
drive-strength = <12>;
|
||||
bias-pull-down;
|
||||
};
|
||||
conf-cd {
|
||||
pins = "TXD3";
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
sd0_pins_uhs: sd0-pins-uhs {
|
||||
mux {
|
||||
function = "sd";
|
||||
groups = "sd_0";
|
||||
};
|
||||
|
||||
conf-cmd-data {
|
||||
pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
|
||||
"I2S2_IN","I2S4_OUT";
|
||||
input-enable;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
conf-clk {
|
||||
pins = "I2S3_OUT";
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
/* Serial NAND is shared pin with SPI-NOR */
|
||||
serial_nand_pins: serial-nand-pins {
|
||||
mux {
|
||||
function = "flash";
|
||||
groups = "snfi";
|
||||
};
|
||||
};
|
||||
|
||||
spic0_pins: spic0-pins {
|
||||
mux {
|
||||
function = "spi";
|
||||
groups = "spic0_0";
|
||||
};
|
||||
};
|
||||
|
||||
spic1_pins: spic1-pins {
|
||||
mux {
|
||||
function = "spi";
|
||||
groups = "spic1_0";
|
||||
};
|
||||
};
|
||||
|
||||
/* SPI-NOR is shared pin with serial NAND */
|
||||
spi_nor_pins: spi-nor-pins {
|
||||
mux {
|
||||
function = "flash";
|
||||
groups = "spi_nor";
|
||||
};
|
||||
};
|
||||
|
||||
/* serial NAND is shared pin with SPI-NOR */
|
||||
serial_nand_pins: serial-nand-pins {
|
||||
mux {
|
||||
function = "flash";
|
||||
groups = "snfi";
|
||||
};
|
||||
};
|
||||
|
||||
uart0_pins: uart0-pins {
|
||||
mux {
|
||||
function = "uart";
|
||||
groups = "uart0_0_tx_rx" ;
|
||||
};
|
||||
};
|
||||
|
||||
uart2_pins: uart2-pins {
|
||||
mux {
|
||||
function = "uart";
|
||||
groups = "uart2_1_tx_rx" ;
|
||||
};
|
||||
};
|
||||
|
||||
watchdog_pins: watchdog-pins {
|
||||
mux {
|
||||
function = "watchdog";
|
||||
groups = "watchdog";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pwm {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm7_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwrap {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmic_bus_pins>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "disable";
|
||||
};
|
||||
|
||||
&sata_phy {
|
||||
status = "disable";
|
||||
};
|
||||
|
||||
&snfi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&serial_nand_pins>;
|
||||
status = "okay";
|
||||
|
||||
spi_nand@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spi-nand";
|
||||
spi-max-frequency = <104000000>;
|
||||
reg = <0>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "Preloader";
|
||||
reg = <0x00000 0x0080000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@80000 {
|
||||
label = "ATF";
|
||||
reg = <0x80000 0x0040000>;
|
||||
};
|
||||
|
||||
partition@c0000 {
|
||||
label = "Bootloader";
|
||||
reg = <0xc0000 0x0080000>;
|
||||
};
|
||||
|
||||
partition@140000 {
|
||||
label = "Config";
|
||||
reg = <0x140000 0x0080000>;
|
||||
};
|
||||
|
||||
factory: partition@1c0000 {
|
||||
label = "Factory";
|
||||
reg = <0x1c0000 0x0040000>;
|
||||
};
|
||||
|
||||
partition@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x400000>;
|
||||
};
|
||||
|
||||
partition@600000 {
|
||||
label = "ubi";
|
||||
reg = <0x600000 0x1C00000>;
|
||||
};
|
||||
|
||||
partition@2200000 {
|
||||
label = "User_data";
|
||||
reg = <0x2200000 0x4000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spic0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spic1_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ssusb {
|
||||
vusb33-supply = <®_3p3v>;
|
||||
vbus-supply = <®_5v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u3phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&watchdog {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&watchdog_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wmac {
|
||||
mediatek,mtd-eeprom = <&factory 0x0000>;
|
||||
status = "okay";
|
||||
};
|
||||
@ -1,327 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
/dts-v1/;
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
|
||||
#include "mt7622.dtsi"
|
||||
#include "mt6380.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Ubiquiti UniFi 6 LR";
|
||||
compatible = "ubnt,unifi-6-lr", "mediatek,mt7622";
|
||||
|
||||
aliases {
|
||||
led-boot = &led_blue;
|
||||
led-failsafe = &led_blue;
|
||||
led-running = &led_blue;
|
||||
led-upgrade = &led_blue;
|
||||
label-mac-device = &gmac0;
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512 console=ttyS0,115200n8";
|
||||
};
|
||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
proc-supply = <&mt6380_vcpu_reg>;
|
||||
sram-supply = <&mt6380_vm_reg>;
|
||||
};
|
||||
|
||||
cpu@1 {
|
||||
proc-supply = <&mt6380_vcpu_reg>;
|
||||
sram-supply = <&mt6380_vm_reg>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
reset {
|
||||
label = "reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&pio 62 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0 0x40000000 0 0x3f000000>;
|
||||
};
|
||||
|
||||
reg_1p8v: regulator-1p8v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "fixed-1.8V";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "fixed-3.3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&pcie0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&slot0 {
|
||||
wifi@0,0 {
|
||||
reg = <0x0 0 0 0 0>;
|
||||
mediatek,mtd-eeprom = <&factory 0x20000>;
|
||||
mtd-mac-address = <&eeprom 0x6>;
|
||||
ieee80211-freq-limit = <5000000 6000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&pio {
|
||||
eth_pins: eth-pins {
|
||||
mux {
|
||||
function = "eth";
|
||||
groups = "mdc_mdio", "rgmii_via_gmac2";
|
||||
};
|
||||
};
|
||||
|
||||
pcie0_pins: pcie0-pins {
|
||||
mux {
|
||||
function = "pcie";
|
||||
groups = "pcie0_pad_perst",
|
||||
"pcie0_1_waken",
|
||||
"pcie0_1_clkreq";
|
||||
};
|
||||
};
|
||||
|
||||
pcie1_pins: pcie1-pins {
|
||||
mux {
|
||||
function = "pcie";
|
||||
groups = "pcie1_pad_perst",
|
||||
"pcie1_0_waken",
|
||||
"pcie1_0_clkreq";
|
||||
};
|
||||
};
|
||||
|
||||
pmic_bus_pins: pmic-bus-pins {
|
||||
mux {
|
||||
function = "pmic";
|
||||
groups = "pmic_bus";
|
||||
};
|
||||
};
|
||||
|
||||
spi_nor_pins: spi-nor-pins {
|
||||
mux {
|
||||
function = "flash";
|
||||
groups = "spi_nor";
|
||||
};
|
||||
};
|
||||
|
||||
uart0_pins: uart0-pins {
|
||||
mux {
|
||||
function = "uart";
|
||||
groups = "uart0_0_tx_rx" ;
|
||||
};
|
||||
};
|
||||
|
||||
uart3_pins: uart3-pins {
|
||||
mux {
|
||||
function = "uart";
|
||||
groups = "uart3_1_tx_rx" ;
|
||||
};
|
||||
};
|
||||
|
||||
i2c0_pins: i2c0-pins {
|
||||
mux {
|
||||
function = "i2c";
|
||||
groups = "i2c0";
|
||||
};
|
||||
};
|
||||
|
||||
watchdog_pins: watchdog-pins {
|
||||
mux {
|
||||
function = "watchdog";
|
||||
groups = "watchdog";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&bch {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&btif {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ð {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <ð_pins>;
|
||||
|
||||
gmac0: mac@0 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <0>;
|
||||
|
||||
phy-mode = "2500base-x";
|
||||
mtd-mac-address = <&eeprom 0x0>;
|
||||
|
||||
fixed-link {
|
||||
speed = <2500>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
mdio: mdio-bus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ethernet-phy@8 {
|
||||
/* Marvell AQRate AQR112W - no driver */
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <0x8>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pwrap {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmic_bus_pins>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&nor_flash {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi_nor_pins>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <50000000>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "preloader";
|
||||
reg = <0x0 0x40000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@40000 {
|
||||
label = "atf";
|
||||
reg = <0x40000 0x20000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@60000 {
|
||||
label = "u-boot";
|
||||
reg = <0x60000 0x60000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@c0000 {
|
||||
label = "u-boot-env";
|
||||
reg = <0xc0000 0x10000>;
|
||||
};
|
||||
|
||||
factory: partition@d0000 {
|
||||
label = "factory";
|
||||
reg = <0xd0000 0x40000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
eeprom: partition@110000 {
|
||||
label = "eeprom";
|
||||
reg = <0x110000 0x10000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@120000 {
|
||||
label = "bs";
|
||||
reg = <0x120000 0x10000>;
|
||||
};
|
||||
|
||||
partition@130000 {
|
||||
label = "cfg";
|
||||
reg = <0x130000 0x100000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@230000 {
|
||||
compatible = "denx,fit";
|
||||
label = "firmware";
|
||||
reg = <0x230000 0x1ee0000>;
|
||||
};
|
||||
|
||||
partition@2110000 {
|
||||
label = "kernel1";
|
||||
reg = <0x2110000 0x1ee0000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins>;
|
||||
status = "okay";
|
||||
|
||||
/* MT7915 Bluetooth */
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
status = "okay";
|
||||
|
||||
led-controller@30 {
|
||||
compatible = "ubnt,ledbar";
|
||||
reg = <0x30>;
|
||||
|
||||
enable-gpio = <&pio 59 0>;
|
||||
|
||||
red {
|
||||
label = "red";
|
||||
};
|
||||
|
||||
green {
|
||||
label = "green";
|
||||
};
|
||||
|
||||
led_blue: blue {
|
||||
label = "blue";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&watchdog {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&watchdog_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wmac {
|
||||
mediatek,mtd-eeprom = <&factory 0x0>;
|
||||
mtd-mac-address = <&eeprom 0x0>;
|
||||
status = "okay";
|
||||
};
|
||||
@ -1,4 +0,0 @@
|
||||
config MTK_BOOT_PARTSIZE
|
||||
int "Boot (SD Card/eMMC) filesystem partition size (in MiB)"
|
||||
depends on TARGET_mediatek_mt7623_DEVICE_bpi_bananapi-r2 || TARGET_DEVICE_mediatek_mt7623_DEVICE_bpi_bananapi-r2 || TARGET_mediatek_mt7623_DEVICE_unielec_u7623-emmc || TARGET_DEVICE_mediatek_mt7623_DEVICE_unielec_u7623-emmc
|
||||
default 32
|
||||
@ -6,16 +6,6 @@
|
||||
include $(TOPDIR)/rules.mk
|
||||
include $(INCLUDE_DIR)/image.mk
|
||||
|
||||
define Build/sysupgrade-emmc
|
||||
rm -f $@.recovery
|
||||
mkfs.fat -C $@.recovery 3070
|
||||
|
||||
./gen_$(SUBTARGET)_emmc_img.sh $@ \
|
||||
$(IMAGE_KERNEL) \
|
||||
$@.recovery \
|
||||
$(IMAGE_ROOTFS)
|
||||
endef
|
||||
|
||||
# default all platform image(fit) build
|
||||
define Device/Default
|
||||
PROFILES = Default $$(DEVICE_NAME)
|
||||
|
||||
@ -1,19 +0,0 @@
|
||||
#!/bin/sh
|
||||
|
||||
OUTPUT_FILE=$1
|
||||
KERNEL_FILE=$2
|
||||
RECOVERY_FILE=$3
|
||||
ROOTFS_FILE=$4
|
||||
|
||||
BS=512
|
||||
|
||||
#RECOVERY_OFFSET= kernel size / BS = 20M / 512 (blocks)
|
||||
RECOVERY_OFFSET=40960
|
||||
|
||||
#ROOTFS_OFFSET = RECOVERY_OFFSET + (RECOVERY_SIZE / BS)
|
||||
# = 40960 + (10M / 512) (blocks)
|
||||
ROOTFS_OFFSET=61440
|
||||
dd bs="$BS" of="$OUTPUT_FILE" if="$KERNEL_FILE"
|
||||
dd bs="$BS" of="$OUTPUT_FILE" if="$RECOVERY_FILE" seek="$RECOVERY_OFFSET"
|
||||
dd bs="$BS" of="$OUTPUT_FILE" if="$ROOTFS_FILE" seek="$ROOTFS_OFFSET"
|
||||
dd if=/dev/zero of="$OUTPUT_FILE" bs=128k count=1 oflag=append conv=notrunc
|
||||
@ -1,30 +0,0 @@
|
||||
#!/bin/sh
|
||||
#
|
||||
# This script is used only to create the "legacy" image for UniElec U7623,
|
||||
# suitable for upgrading from the vendor OpenWrt or from OpenWrt 19.07.
|
||||
#
|
||||
OUTPUT_FILE=$1
|
||||
KERNEL_FILE=$2
|
||||
RECOVERY_FILE=$3
|
||||
ROOTFS_FILE=$4
|
||||
|
||||
BS=512
|
||||
|
||||
# These two offsets are relative to the absolute location of the kernel on the mmc
|
||||
# (0xA00), so their position in the image is -2560 blocks
|
||||
#
|
||||
# They must be kept in sync with the default command line for U7623.
|
||||
# blkdevparts=mmcblk0:3M@6M(recovery),256M@9M(root)"
|
||||
#
|
||||
# For upgrading from the vendor firmware, the total image must fit in its
|
||||
# MTD 'firmware' partition, which is typically 36MiB.
|
||||
|
||||
# In the legacy image, the uImage starts at block 0xa00. Allow 4864 KiB (9728) blocks.
|
||||
RECOVERY_OFFSET=9728
|
||||
# The recovery image is 3MiB, or 6144 blocks.
|
||||
ROOTFS_OFFSET=15872
|
||||
|
||||
dd bs="$BS" of="$OUTPUT_FILE" if="$KERNEL_FILE"
|
||||
dd bs="$BS" of="$OUTPUT_FILE" if="$RECOVERY_FILE" seek="$RECOVERY_OFFSET"
|
||||
dd bs="$BS" of="$OUTPUT_FILE" if="$ROOTFS_FILE" seek="$ROOTFS_OFFSET"
|
||||
dd if=/dev/zero of="$OUTPUT_FILE" bs=128k count=1 oflag=append conv=notrunc
|
||||
@ -1,147 +0,0 @@
|
||||
#!/bin/bash
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
#
|
||||
# Copyright © 2019 Alexey Loukianov <lx2@lexa2.ru>
|
||||
# Copyright © 2020 David Woodhouse <dwmw2@infradead.org>
|
||||
|
||||
# Generates a bootable SD card image for Banana Pi R2 (and probably
|
||||
# other similar boards) as documented at
|
||||
# http://www.fw-web.de/dokuwiki/doku.php?id=en:bpi-r2:storage
|
||||
#
|
||||
# The first sector must contain the SDMMC_BOOT header shown
|
||||
# below, and also contains the MBR partition table in the end
|
||||
# of the sector. The partition table must contain no active
|
||||
# partitions.
|
||||
#
|
||||
# The second sector must contain the BRLYT header, and the
|
||||
# special preloader image goes in sector 4; 2KiB into the image.
|
||||
#
|
||||
# The preloader loads U-Boot from sector 640; 320KiB into the image.
|
||||
# The location and the size (512KiB) are fixed and not read from
|
||||
# the partition table. We set up a partition for it merely for
|
||||
# our own convenience for upgrades, etc.
|
||||
#
|
||||
# The second partition is a FAT file system containing the kernel
|
||||
# image and a uboot.env file, which is provided to this script as
|
||||
# $4 (bootfs image). Its size is configurable with the
|
||||
# CONFIG_MTK_BOOT_PARTSIZE option; by default 32MiB.
|
||||
#
|
||||
# The root filesystem comes next in the third partition.
|
||||
#
|
||||
#
|
||||
# ------------------------ Sector Offset
|
||||
# | MBR + SDMMC_BOOT | 0 0x0
|
||||
# |----------------------|
|
||||
# | BRLYT header | 1 0x200
|
||||
# |----------------------|
|
||||
# . .
|
||||
# . .
|
||||
# |----------------------|
|
||||
# | | 4 0x800
|
||||
# | |
|
||||
# | Preloader |
|
||||
# . .
|
||||
# . .
|
||||
# | | 639
|
||||
# |----------------------|
|
||||
# | MBR partition #1 | 640 0x50000
|
||||
# | |
|
||||
# | U-Boot |
|
||||
# . .
|
||||
# . .
|
||||
# | | 1663
|
||||
# |----------------------|
|
||||
# | MBR partition #2 |
|
||||
# | |
|
||||
# | FAT partition | ( MTK_BOOT_PARTSIZE
|
||||
# . . default 32MiB )
|
||||
# . (kernel, uEnv) .
|
||||
# | |
|
||||
# |----------------------|
|
||||
# | MBR partition #3 |
|
||||
# | |
|
||||
# | Root partition |
|
||||
# | | ( TARGET_ROOTFS_PARTSIZE
|
||||
# | (squashfs+overlay | default 104MiB )
|
||||
# . or ext4, etc.) .
|
||||
# . .
|
||||
# | |
|
||||
# ------------------------
|
||||
#
|
||||
# For eMMC boot, everything up to and including the preloader must be
|
||||
# written to /dev/mmcblk0boot0, with the SDMMC_BOOT header changed to
|
||||
# read EMMC_BOOT\0 instead.
|
||||
#
|
||||
# The contents of the main eMMC are identical to the SD card layout,
|
||||
# with the preloader loading 512KiB of U-Boot starting at 0x50000.
|
||||
|
||||
usage() {
|
||||
echo "SYNTAX: $0 sd <file> <preloader image> <u-boot image> <u-boot offset> <bootfs image> <rootfs image> <bootfs size> <rootfs size>"
|
||||
echo " OR: $0 emmc <file> <preloader image>"
|
||||
exit 1
|
||||
}
|
||||
|
||||
set -e
|
||||
|
||||
PRELOADER_OFFSET=2 # 2KiB
|
||||
|
||||
SDMMC_BOOT="SDMMC_BOOT\x00\x00\x01\x00\x00\x00\x00\x02\x00\x00"
|
||||
EMMC_BOOT="EMMC_BOOT\x00\x00\x00\x01\x00\x00\x00\x00\x02\x00\x00"
|
||||
BRLYT="BRLYT\x00\x00\x00\x01\x00\x00\x00\x00\x08\x00\x00\
|
||||
\x00\x08\x00\x00\x42\x42\x42\x42\x08\x00\x01\x00\x00\x08\x00\x00\
|
||||
\x00\x08\x00\x00\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
|
||||
|
||||
case $1 in
|
||||
sd)
|
||||
[ $# -eq 9 ] || usage
|
||||
OUTPUT="$2"
|
||||
PRELOADER="$3"
|
||||
UBOOT="$4"
|
||||
UBOOTOFS="$5"
|
||||
BOOTFS="$6"
|
||||
ROOTFS="$7"
|
||||
BOOTFSSIZE="$8"
|
||||
ROOTFSSIZE="$9"
|
||||
|
||||
head=4
|
||||
sect=63
|
||||
|
||||
set $(ptgen -o $OUTPUT -h $head -s $sect -a 0 -l 1024 \
|
||||
-t 41 -p 512k@${UBOOTOFS} \
|
||||
-t c -p ${BOOTFSSIZE}M \
|
||||
-t 83 -p ${ROOTFSSIZE}M )
|
||||
|
||||
UBOOT_OFFSET="$(($1 / 512))"
|
||||
UBOOT_SIZE="$(($2 / 512))"
|
||||
BOOTFS_OFFSET="$(($3 / 512))"
|
||||
BOOTFS_SIZE="$(($4 / 512))"
|
||||
ROOTFS_OFFSET="$(($5 / 512))"
|
||||
ROOTFS_SIZE="$(($6 / 512))"
|
||||
|
||||
echo -en "${SDMMC_BOOT}" | dd bs=1 of="${OUTPUT}" seek=0 conv=notrunc
|
||||
echo -en "${BRLYT}" | dd bs=1 of="${OUTPUT}" seek=512 conv=notrunc
|
||||
|
||||
# For eMMC-only boards like U7623 the preloader doesn't need to be included in the
|
||||
# main image as it's only ever needed in the eMMC boot partition.
|
||||
if [ -r ${PRELOADER} ]; then
|
||||
dd bs=1024 if="${PRELOADER}" of="${OUTPUT}" seek="${PRELOADER_OFFSET}" conv=notrunc
|
||||
fi
|
||||
dd bs=512 if="${UBOOT}" of="${OUTPUT}" seek="${UBOOT_OFFSET}" conv=notrunc
|
||||
dd bs=512 if="${BOOTFS}" of="${OUTPUT}" seek="${BOOTFS_OFFSET}" conv=notrunc
|
||||
dd bs=512 if="${ROOTFS}" of="${OUTPUT}" seek="${ROOTFS_OFFSET}" conv=notrunc
|
||||
dd bs=128k if=/dev/zero of="${OUTPUT}" count=1 oflag=append conv=notrunc
|
||||
;;
|
||||
emmc)
|
||||
[ $# -eq 3 ] || usage
|
||||
OUTPUT="$2"
|
||||
PRELOADER="$3"
|
||||
|
||||
echo -en "${EMMC_BOOT}" | dd bs=1 of="${OUTPUT}" seek=0
|
||||
echo -en "${BRLYT}" | dd bs=1 of="${OUTPUT}" seek=512 conv=notrunc
|
||||
|
||||
dd bs=1024 if="${PRELOADER}" of="${OUTPUT}" seek="${PRELOADER_OFFSET}" conv=notrunc
|
||||
;;
|
||||
*)
|
||||
usage
|
||||
;;
|
||||
esac
|
||||
@ -1,73 +0,0 @@
|
||||
#!/bin/sh
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
#
|
||||
# Copyright © 2020 David Woodhouse <dwmw2@infradead.org>
|
||||
#
|
||||
# Generate as "scatter file" for use with the MediaTek SP Flash tool for
|
||||
# writing images to MediaTek boards. This can be used to write images
|
||||
# even on a bricked board which has no preloader installed, or broken
|
||||
# U-Boot.
|
||||
#
|
||||
# NOTE: At the time of writing (2020-07-20), the Linux tool linked from
|
||||
# the front page of https://spflashtool.com/ is out of date and does not
|
||||
# support MT7623. The newer v5.1916 found on the download page at
|
||||
# https://spflashtool.com/download/ has been tested on UniElec U7623 and
|
||||
# Banana Pi R2 from Linux, and does work.
|
||||
#
|
||||
|
||||
SOC=$1
|
||||
IMAGE=${2%.gz}
|
||||
PROJECT=${3%-scatter.txt}
|
||||
DEVICENAME="$4"
|
||||
|
||||
cat <<EOF
|
||||
# OpenWrt eMMC scatter file for ${DEVICENAME}
|
||||
# For use with SP Flash Tool: https://spflashtool.com/download/
|
||||
#
|
||||
# Unzip the file system file ${PROJECT}-${IMAGE}.gz before flashing.
|
||||
# Connect the device's USB port, although it won't appear to the host yet.
|
||||
# Load this scatter file into the SP Flash Tool, select 'Format All + Download'
|
||||
# After pressing the 'Download' button, power on the board.
|
||||
# The /dev/ttyACM0 device should appear on USB and the tool should find it.
|
||||
|
||||
- general: MTK_PLATFORM_CFG
|
||||
info:
|
||||
- config_version: V1.1.2
|
||||
platform: ${SOC}
|
||||
project: ${PROJECT}
|
||||
storage: EMMC
|
||||
boot_channel: MSDC_0
|
||||
block_size: 0x20000
|
||||
|
||||
- partition_index: SYS0
|
||||
partition_name: PRELOADER
|
||||
file_name: ${PROJECT}-preloader.bin
|
||||
is_download: true
|
||||
type: SV5_BL_BIN
|
||||
linear_start_addr: 0x0
|
||||
physical_start_addr: 0x0
|
||||
partition_size: 0x40000
|
||||
region: EMMC_BOOT_1
|
||||
storage: HW_STORAGE_EMMC
|
||||
boundary_check: true
|
||||
is_reserved: false
|
||||
operation_type: BOOTLOADERS
|
||||
d_type: FALSE
|
||||
reserve: 0x00
|
||||
|
||||
- partition_index: SYS1
|
||||
partition_name: OPENWRT
|
||||
file_name: ${PROJECT}-${IMAGE}
|
||||
is_download: true
|
||||
type: NORMAL_ROM
|
||||
linear_start_addr: 0x00000
|
||||
physical_start_addr: 0x00000
|
||||
partition_size: 0x4000000
|
||||
region: EMMC_USER
|
||||
storage: HW_STORAGE_EMMC
|
||||
boundary_check: true
|
||||
is_reserved: false
|
||||
operation_type: UPDATE
|
||||
d_type: FALSE
|
||||
reserve: 0x00
|
||||
EOF
|
||||
@ -1,69 +0,0 @@
|
||||
KERNEL_LOADADDR := 0x44080000
|
||||
|
||||
define Device/bpi_bananapi-r64
|
||||
DEVICE_VENDOR := Bpi
|
||||
DEVICE_MODEL := Banana Pi R64
|
||||
DEVICE_DTS := mt7622-bananapi-bpi-r64
|
||||
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
|
||||
SUPPORTED_DEVICES := bananapi,bpi-r64
|
||||
DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk
|
||||
endef
|
||||
TARGET_DEVICES += bpi_bananapi-r64
|
||||
|
||||
define Device/bpi_bananapi-r64-rootdisk
|
||||
DEVICE_VENDOR := Bpi
|
||||
DEVICE_MODEL := Banana Pi R64 (rootdisk)
|
||||
DEVICE_DTS := mt7622-bananapi-bpi-r64-rootdisk
|
||||
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
|
||||
SUPPORTED_DEVICES := bananapi,bpi-r64
|
||||
DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk
|
||||
IMAGES := sysupgrade-emmc.bin.gz
|
||||
IMAGE/sysupgrade-emmc.bin.gz := sysupgrade-emmc | gzip | append-metadata
|
||||
endef
|
||||
TARGET_DEVICES += bpi_bananapi-r64-rootdisk
|
||||
|
||||
define Device/elecom_wrc-2533gent
|
||||
DEVICE_VENDOR := Elecom
|
||||
DEVICE_MODEL := WRC-2533GENT
|
||||
DEVICE_DTS := mt7622-elecom-wrc-2533gent
|
||||
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
|
||||
DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-mt7615e \
|
||||
kmod-mt7615-firmware kmod-btmtkuart swconfig
|
||||
endef
|
||||
TARGET_DEVICES += elecom_wrc-2533gent
|
||||
|
||||
define Device/mediatek_mt7622-rfb1
|
||||
DEVICE_VENDOR := MediaTek
|
||||
DEVICE_MODEL := MTK7622 rfb1 AP
|
||||
DEVICE_DTS := mt7622-rfb1
|
||||
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
|
||||
DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk
|
||||
endef
|
||||
TARGET_DEVICES += mediatek_mt7622-rfb1
|
||||
|
||||
define Device/mediatek_mt7622-ubi
|
||||
DEVICE_VENDOR := MediaTek
|
||||
DEVICE_MODEL := MTK7622 AP (UBI)
|
||||
DEVICE_DTS := mt7622-rfb1-ubi
|
||||
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
|
||||
UBINIZE_OPTS := -E 5
|
||||
BLOCKSIZE := 128k
|
||||
PAGESIZE := 2048
|
||||
KERNEL_SIZE := 4194304
|
||||
IMAGE_SIZE := 32768k
|
||||
IMAGES += factory.bin
|
||||
IMAGE/factory.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | \
|
||||
check-size $$$$(IMAGE_SIZE)
|
||||
IMAGE/sysupgrade.bin := sysupgrade-tar
|
||||
DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk
|
||||
endef
|
||||
TARGET_DEVICES += mediatek_mt7622-ubi
|
||||
|
||||
define Device/ubnt_unifi-6-lr
|
||||
DEVICE_VENDOR := Ubiquiti
|
||||
DEVICE_MODEL := UniFi 6 LR
|
||||
DEVICE_DTS := mt7622-ubnt-unifi-6-lr
|
||||
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
|
||||
DEVICE_PACKAGES := kmod-mt7915e
|
||||
endef
|
||||
TARGET_DEVICES += ubnt_unifi-6-lr
|
||||
@ -1,95 +0,0 @@
|
||||
KERNEL_LOADADDR := 0x80008000
|
||||
DEVICE_VARS += UBOOT_TARGET UBOOT_OFFSET UBOOT_ENVSIZE
|
||||
|
||||
ifneq ($(CONFIG_MTK_BOOT_PARTSIZE),)
|
||||
BOOTFS_BLOCK_SIZE := 1024
|
||||
BOOTFS_BLOCKS := $(shell echo $$(($(CONFIG_MTK_BOOT_PARTSIZE)*1024*1024/$(BOOTFS_BLOCK_SIZE))))
|
||||
endif
|
||||
|
||||
define Build/mtk-mmc-img
|
||||
rm -f $@.boot
|
||||
mkfs.fat -C $@.boot $(BOOTFS_BLOCKS)
|
||||
|
||||
if [ -r $(STAGING_DIR_IMAGE)/$(UBOOT_TARGET)-preloader.bin ]; then \
|
||||
./gen_mtk_mmc_img.sh emmc $@.emmc \
|
||||
$(STAGING_DIR_IMAGE)/$(UBOOT_TARGET)-preloader.bin; \
|
||||
mcopy -i $@.boot $@.emmc ::eMMCboot.bin; \
|
||||
fi
|
||||
mkenvimage -s $(UBOOT_ENVSIZE) -o $(STAGING_DIR_IMAGE)/$(UBOOT_TARGET)-uboot.env $(UBOOT_TARGET)-uEnv.txt
|
||||
mcopy -i $@.boot $(STAGING_DIR_IMAGE)/$(UBOOT_TARGET)-uboot.env ::uboot.env
|
||||
mcopy -i $@.boot $(IMAGE_KERNEL) ::uImage
|
||||
./gen_mtk_mmc_img.sh sd $@ \
|
||||
$(STAGING_DIR_IMAGE)/$(UBOOT_TARGET)-preloader.bin \
|
||||
$(STAGING_DIR_IMAGE)/$(UBOOT_TARGET)-u-boot*.bin \
|
||||
$(UBOOT_OFFSET) \
|
||||
$@.boot \
|
||||
$(IMAGE_ROOTFS) \
|
||||
$(CONFIG_MTK_BOOT_PARTSIZE) \
|
||||
$(CONFIG_TARGET_ROOTFS_PARTSIZE)
|
||||
endef
|
||||
|
||||
define Build/preloader
|
||||
$(CP) $(STAGING_DIR_IMAGE)/$1-preloader.bin $@
|
||||
endef
|
||||
|
||||
define Build/scatterfile
|
||||
./gen_scatterfile.sh $(subst mt,MT,$(SUBTARGET)) "$1" \
|
||||
$(subst -scatter.txt,,$(notdir $@)) "$(DEVICE_TITLE)" > $@
|
||||
endef
|
||||
|
||||
define Device/bpi_bananapi-r2
|
||||
DEVICE_VENDOR := Bpi
|
||||
DEVICE_MODEL := Banana Pi R2
|
||||
DEVICE_DTS := mt7623n-bananapi-bpi-r2
|
||||
DEVICE_PACKAGES := kmod-fs-vfat kmod-nls-cp437 kmod-nls-iso8859-1 kmod-mmc \
|
||||
mkf2fs e2fsprogs kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk
|
||||
UBOOT_ENVSIZE := 0x2000
|
||||
UBOOT_OFFSET := 320k
|
||||
UBOOT_TARGET := mt7623n_bpir2
|
||||
IMAGES := img.gz
|
||||
IMAGE/img.gz := mtk-mmc-img | gzip | append-metadata
|
||||
ARTIFACT/preloader.bin := preloader $$(UBOOT_TARGET)
|
||||
ARTIFACT/scatter.txt := scatterfile $$(firstword $$(FILESYSTEMS))-$$(firstword $$(IMAGES))
|
||||
ARTIFACTS = preloader.bin scatter.txt
|
||||
SUPPORTED_DEVICES := bananapi,bpi-r2
|
||||
endef
|
||||
TARGET_DEVICES += bpi_bananapi-r2
|
||||
|
||||
# Full eMMC image including U-Boot and partition table
|
||||
define Device/unielec_u7623-emmc
|
||||
DEVICE_VENDOR := UniElec
|
||||
DEVICE_MODEL := U7623
|
||||
DEVICE_VARIANT := eMMC
|
||||
# When we use FIT images, U-Boot will populate the /memory node with the correct
|
||||
# memory size discovered from the preloader, so we don't need separate builds.
|
||||
DEVICE_DTS := mt7623a-unielec-u7623-02-emmc-512m
|
||||
SUPPORTED_DEVICES := unielec,u7623-02-emmc-512m
|
||||
UBOOT_ENVSIZE := 0x1000
|
||||
UBOOT_OFFSET := 256k
|
||||
UBOOT_TARGET := mt7623a_unielec_u7623
|
||||
IMAGES := img.gz
|
||||
IMAGE/img.gz := mtk-mmc-img | gzip | append-metadata
|
||||
DEVICE_PACKAGES := kmod-fs-vfat kmod-nls-cp437 kmod-nls-iso8859-1 kmod-mmc \
|
||||
mkf2fs e2fsprogs kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk
|
||||
ARTIFACT/scatter.txt := scatterfile $$(firstword $$(FILESYSTEMS))-$$(firstword $$(IMAGES))
|
||||
ARTIFACTS := scatter.txt
|
||||
endef
|
||||
TARGET_DEVICES += unielec_u7623-emmc
|
||||
|
||||
# Legacy partial image for U7623
|
||||
# This preserves the vendor U-Boot and starts with a uImage at 0xA00
|
||||
define Device/unielec_u7623-02-emmc-512m-legacy
|
||||
DEVICE_VENDOR := UniElec
|
||||
DEVICE_MODEL := U7623-02
|
||||
DEVICE_VARIANT := eMMC/512MiB RAM (legacy image)
|
||||
DEVICE_DTS := mt7623a-unielec-u7623-02-emmc-512m
|
||||
KERNEL_NAME := zImage
|
||||
KERNEL := kernel-bin | append-dtb | uImage none
|
||||
KERNEL_INITRAMFS := kernel-bin | append-dtb | uImage none
|
||||
DEVICE_PACKAGES := kmod-fs-vfat kmod-nls-cp437 kmod-nls-iso8859-1 kmod-mmc \
|
||||
mkf2fs e2fsprogs kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk
|
||||
IMAGES := sysupgrade-emmc.bin.gz
|
||||
IMAGE/sysupgrade-emmc.bin.gz := sysupgrade-emmc | gzip | append-metadata
|
||||
SUPPORTED_DEVICES := unielec,u7623-02-emmc-512m
|
||||
endef
|
||||
TARGET_DEVICES += unielec_u7623-02-emmc-512m-legacy
|
||||
@ -1,20 +0,0 @@
|
||||
# Boot menu for UniElec U7623
|
||||
# Copyright © 2020 David Woodhouse <dwmw2@infradead.org>
|
||||
|
||||
kernel=uImage
|
||||
loadaddr=0x88000000
|
||||
dtaddr=0x83f00000
|
||||
fdt_high=0xafffffff
|
||||
|
||||
console=ttyS0,115200
|
||||
bootopts=rootfstype=squashfs,ext4 rootwait
|
||||
|
||||
# Create the command line (with appropriate root=) and boot the Linux FIT image.
|
||||
boot1=setenv bootargs "console=${console} root=${rootdev} ${bootopts}";printenv bootargs;\
|
||||
fatload mmc ${partition} ${loadaddr} ${kernel}; bootm
|
||||
|
||||
bootmenu_0=Boot from eMMC.=setenv partition 0:2;setenv rootdev /dev/mmcblk0p3;run boot1
|
||||
bootmenu_default=0
|
||||
|
||||
bootdelay=0
|
||||
bootcmd=bootmenu
|
||||
@ -1,78 +0,0 @@
|
||||
# Boot menu for Banana Pi R2
|
||||
# Copyright © 2020 David Woodhouse <dwmw2@infradead.org>
|
||||
|
||||
kernel=uImage
|
||||
loadaddr=0x88000000
|
||||
dtaddr=0x83f00000
|
||||
fdt_high=0xffffffff
|
||||
|
||||
console=ttyS2,115200
|
||||
bootopts=rootfstype=squashfs,ext4 rootwait
|
||||
|
||||
# Create the command line (with appropriate root=) and boot the Linux FIT image.
|
||||
boot1=setenv bootargs "console=${console} root=${rootdev} ${bootopts}";printenv bootargs;\
|
||||
fatload mmc ${partition} ${loadaddr} ${kernel}; bootm
|
||||
|
||||
# The preloader leaves a breadcrumb behind to say what it booted from.
|
||||
checkbootedfrom=if itest.l *81dffff0 == 434d4d65 ; then setenv bootedfrom eMMC; else setenv bootedfrom SD; fi;
|
||||
|
||||
# Build the boot menu one item at a time
|
||||
bm_count=0
|
||||
checkkernel=test -e mmc ${bm_part} ${kernel}
|
||||
addbm=if run checkkernel; then setenv bootmenu_${bm_count} "Boot from ${bm_dev}.=setenv partition ${bm_part};setenv rootdev ${bm_root};run boot1";if test "${bootedfrom}" = "${bm_dev}"; then setenv bootmenu_default ${bm_count};fi;setexpr bm_count ${bm_count} + 1; fi
|
||||
# Here we assume that SD card id mmcblk1 and eMMC is mmcblk0 in linux. Swap them if your DTS define them in reverse order.
|
||||
addeMMCbm=setenv bm_part 0:2;setenv bm_root /dev/mmcblk0p3;setenv bm_dev eMMC;run addbm
|
||||
addSDbm=setenv bm_part 1:2;setenv bm_root /dev/mmcblk1p3;setenv bm_dev SD;run addbm
|
||||
addinstallbm=if test "${bootedfrom}" = "SD";then run checkinstall; if run validparts; then setenv bootmenu_${bm_count} "Install OpenWrt from SD to internal eMMC.=run doinstall";setexpr bm_count ${bm_count} + 1;fi;fi
|
||||
|
||||
runbootmenu=if test "${bootedfrom}" = "";then run checkbootedfrom;fi;\
|
||||
setenv bm_count 0;run addeMMCbm;run addSDbm;run addinstallbm;setenv bootmenu_${bm_count};\
|
||||
bootmenu
|
||||
|
||||
bootdelay=0
|
||||
bootcmd=run checkbootedfrom;run runbootmenu
|
||||
|
||||
# XX: Can we read this from the device, or must we trust they're all the same as mine?
|
||||
# Probably not that important as we're unlikely ever to hit the limit anyway.
|
||||
maxsect=0xe8ffff
|
||||
validparts=false
|
||||
|
||||
# We could use 'part size' here but I'd like to check the types too.
|
||||
checkinstall=mmc dev 1;\
|
||||
mmc read 0x88000002 0 1;\
|
||||
setenv validparts true;\
|
||||
test -e mmc 1:2 eMMCboot.bin || setenv validparts false && echo "eMMCboot.bin not present on SD partition 2";\
|
||||
if run validparts && itest.b *0x880001c4 != 0x41; then echo "SD partition 1 is not a PReP Boot partition"; setenv validparts false; fi;\
|
||||
if run validparts && itest.l *0x880001c8 != 0x280; then echo "SD partition 1 does not start at 320KiB for U-Boot"; mmc part; exit; fi;\
|
||||
if run validparts && itest.l *0x880001cc != 0x400; then echo "SD partition 1 is not 512KiB in size for U-Boot"; mmc part; exit; fi;\
|
||||
if run validparts && itest.b *0x880001d4 != 0x0c; then echo "SD partition 2 is not a FAT32 partition"; setenv validparts false; fi;\
|
||||
if run validparts && itest.b *0x880001e4 != 0x83; then echo "SD partition 3 is not a Linux partition"; setenv validparts false; fi;\
|
||||
setexpr.l part2_start *0x880001d8;setexpr.l part2_len *0x880001dc;setexpr.l part3_start *0x880001e8;setexpr.l part3_len *0x880001ec;\
|
||||
if run validparts && test 0x${part2_start} -gt ${maxsect}; then echo "SD partition 2 start too high"; setenv validparts false; fi;\
|
||||
if run validparts && test 0x${part2_len} -gt ${maxsect}; then echo "SD partition 2 is too large"; setenv validparts false; fi;\
|
||||
if run validparts && test 0x${part3_start} -gt ${maxsect}; then echo "SD partition 3 start too high"; setenv validparts false; fi;\
|
||||
if run validparts && test 0x${part3_len} -gt ${maxsect}; then echo "SD partition 2 is too large"; setenv validparts false; fi;\
|
||||
setexpr.l part2_end 0x$(part2_start} + 0x${part2_len};setexpr.l part3_end 0x${part3_start} + 0x${part3_len};\
|
||||
if run validparts && test 0x${part2_end} -ge ${maxsect}; then echo "SD partition 2 end too high"; setenv validparts false; fi;\
|
||||
if run validparts && test 0x${part3_end} -ge ${maxsect}; then echo "SD partition 3 end too high"; setenv validparts false; fi;
|
||||
|
||||
# Copy a single chunk, up to 0x8000 sectors / 16MiB, from SD to eMMC at the specified offset.
|
||||
writechunk=setenv thislen 8000; if test 0x${partlen} -lt 0x${thislen}; then setenv thislen ${partlen};fi;\
|
||||
mmc dev 1;mmc read ${loadaddr} 0x${partofs} 0x${thislen};\
|
||||
mmc dev 0; mmc write ${loadaddr} 0x${partofs} 0x${thislen};\
|
||||
setexpr partofs 0x${partofs} + 0x${thislen};setexpr partlen 0x${partlen} - 0x${thislen}
|
||||
|
||||
# Copy a partition defined by ${partofs} / ${partlen} from SD to eMMC
|
||||
writepart=while test 0x${partlen} -ne 0; do run writechunk; done
|
||||
|
||||
# Configure the eMMC boot partition and write eMMCboot.bin to it
|
||||
writeboot=mmc partconf 0 1 1 0;fatload mmc 1:2 ${loadaddr} eMMCboot.bin;\
|
||||
setexpr filesize ${filesize} + 0x1ff;setexpr blocks ${filesize} / 0x200;\
|
||||
mmc dev 0 1;mmc write ${loadaddr} 0 ${blocks}
|
||||
|
||||
# Install OpenWrt from the SD card to internal eMMC.
|
||||
doinstall=run checkinstall;if run validparts;then run writeboot;\
|
||||
echo "Copying preloader and U-Boot";setenv partofs 0;setenv partlen 680;run writepart;\
|
||||
echo "Copying FAT boot partition";setenv partofs ${part2_start};setenv partlen ${part2_len};run writepart;\
|
||||
echo "Copying root partition";setenv partofs ${part3_start};setenv partlen ${part3_len};run writepart;\
|
||||
echo "Installed OpenWrt to eMMC";setenv bootedfrom eMMC;run runbootmenu;fi
|
||||
@ -1,9 +0,0 @@
|
||||
KERNEL_LOADADDR := 0x40008000
|
||||
|
||||
define Device/mediatek_mt7629-rfb
|
||||
DEVICE_VENDOR := MediaTek
|
||||
DEVICE_MODEL := MT7629 rfb AP
|
||||
DEVICE_DTS := mt7629-rfb
|
||||
DEVICE_PACKAGES := swconfig
|
||||
endef
|
||||
TARGET_DEVICES += mediatek_mt7629-rfb
|
||||
@ -1,44 +1,3 @@
|
||||
define KernelPackage/ata-ahci-mtk
|
||||
TITLE:=Mediatek AHCI Serial ATA support
|
||||
KCONFIG:=CONFIG_AHCI_MTK
|
||||
FILES:= \
|
||||
$(LINUX_DIR)/drivers/ata/ahci_mtk.ko \
|
||||
$(LINUX_DIR)/drivers/ata/libahci_platform.ko
|
||||
AUTOLOAD:=$(call AutoLoad,40,libahci libahci_platform ahci_mtk,1)
|
||||
$(call AddDepends/ata)
|
||||
DEPENDS+=@(TARGET_mediatek_mt7622||TARGET_mediatek_mt7623)
|
||||
endef
|
||||
|
||||
define KernelPackage/ata-ahci-mtk/description
|
||||
Mediatek AHCI Serial ATA host controllers
|
||||
endef
|
||||
|
||||
$(eval $(call KernelPackage,ata-ahci-mtk))
|
||||
|
||||
define KernelPackage/btmtkuart
|
||||
SUBMENU:=Other modules
|
||||
TITLE:=MediaTek HCI UART driver
|
||||
DEPENDS:=@TARGET_mediatek_mt7622 +kmod-bluetooth +mt7622bt-firmware
|
||||
KCONFIG:=CONFIG_BT_MTKUART
|
||||
FILES:= \
|
||||
$(LINUX_DIR)/drivers/bluetooth/btmtkuart.ko
|
||||
AUTOLOAD:=$(call AutoProbe,btmtkuart)
|
||||
endef
|
||||
|
||||
$(eval $(call KernelPackage,btmtkuart))
|
||||
|
||||
define KernelPackage/sdhci-mtk
|
||||
SUBMENU:=Other modules
|
||||
TITLE:=Mediatek SDHCI driver
|
||||
DEPENDS:=@TARGET_mediatek_mt7622 +kmod-sdhci
|
||||
KCONFIG:=CONFIG_MMC_MTK
|
||||
FILES:= \
|
||||
$(LINUX_DIR)/drivers/mmc/host/mtk-sd.ko
|
||||
AUTOLOAD:=$(call AutoProbe,mtk-sd,1)
|
||||
endef
|
||||
|
||||
$(eval $(call KernelPackage,sdhci-mtk))
|
||||
|
||||
define KernelPackage/mediatek_hnat
|
||||
SUBMENU:=Network Devices
|
||||
TITLE:=Mediatek HNAT module
|
||||
|
||||
@ -1,43 +0,0 @@
|
||||
#!/bin/sh
|
||||
|
||||
. /lib/functions.sh
|
||||
. /lib/functions/uci-defaults.sh
|
||||
. /lib/functions/system.sh
|
||||
|
||||
mediatek_setup_interfaces()
|
||||
{
|
||||
local board="$1"
|
||||
|
||||
case $board in
|
||||
bananapi,bpi-r64-rootdisk|\
|
||||
bananapi,bpi-r64)
|
||||
ucidef_set_interfaces_lan_wan "lan0 lan1 lan2 lan3" wan
|
||||
;;
|
||||
mediatek,mt7622-rfb1)
|
||||
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" wan
|
||||
;;
|
||||
ubnt,unifi-6-lr)
|
||||
ucidef_set_interfaces_lan "eth0"
|
||||
;;
|
||||
*)
|
||||
ucidef_add_switch "switch0" \
|
||||
"0:lan" "1:lan" "2:lan" "3:lan" "4:wan" "6u@eth0" "5u@eth1"
|
||||
;;
|
||||
esac
|
||||
}
|
||||
|
||||
mediatek_setup_macs()
|
||||
{
|
||||
local board="$1"
|
||||
|
||||
case $board in
|
||||
esac
|
||||
}
|
||||
|
||||
board_config_update
|
||||
board=$(board_name)
|
||||
mediatek_setup_interfaces $board
|
||||
mediatek_setup_macs $board
|
||||
board_config_flush
|
||||
|
||||
exit 0
|
||||
@ -1,18 +0,0 @@
|
||||
. /lib/upgrade/common.sh
|
||||
|
||||
RECOVERY_PART=/dev/mmcblk0p6
|
||||
|
||||
move_config() {
|
||||
if [ -b $RECOVERY_PART ]; then
|
||||
insmod nls_cp437
|
||||
insmod nls_iso8859-1
|
||||
insmod fat
|
||||
insmod vfat
|
||||
mkdir -p /recovery
|
||||
mount -o rw,noatime $RECOVERY_PART /recovery
|
||||
[ -f "/recovery/$BACKUP_FILE" ] && mv -f "/recovery/$BACKUP_FILE" /
|
||||
umount /recovery
|
||||
fi
|
||||
}
|
||||
|
||||
boot_hook_add preinit_mount_root move_config
|
||||
@ -1,54 +0,0 @@
|
||||
platform_do_upgrade() {
|
||||
local board=$(board_name)
|
||||
|
||||
case "$board" in
|
||||
bananapi,bpi-r64-rootdisk)
|
||||
#2097152=0x200000 is the offset in bytes from the start
|
||||
#of eMMC and to the location of the kernel
|
||||
get_image "$1" | dd of=/dev/mmcblk0 bs=2097152 seek=1 conv=fsync
|
||||
;;
|
||||
mediatek,mt7622,ubi)
|
||||
nand_do_upgrade "$1"
|
||||
;;
|
||||
*)
|
||||
default_do_upgrade "$1"
|
||||
;;
|
||||
esac
|
||||
}
|
||||
|
||||
PART_NAME=firmware
|
||||
|
||||
platform_check_image() {
|
||||
local board=$(board_name)
|
||||
local magic="$(get_magic_long "$1")"
|
||||
|
||||
[ "$#" -gt 1 ] && return 1
|
||||
|
||||
case "$board" in
|
||||
*)
|
||||
[ "$magic" != "d00dfeed" ] && {
|
||||
echo "Invalid image type."
|
||||
return 1
|
||||
}
|
||||
return 0
|
||||
;;
|
||||
esac
|
||||
|
||||
return 0
|
||||
}
|
||||
|
||||
platform_copy_config_emmc() {
|
||||
mkdir -p /recovery
|
||||
mount -o rw,noatime /dev/mmcblk0p6 /recovery
|
||||
cp -af "$UPGRADE_BACKUP" "/recovery/$BACKUP_FILE"
|
||||
sync
|
||||
umount /recovery
|
||||
}
|
||||
|
||||
platform_copy_config() {
|
||||
case "$(board_name)" in
|
||||
bananapi,bpi-r64-rootdisk)
|
||||
platform_copy_config_emmc
|
||||
;;
|
||||
esac
|
||||
}
|
||||
@ -1,593 +0,0 @@
|
||||
CONFIG_64BIT=y
|
||||
CONFIG_AHCI_MTK=y
|
||||
CONFIG_ARCH_CLOCKSOURCE_DATA=y
|
||||
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
|
||||
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
|
||||
CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y
|
||||
CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
|
||||
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
|
||||
CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y
|
||||
CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
|
||||
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
|
||||
CONFIG_ARCH_HAS_FAST_MULTIPLIER=y
|
||||
CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
|
||||
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
|
||||
CONFIG_ARCH_HAS_GIGANTIC_PAGE=y
|
||||
CONFIG_ARCH_HAS_KCOV=y
|
||||
CONFIG_ARCH_HAS_KEEPINITRD=y
|
||||
CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
|
||||
CONFIG_ARCH_HAS_PTE_DEVMAP=y
|
||||
CONFIG_ARCH_HAS_PTE_SPECIAL=y
|
||||
CONFIG_ARCH_HAS_SETUP_DMA_OPS=y
|
||||
CONFIG_ARCH_HAS_SET_DIRECT_MAP=y
|
||||
CONFIG_ARCH_HAS_SET_MEMORY=y
|
||||
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
|
||||
CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
|
||||
CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y
|
||||
CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
|
||||
CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y
|
||||
CONFIG_ARCH_HAS_TICK_BROADCAST=y
|
||||
CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
|
||||
CONFIG_ARCH_INLINE_READ_LOCK=y
|
||||
CONFIG_ARCH_INLINE_READ_LOCK_BH=y
|
||||
CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y
|
||||
CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y
|
||||
CONFIG_ARCH_INLINE_READ_UNLOCK=y
|
||||
CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y
|
||||
CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y
|
||||
CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y
|
||||
CONFIG_ARCH_INLINE_SPIN_LOCK=y
|
||||
CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y
|
||||
CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y
|
||||
CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y
|
||||
CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y
|
||||
CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y
|
||||
CONFIG_ARCH_INLINE_SPIN_UNLOCK=y
|
||||
CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y
|
||||
CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y
|
||||
CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y
|
||||
CONFIG_ARCH_INLINE_WRITE_LOCK=y
|
||||
CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y
|
||||
CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y
|
||||
CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y
|
||||
CONFIG_ARCH_INLINE_WRITE_UNLOCK=y
|
||||
CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y
|
||||
CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y
|
||||
CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y
|
||||
CONFIG_ARCH_KEEP_MEMBLOCK=y
|
||||
CONFIG_ARCH_MEDIATEK=y
|
||||
CONFIG_ARCH_MMAP_RND_BITS=18
|
||||
CONFIG_ARCH_MMAP_RND_BITS_MAX=24
|
||||
CONFIG_ARCH_MMAP_RND_BITS_MIN=18
|
||||
CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11
|
||||
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
|
||||
CONFIG_ARCH_PROC_KCORE_TEXT=y
|
||||
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
|
||||
CONFIG_ARCH_SPARSEMEM_DEFAULT=y
|
||||
CONFIG_ARCH_SPARSEMEM_ENABLE=y
|
||||
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
|
||||
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
|
||||
CONFIG_ARCH_SUPPORTS_INT128=y
|
||||
CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y
|
||||
CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y
|
||||
CONFIG_ARCH_SUPPORTS_UPROBES=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
|
||||
CONFIG_ARCH_USE_MEMREMAP_PROT=y
|
||||
CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
|
||||
CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
|
||||
CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y
|
||||
CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
|
||||
CONFIG_ARCH_WANT_FRAME_POINTERS=y
|
||||
CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
|
||||
CONFIG_ARM64=y
|
||||
CONFIG_ARM64_4K_PAGES=y
|
||||
# CONFIG_ARM64_CNP is not set
|
||||
CONFIG_ARM64_CONT_SHIFT=4
|
||||
# CONFIG_ARM64_ERRATUM_1165522 is not set
|
||||
# CONFIG_ARM64_ERRATUM_1286807 is not set
|
||||
# CONFIG_ARM64_ERRATUM_1418040 is not set
|
||||
CONFIG_ARM64_ERRATUM_843419=y
|
||||
CONFIG_ARM64_ERRATUM_845719=y
|
||||
CONFIG_ARM64_MODULE_PLTS=y
|
||||
CONFIG_ARM64_PAGE_SHIFT=12
|
||||
CONFIG_ARM64_PA_BITS=48
|
||||
CONFIG_ARM64_PA_BITS_48=y
|
||||
# CONFIG_ARM64_PTR_AUTH is not set
|
||||
CONFIG_ARM64_SSBD=y
|
||||
# CONFIG_ARM64_SVE is not set
|
||||
# CONFIG_ARM64_SW_TTBR0_PAN is not set
|
||||
CONFIG_ARM64_TAGGED_ADDR_ABI=y
|
||||
CONFIG_ARM64_VA_BITS=39
|
||||
CONFIG_ARM64_VA_BITS_39=y
|
||||
# CONFIG_ARMV8_DEPRECATED is not set
|
||||
CONFIG_ARM_AMBA=y
|
||||
CONFIG_ARM_ARCH_TIMER=y
|
||||
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
|
||||
CONFIG_ARM_GIC=y
|
||||
CONFIG_ARM_GIC_V2M=y
|
||||
CONFIG_ARM_GIC_V3=y
|
||||
CONFIG_ARM_GIC_V3_ITS=y
|
||||
CONFIG_ARM_GIC_V3_ITS_PCI=y
|
||||
CONFIG_ARM_MEDIATEK_CPUFREQ=y
|
||||
CONFIG_ARM_PMU=y
|
||||
CONFIG_ARM_PSCI_FW=y
|
||||
CONFIG_ATA=y
|
||||
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_BLK_MQ_PCI=y
|
||||
CONFIG_BLK_PM=y
|
||||
CONFIG_BLK_SCSI_REQUEST=y
|
||||
CONFIG_BLOCK_COMPAT=y
|
||||
CONFIG_BSD_PROCESS_ACCT=y
|
||||
CONFIG_BSD_PROCESS_ACCT_V3=y
|
||||
# CONFIG_CAVIUM_TX2_ERRATUM_219 is not set
|
||||
CONFIG_CC_HAS_KASAN_GENERIC=y
|
||||
CONFIG_CLKDEV_LOOKUP=y
|
||||
CONFIG_CLKSRC_MMIO=y
|
||||
CONFIG_CLOCK_THERMAL=y
|
||||
CONFIG_CLONE_BACKWARDS=y
|
||||
CONFIG_COMMON_CLK=y
|
||||
CONFIG_COMMON_CLK_MEDIATEK=y
|
||||
CONFIG_COMMON_CLK_MT2712=y
|
||||
# CONFIG_COMMON_CLK_MT2712_BDPSYS is not set
|
||||
# CONFIG_COMMON_CLK_MT2712_IMGSYS is not set
|
||||
# CONFIG_COMMON_CLK_MT2712_JPGDECSYS is not set
|
||||
# CONFIG_COMMON_CLK_MT2712_MFGCFG is not set
|
||||
# CONFIG_COMMON_CLK_MT2712_MMSYS is not set
|
||||
# CONFIG_COMMON_CLK_MT2712_VDECSYS is not set
|
||||
# CONFIG_COMMON_CLK_MT2712_VENCSYS is not set
|
||||
# CONFIG_COMMON_CLK_MT6779 is not set
|
||||
# CONFIG_COMMON_CLK_MT6797 is not set
|
||||
CONFIG_COMMON_CLK_MT7622=y
|
||||
CONFIG_COMMON_CLK_MT7622_AUDSYS=y
|
||||
CONFIG_COMMON_CLK_MT7622_ETHSYS=y
|
||||
CONFIG_COMMON_CLK_MT7622_HIFSYS=y
|
||||
# CONFIG_COMMON_CLK_MT8173 is not set
|
||||
CONFIG_COMMON_CLK_MT8183=y
|
||||
# CONFIG_COMMON_CLK_MT8183_AUDIOSYS is not set
|
||||
# CONFIG_COMMON_CLK_MT8183_CAMSYS is not set
|
||||
# CONFIG_COMMON_CLK_MT8183_IMGSYS is not set
|
||||
# CONFIG_COMMON_CLK_MT8183_IPU_ADL is not set
|
||||
# CONFIG_COMMON_CLK_MT8183_IPU_CONN is not set
|
||||
# CONFIG_COMMON_CLK_MT8183_IPU_CORE0 is not set
|
||||
# CONFIG_COMMON_CLK_MT8183_IPU_CORE1 is not set
|
||||
# CONFIG_COMMON_CLK_MT8183_MFGCFG is not set
|
||||
# CONFIG_COMMON_CLK_MT8183_MMSYS is not set
|
||||
# CONFIG_COMMON_CLK_MT8183_VDECSYS is not set
|
||||
# CONFIG_COMMON_CLK_MT8183_VENCSYS is not set
|
||||
CONFIG_COMMON_CLK_MT8516=y
|
||||
# CONFIG_COMMON_CLK_MT8516_AUDSYS is not set
|
||||
CONFIG_COMPAT=y
|
||||
CONFIG_COMPAT_32BIT_TIME=y
|
||||
CONFIG_COMPAT_BINFMT_ELF=y
|
||||
CONFIG_COMPAT_NETLINK_MESSAGES=y
|
||||
CONFIG_COMPAT_OLD_SIGACTION=y
|
||||
CONFIG_CONSOLE_LOGLEVEL_DEFAULT=15
|
||||
# CONFIG_CPUFREQ_DT is not set
|
||||
CONFIG_CPU_FREQ=y
|
||||
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
|
||||
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
|
||||
CONFIG_CPU_FREQ_GOV_COMMON=y
|
||||
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
|
||||
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
|
||||
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
|
||||
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_CPU_FREQ_STAT=y
|
||||
CONFIG_CPU_RMAP=y
|
||||
CONFIG_CPU_THERMAL=y
|
||||
CONFIG_CRC16=y
|
||||
CONFIG_CRYPTO_ACOMP2=y
|
||||
CONFIG_CRYPTO_AEAD=y
|
||||
CONFIG_CRYPTO_AEAD2=y
|
||||
CONFIG_CRYPTO_CMAC=y
|
||||
CONFIG_CRYPTO_DEFLATE=y
|
||||
CONFIG_CRYPTO_DRBG=y
|
||||
CONFIG_CRYPTO_DRBG_HMAC=y
|
||||
CONFIG_CRYPTO_DRBG_MENU=y
|
||||
CONFIG_CRYPTO_ECB=y
|
||||
CONFIG_CRYPTO_ECC=y
|
||||
CONFIG_CRYPTO_ECDH=y
|
||||
CONFIG_CRYPTO_HASH=y
|
||||
CONFIG_CRYPTO_HASH2=y
|
||||
CONFIG_CRYPTO_HASH_INFO=y
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_JITTERENTROPY=y
|
||||
CONFIG_CRYPTO_KPP=y
|
||||
CONFIG_CRYPTO_KPP2=y
|
||||
CONFIG_CRYPTO_LIB_SHA256=y
|
||||
CONFIG_CRYPTO_LZO=y
|
||||
CONFIG_CRYPTO_MANAGER=y
|
||||
CONFIG_CRYPTO_MANAGER2=y
|
||||
CONFIG_CRYPTO_NULL2=y
|
||||
CONFIG_CRYPTO_RNG=y
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CRYPTO_RNG_DEFAULT=y
|
||||
CONFIG_CRYPTO_SHA256=y
|
||||
CONFIG_DCACHE_WORD_ACCESS=y
|
||||
CONFIG_DEBUG_MISC=y
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
CONFIG_DIMLIB=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_DMATEST=y
|
||||
CONFIG_DMA_DIRECT_REMAP=y
|
||||
CONFIG_DMA_ENGINE=y
|
||||
CONFIG_DMA_ENGINE_RAID=y
|
||||
CONFIG_DMA_OF=y
|
||||
CONFIG_DMA_REMAP=y
|
||||
CONFIG_DMA_VIRTUAL_CHANNELS=y
|
||||
CONFIG_DRM_RCAR_WRITEBACK=y
|
||||
CONFIG_DTC=y
|
||||
CONFIG_DYNAMIC_DEBUG=y
|
||||
CONFIG_EDAC_SUPPORT=y
|
||||
CONFIG_EFI_EARLYCON=y
|
||||
CONFIG_EINT_MTK=y
|
||||
CONFIG_F2FS_FS=y
|
||||
CONFIG_FIXED_PHY=y
|
||||
CONFIG_FIX_EARLYCON_MEM=y
|
||||
# CONFIG_FLATMEM_MANUAL is not set
|
||||
CONFIG_FONT_8x16=y
|
||||
CONFIG_FONT_AUTOSELECT=y
|
||||
CONFIG_FONT_SUPPORT=y
|
||||
CONFIG_FRAME_POINTER=y
|
||||
# CONFIG_FUJITSU_ERRATUM_010001 is not set
|
||||
CONFIG_FW_LOADER_PAGED_BUF=y
|
||||
CONFIG_GENERIC_ALLOCATOR=y
|
||||
CONFIG_GENERIC_ARCH_TOPOLOGY=y
|
||||
CONFIG_GENERIC_BUG=y
|
||||
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
|
||||
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
||||
CONFIG_GENERIC_CPU_VULNERABILITIES=y
|
||||
CONFIG_GENERIC_CSUM=y
|
||||
CONFIG_GENERIC_EARLY_IOREMAP=y
|
||||
CONFIG_GENERIC_GETTIMEOFDAY=y
|
||||
CONFIG_GENERIC_IDLE_POLL_SETUP=y
|
||||
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
|
||||
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
|
||||
CONFIG_GENERIC_IRQ_SHOW=y
|
||||
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
|
||||
CONFIG_GENERIC_MSI_IRQ=y
|
||||
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
|
||||
CONFIG_GENERIC_PCI_IOMAP=y
|
||||
CONFIG_GENERIC_PHY=y
|
||||
CONFIG_GENERIC_PINCONF=y
|
||||
CONFIG_GENERIC_PINCTRL_GROUPS=y
|
||||
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
|
||||
CONFIG_GENERIC_SCHED_CLOCK=y
|
||||
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
||||
CONFIG_GENERIC_STRNCPY_FROM_USER=y
|
||||
CONFIG_GENERIC_STRNLEN_USER=y
|
||||
CONFIG_GENERIC_TIME_VSYSCALL=y
|
||||
CONFIG_GLOB=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GRO_CELLS=y
|
||||
CONFIG_HANDLE_DOMAIN_IRQ=y
|
||||
# CONFIG_HARDEN_BRANCH_PREDICTOR is not set
|
||||
# CONFIG_HARDEN_EL2_VECTORS is not set
|
||||
CONFIG_HARDIRQS_SW_RESEND=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT_MAP=y
|
||||
CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y
|
||||
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
|
||||
CONFIG_HAVE_ARCH_BITREVERSE=y
|
||||
CONFIG_HAVE_ARCH_HUGE_VMAP=y
|
||||
CONFIG_HAVE_ARCH_JUMP_LABEL=y
|
||||
CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y
|
||||
CONFIG_HAVE_ARCH_KASAN=y
|
||||
CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y
|
||||
CONFIG_HAVE_ARCH_PFN_VALID=y
|
||||
CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y
|
||||
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
|
||||
CONFIG_HAVE_ARCH_STACKLEAK=y
|
||||
CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
|
||||
CONFIG_HAVE_ARCH_TRACEHOOK=y
|
||||
CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
|
||||
CONFIG_HAVE_ARCH_VMAP_STACK=y
|
||||
CONFIG_HAVE_ARM_SMCCC=y
|
||||
CONFIG_HAVE_ASM_MODVERSIONS=y
|
||||
CONFIG_HAVE_CLK=y
|
||||
CONFIG_HAVE_CLK_PREPARE=y
|
||||
CONFIG_HAVE_CMPXCHG_DOUBLE=y
|
||||
CONFIG_HAVE_CMPXCHG_LOCAL=y
|
||||
CONFIG_HAVE_CONTEXT_TRACKING=y
|
||||
CONFIG_HAVE_COPY_THREAD_TLS=y
|
||||
CONFIG_HAVE_C_RECORDMCOUNT=y
|
||||
CONFIG_HAVE_DEBUG_BUGVERBOSE=y
|
||||
CONFIG_HAVE_DEBUG_KMEMLEAK=y
|
||||
CONFIG_HAVE_DMA_CONTIGUOUS=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_EBPF_JIT=y
|
||||
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
|
||||
CONFIG_HAVE_FAST_GUP=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y
|
||||
CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_HAVE_GENERIC_VDSO=y
|
||||
CONFIG_HAVE_HW_BREAKPOINT=y
|
||||
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
|
||||
CONFIG_HAVE_MEMORY_PRESENT=y
|
||||
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
|
||||
CONFIG_HAVE_NET_DSA=y
|
||||
CONFIG_HAVE_PATA_PLATFORM=y
|
||||
CONFIG_HAVE_PCI=y
|
||||
CONFIG_HAVE_PERF_EVENTS=y
|
||||
CONFIG_HAVE_PERF_REGS=y
|
||||
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
|
||||
CONFIG_HAVE_RCU_TABLE_FREE=y
|
||||
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
|
||||
CONFIG_HAVE_RSEQ=y
|
||||
CONFIG_HAVE_SCHED_AVG_IRQ=y
|
||||
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
|
||||
CONFIG_HAVE_UID16=y
|
||||
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
|
||||
CONFIG_HOLES_IN_ZONE=y
|
||||
# CONFIG_HW_RANDOM_MTK is not set
|
||||
CONFIG_HZ=250
|
||||
CONFIG_HZ_250=y
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_BOARDINFO=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_MT65XX=y
|
||||
CONFIG_ICPLUS_PHY=y
|
||||
CONFIG_IIO=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
CONFIG_INLINE_READ_LOCK=y
|
||||
CONFIG_INLINE_READ_LOCK_BH=y
|
||||
CONFIG_INLINE_READ_LOCK_IRQ=y
|
||||
CONFIG_INLINE_READ_LOCK_IRQSAVE=y
|
||||
CONFIG_INLINE_READ_UNLOCK_BH=y
|
||||
CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y
|
||||
CONFIG_INLINE_SPIN_LOCK=y
|
||||
CONFIG_INLINE_SPIN_LOCK_BH=y
|
||||
CONFIG_INLINE_SPIN_LOCK_IRQ=y
|
||||
CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y
|
||||
CONFIG_INLINE_SPIN_TRYLOCK=y
|
||||
CONFIG_INLINE_SPIN_TRYLOCK_BH=y
|
||||
CONFIG_INLINE_SPIN_UNLOCK_BH=y
|
||||
CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y
|
||||
CONFIG_INLINE_WRITE_LOCK=y
|
||||
CONFIG_INLINE_WRITE_LOCK_BH=y
|
||||
CONFIG_INLINE_WRITE_LOCK_IRQ=y
|
||||
CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y
|
||||
CONFIG_INLINE_WRITE_UNLOCK_BH=y
|
||||
CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y
|
||||
CONFIG_IO_URING=y
|
||||
CONFIG_IRQCHIP=y
|
||||
CONFIG_IRQ_DOMAIN=y
|
||||
CONFIG_IRQ_DOMAIN_HIERARCHY=y
|
||||
CONFIG_IRQ_FORCED_THREADING=y
|
||||
CONFIG_IRQ_TIME_ACCOUNTING=y
|
||||
CONFIG_IRQ_WORK=y
|
||||
CONFIG_JUMP_LABEL=y
|
||||
CONFIG_LEDS_UBNT_LEDBAR=y
|
||||
CONFIG_LIBFDT=y
|
||||
CONFIG_LOCK_DEBUGGING_SUPPORT=y
|
||||
CONFIG_LOCK_SPIN_ON_OWNER=y
|
||||
CONFIG_LZO_COMPRESS=y
|
||||
CONFIG_LZO_DECOMPRESS=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_MDIO_BUS=y
|
||||
CONFIG_MDIO_DEVICE=y
|
||||
CONFIG_MEDIATEK_MT6577_AUXADC=y
|
||||
CONFIG_MEDIATEK_WATCHDOG=y
|
||||
CONFIG_MEDIA_SUPPORT=y
|
||||
CONFIG_MEMFD_CREATE=y
|
||||
CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7
|
||||
CONFIG_MFD_SYSCON=y
|
||||
CONFIG_MIGRATION=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_MTK=y
|
||||
CONFIG_MODULES_TREE_LOOKUP=y
|
||||
CONFIG_MODULES_USE_ELF_RELA=y
|
||||
CONFIG_MT753X_GSW=y
|
||||
CONFIG_MTD_NAND_CORE=y
|
||||
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
|
||||
CONFIG_MTD_NAND_MTK=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_MTD_SPI_NAND=y
|
||||
CONFIG_MTD_SPI_NOR=y
|
||||
CONFIG_MTD_SPLIT_FIRMWARE=y
|
||||
CONFIG_MTD_SPLIT_FIT_FW=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_MTD_UBI_BEB_LIMIT=20
|
||||
CONFIG_MTD_UBI_BLOCK=y
|
||||
CONFIG_MTD_UBI_WL_THRESHOLD=4096
|
||||
# CONFIG_MTK_CMDQ is not set
|
||||
# CONFIG_MTK_CQDMA is not set
|
||||
CONFIG_MTK_EFUSE=y
|
||||
CONFIG_MTK_HSDMA=y
|
||||
CONFIG_MTK_INFRACFG=y
|
||||
CONFIG_MTK_PMIC_WRAP=y
|
||||
CONFIG_MTK_SCPSYS=y
|
||||
CONFIG_MTK_THERMAL=y
|
||||
CONFIG_MTK_TIMER=y
|
||||
# CONFIG_MTK_UART_APDMA is not set
|
||||
CONFIG_MUTEX_SPIN_ON_OWNER=y
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_NEED_SG_DMA_LENGTH=y
|
||||
CONFIG_NET_DEVLINK=y
|
||||
CONFIG_NET_DSA=y
|
||||
CONFIG_NET_DSA_MT7530=y
|
||||
CONFIG_NET_DSA_TAG_MTK=y
|
||||
CONFIG_NET_FLOW_LIMIT=y
|
||||
CONFIG_NET_MEDIATEK_OFFLOAD=y
|
||||
CONFIG_NET_MEDIATEK_SOC=y
|
||||
CONFIG_NET_SWITCHDEV=y
|
||||
CONFIG_NET_VENDOR_MEDIATEK=y
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NO_HZ_COMMON=y
|
||||
CONFIG_NO_HZ_IDLE=y
|
||||
CONFIG_NR_CPUS=2
|
||||
CONFIG_NVMEM=y
|
||||
CONFIG_NVMEM_SYSFS=y
|
||||
CONFIG_OF=y
|
||||
CONFIG_OF_ADDRESS=y
|
||||
CONFIG_OF_EARLY_FLATTREE=y
|
||||
CONFIG_OF_FLATTREE=y
|
||||
CONFIG_OF_GPIO=y
|
||||
CONFIG_OF_IRQ=y
|
||||
CONFIG_OF_KOBJ=y
|
||||
CONFIG_OF_MDIO=y
|
||||
CONFIG_OF_NET=y
|
||||
CONFIG_OLD_SIGSUSPEND3=y
|
||||
CONFIG_PADATA=y
|
||||
CONFIG_PARTITION_PERCPU=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIEAER=y
|
||||
CONFIG_PCIEASPM=y
|
||||
# CONFIG_PCIEASPM_DEBUG is not set
|
||||
# CONFIG_PCIEASPM_DEFAULT is not set
|
||||
CONFIG_PCIEASPM_PERFORMANCE=y
|
||||
# CONFIG_PCIEASPM_POWERSAVE is not set
|
||||
# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
|
||||
CONFIG_PCIEPORTBUS=y
|
||||
CONFIG_PCIE_MEDIATEK=y
|
||||
CONFIG_PCIE_PME=y
|
||||
CONFIG_PCI_DEBUG=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
CONFIG_PCI_DOMAINS_GENERIC=y
|
||||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCI_MSI_IRQ_DOMAIN=y
|
||||
CONFIG_PGTABLE_LEVELS=3
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHYLINK=y
|
||||
CONFIG_PHYS_ADDR_T_64BIT=y
|
||||
CONFIG_PHY_MTK_TPHY=y
|
||||
# CONFIG_PHY_MTK_UFS is not set
|
||||
# CONFIG_PHY_MTK_XSPHY is not set
|
||||
CONFIG_PINCTRL=y
|
||||
# CONFIG_PINCTRL_MT2712 is not set
|
||||
# CONFIG_PINCTRL_MT6765 is not set
|
||||
# CONFIG_PINCTRL_MT6797 is not set
|
||||
CONFIG_PINCTRL_MT7622=y
|
||||
# CONFIG_PINCTRL_MT8173 is not set
|
||||
# CONFIG_PINCTRL_MT8183 is not set
|
||||
CONFIG_PINCTRL_MT8516=y
|
||||
CONFIG_PINCTRL_MTK=y
|
||||
CONFIG_PINCTRL_MTK_MOORE=y
|
||||
CONFIG_PLUGIN_HOSTCC="g++"
|
||||
CONFIG_PM=y
|
||||
CONFIG_PM_CLK=y
|
||||
CONFIG_PM_GENERIC_DOMAINS=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_OF=y
|
||||
CONFIG_PM_OPP=y
|
||||
CONFIG_POWER_RESET=y
|
||||
CONFIG_POWER_RESET_SYSCON=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_MEDIATEK=y
|
||||
# CONFIG_PWM_MTK_DISP is not set
|
||||
CONFIG_PWM_SYSFS=y
|
||||
CONFIG_QUEUED_RWLOCKS=y
|
||||
CONFIG_QUEUED_SPINLOCKS=y
|
||||
CONFIG_RAS=y
|
||||
CONFIG_RATIONAL=y
|
||||
# CONFIG_RAVE_SP_CORE is not set
|
||||
CONFIG_RCU_NEED_SEGCBLIST=y
|
||||
CONFIG_RCU_STALL_COMMON=y
|
||||
CONFIG_REALTEK_PHY=y
|
||||
CONFIG_REFCOUNT_FULL=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_REGMAP_MMIO=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_REGULATOR_MT6380=y
|
||||
CONFIG_RESET_CONTROLLER=y
|
||||
CONFIG_RFS_ACCEL=y
|
||||
CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
|
||||
CONFIG_RPS=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_MT7622=y
|
||||
CONFIG_RTC_I2C_AND_SPI=y
|
||||
CONFIG_RTL8367S_GSW=y
|
||||
CONFIG_RWSEM_SPIN_ON_OWNER=y
|
||||
CONFIG_SCSI=y
|
||||
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
|
||||
CONFIG_SERIAL_8250_FSL=y
|
||||
CONFIG_SERIAL_8250_MT6577=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=3
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=3
|
||||
CONFIG_SERIAL_DEV_BUS=y
|
||||
CONFIG_SERIAL_DEV_CTRL_TTYPORT=y
|
||||
CONFIG_SERIAL_MCTRL_GPIO=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_SGL_ALLOC=y
|
||||
CONFIG_SG_POOL=y
|
||||
CONFIG_SMP=y
|
||||
# CONFIG_SND_SOC_MT6797 is not set
|
||||
# CONFIG_SND_SOC_MT8183 is not set
|
||||
CONFIG_SPARSEMEM=y
|
||||
CONFIG_SPARSEMEM_EXTREME=y
|
||||
CONFIG_SPARSEMEM_MANUAL=y
|
||||
CONFIG_SPARSEMEM_VMEMMAP=y
|
||||
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_MASTER=y
|
||||
CONFIG_SPI_MEM=y
|
||||
CONFIG_SPI_MT65XX=y
|
||||
CONFIG_SPI_MTK_NOR=y
|
||||
CONFIG_SPI_MTK_SNFI=y
|
||||
CONFIG_SRCU=y
|
||||
CONFIG_SWCONFIG=y
|
||||
CONFIG_SWIOTLB=y
|
||||
CONFIG_SWPHY=y
|
||||
CONFIG_SYSCTL_EXCEPTION_TRACE=y
|
||||
CONFIG_SYSVIPC_COMPAT=y
|
||||
CONFIG_SYS_SUPPORTS_HUGETLBFS=y
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
|
||||
CONFIG_THERMAL_EMULATION=y
|
||||
CONFIG_THERMAL_GOV_BANG_BANG=y
|
||||
CONFIG_THERMAL_GOV_FAIR_SHARE=y
|
||||
CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
|
||||
CONFIG_THERMAL_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_GOV_USER_SPACE=y
|
||||
CONFIG_THERMAL_OF=y
|
||||
CONFIG_THERMAL_WRITABLE_TRIPS=y
|
||||
CONFIG_THREAD_INFO_IN_TASK=y
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
CONFIG_TREE_RCU=y
|
||||
CONFIG_TREE_SRCU=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
|
||||
CONFIG_UBIFS_FS_LZO=y
|
||||
CONFIG_UBIFS_FS_ZLIB=y
|
||||
# CONFIG_UCLAMP_TASK is not set
|
||||
# CONFIG_UNMAP_KERNEL_AT_EL0 is not set
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_COMMON=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_MTK=y
|
||||
# CONFIG_USB_XHCI_PLATFORM is not set
|
||||
CONFIG_VMAP_STACK=y
|
||||
CONFIG_WATCHDOG_CORE=y
|
||||
CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_PANIC=y
|
||||
CONFIG_WATCHDOG_PRETIMEOUT_GOV=y
|
||||
# CONFIG_WATCHDOG_PRETIMEOUT_GOV_NOOP is not set
|
||||
CONFIG_WATCHDOG_PRETIMEOUT_GOV_PANIC=y
|
||||
CONFIG_WATCHDOG_PRETIMEOUT_GOV_SEL=m
|
||||
CONFIG_WATCHDOG_SYSFS=y
|
||||
CONFIG_XPS=y
|
||||
CONFIG_ZLIB_DEFLATE=y
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_ZONE_DMA32=y
|
||||
@ -1,10 +0,0 @@
|
||||
ARCH:=aarch64
|
||||
SUBTARGET:=mt7622
|
||||
BOARDNAME:=MT7622
|
||||
CPU_TYPE:=cortex-a53
|
||||
DEFAULT_PACKAGES += kmod-mt7615e kmod-mt7615-firmware wpad-openssl
|
||||
KERNELNAME:=Image dtbs
|
||||
|
||||
define Target/Description
|
||||
Build firmware images for MediaTek MT7622 ARM based boards.
|
||||
endef
|
||||
@ -1,36 +0,0 @@
|
||||
#!/bin/sh
|
||||
|
||||
. /lib/functions.sh
|
||||
. /lib/functions/uci-defaults.sh
|
||||
. /lib/functions/system.sh
|
||||
|
||||
mediatek_setup_interfaces()
|
||||
{
|
||||
local board="$1"
|
||||
|
||||
case $board in
|
||||
bananapi,bpi-r2|\
|
||||
unielec,u7623-02-emmc-512m)
|
||||
ucidef_set_interfaces_lan_wan "lan0 lan1 lan2 lan3" "wan"
|
||||
;;
|
||||
esac
|
||||
}
|
||||
|
||||
mediatek_setup_macs()
|
||||
{
|
||||
local board="$1"
|
||||
|
||||
case $board in
|
||||
unielec,u7623-02-emmc-512m)
|
||||
ucidef_set_interface_macaddr "wan" "$(cat /sys/class/net/wan/address)"
|
||||
;;
|
||||
esac
|
||||
}
|
||||
|
||||
board_config_update
|
||||
board=$(board_name)
|
||||
mediatek_setup_interfaces $board
|
||||
mediatek_setup_macs $board
|
||||
board_config_flush
|
||||
|
||||
exit 0
|
||||
@ -1,65 +0,0 @@
|
||||
# Copyright (C) 2018 OpenWrt.org
|
||||
|
||||
. /lib/functions.sh
|
||||
. /lib/functions/system.sh
|
||||
|
||||
set_recovery_mac_address() {
|
||||
local RECOVERY_PART="$1"
|
||||
local mac
|
||||
|
||||
if [ -b $RECOVERY_PART ]; then
|
||||
insmod nls_cp437
|
||||
insmod nls_iso8859-1
|
||||
insmod fat
|
||||
insmod vfat
|
||||
mkdir -p /tmp/recovery
|
||||
if mount -o rw,noatime $RECOVERY_PART -t vfat /tmp/recovery; then
|
||||
if [ -f "/tmp/recovery/mac_addr" ];
|
||||
then
|
||||
mac=$(cat /tmp/recovery/mac_addr)
|
||||
else
|
||||
mac=$(cat /sys/class/net/eth0/address)
|
||||
echo "$mac" > /tmp/recovery/mac_addr
|
||||
fi
|
||||
|
||||
sync
|
||||
umount /tmp/recovery
|
||||
rmdir /tmp/recovery
|
||||
|
||||
ip link set dev wan address $mac 2> /dev/null
|
||||
|
||||
mac=$(macaddr_add $mac 1)
|
||||
|
||||
ip link set dev lan0 address $mac 2>/dev/null
|
||||
ip link set dev lan1 address $mac 2>/dev/null
|
||||
ip link set dev lan2 address $mac 2>/dev/null
|
||||
ip link set dev lan3 address $mac 2>/dev/null
|
||||
fi
|
||||
fi
|
||||
}
|
||||
|
||||
preinit_set_mac_address() {
|
||||
local rootpart
|
||||
|
||||
case $(board_name) in
|
||||
bananapi,bpi-r2|\
|
||||
unielec,u7623-02-emmc-512m)
|
||||
rootpart=$(cat /proc/cmdline)
|
||||
rootpart="${rootpart##*root=}"
|
||||
rootpart="${rootpart%% *}"
|
||||
case $rootpart in
|
||||
/dev/mmcblk0p2) # Legacy U7623 image
|
||||
set_recovery_mac_address /dev/mmcblk0p1
|
||||
;;
|
||||
/dev/mmcblk0p3) # U7623 or Banana Pi R2 eMMC
|
||||
set_recovery_mac_address /dev/mmcblk0p2
|
||||
;;
|
||||
/dev/mmcblk1p3) # Banana Pi R2 SD
|
||||
set_recovery_mac_address /dev/mmcblk1p2
|
||||
;;
|
||||
esac
|
||||
;;
|
||||
esac
|
||||
}
|
||||
|
||||
boot_hook_add preinit_main preinit_set_mac_address
|
||||
@ -1,36 +0,0 @@
|
||||
# Copyright (C) 2015 OpenWrt.org
|
||||
|
||||
. /lib/upgrade/common.sh
|
||||
|
||||
move_config() {
|
||||
local partdev partnum
|
||||
|
||||
case $(board_name) in
|
||||
bananapi,bpi-r2)
|
||||
partnum=2
|
||||
;;
|
||||
unielec,u7623-02-emmc-512m)
|
||||
if grep -q root=/dev/mmcblk0p2 /proc/cmdline; then
|
||||
partnum=1;
|
||||
else
|
||||
partnum=2;
|
||||
fi
|
||||
;;
|
||||
*)
|
||||
return 1
|
||||
;;
|
||||
esac
|
||||
|
||||
if export_bootdevice && export_partdevice partdev $partnum; then
|
||||
insmod nls_cp437
|
||||
insmod nls_iso8859-1
|
||||
insmod fat
|
||||
insmod vfat
|
||||
mkdir -p /recovery
|
||||
mount -o rw,noatime "/dev/$partdev" -t vfat /recovery
|
||||
[ -f "/recovery/$BACKUP_FILE" ] && mv -f "/recovery/$BACKUP_FILE" /
|
||||
umount /recovery
|
||||
fi
|
||||
}
|
||||
|
||||
boot_hook_add preinit_mount_root move_config
|
||||
@ -1,197 +0,0 @@
|
||||
|
||||
REQUIRE_IMAGE_METADATA=1
|
||||
|
||||
# Full system upgrade including preloader for MediaTek SoCs on eMMC or SD
|
||||
mtk_mmc_full_upgrade() {
|
||||
local diskdev partdev diff oldrecovery
|
||||
|
||||
if grep -q root=/dev/mmcblk0p2 /proc/cmdline; then
|
||||
oldrecovery=1
|
||||
else
|
||||
oldrecovery=2
|
||||
fi
|
||||
|
||||
export_bootdevice && export_partdevice diskdev 0 || {
|
||||
echo "Unable to determine upgrade device"
|
||||
return 1
|
||||
}
|
||||
|
||||
#Keep the persistent random mac address (if it exists)
|
||||
mkdir -p /tmp/recovery
|
||||
export_partdevice recoverydev $oldrecovery
|
||||
if mount -o rw,noatime "/dev/$recoverydev" -tvfat /tmp/recovery; then
|
||||
[ -f "/tmp/recovery/mac_addr" ] && cp /tmp/recovery/mac_addr /tmp/
|
||||
umount /tmp/recovery
|
||||
fi
|
||||
sync
|
||||
|
||||
if [ "$SAVE_PARTITIONS" = "1" ]; then
|
||||
get_partitions "/dev/$diskdev" bootdisk
|
||||
|
||||
#extract the boot sector from the image
|
||||
get_image "$@" | dd of=/tmp/image.bs count=1 bs=512b
|
||||
|
||||
get_partitions /tmp/image.bs image
|
||||
|
||||
#compare tables
|
||||
diff="$(grep -F -x -v -f /tmp/partmap.bootdisk /tmp/partmap.image)"
|
||||
else
|
||||
diff=1
|
||||
fi
|
||||
|
||||
if [ -n "$diff" ]; then
|
||||
get_image "$@" | dd of="/dev/$diskdev" bs=4096 conv=fsync
|
||||
|
||||
# Separate removal and addition is necessary; otherwise, partition 1
|
||||
# will be missing if it overlaps with the old partition 2
|
||||
partx -d - "/dev/$diskdev"
|
||||
partx -a - "/dev/$diskdev"
|
||||
else
|
||||
# iterate over each partition from the image and write it to the boot disk
|
||||
while read part start size; do
|
||||
part="$(($part - 2))"
|
||||
if export_partdevice partdev $part; then
|
||||
echo "Writing image to /dev/$partdev..."
|
||||
get_image "$@" | dd of="/dev/$partdev" ibs="512" obs=1M skip="$start" count="$size" conv=fsync
|
||||
else
|
||||
echo "Unable to find partition $part device, skipped."
|
||||
fi
|
||||
done < /tmp/partmap.image
|
||||
|
||||
#copy partition uuid
|
||||
echo "Writing new UUID to /dev/$diskdev..."
|
||||
get_image "$@" | dd of="/dev/$diskdev" bs=1 skip=440 count=4 seek=440 conv=fsync
|
||||
fi
|
||||
|
||||
export_partdevice recoverydev 2
|
||||
if mount -o rw,noatime "/dev/$recoverydev" -t vfat /tmp/recovery; then
|
||||
[ -f "/tmp/mac_addr" ] && cp /tmp/mac_addr /tmp/recovery
|
||||
|
||||
if [ "$diskdev" = "mmcblk0" -a -r /tmp/recovery/eMMCboot.bin ]; then
|
||||
echo 0 > /sys/block/mmcblk0boot0/force_ro
|
||||
dd if=/tmp/recovery/eMMCboot.bin of=/dev/mmcblk0boot0 conv=fsync
|
||||
sync
|
||||
echo 1 > /sys/block/mmcblk0boot0/force_ro
|
||||
fi
|
||||
sync
|
||||
umount /tmp/recovery
|
||||
fi
|
||||
}
|
||||
|
||||
platform_do_upgrade() {
|
||||
local board=$(board_name)
|
||||
|
||||
case "$board" in
|
||||
bananapi,bpi-r2)
|
||||
mtk_mmc_full_upgrade "$1"
|
||||
;;
|
||||
|
||||
unielec,u7623-02-emmc-512m)
|
||||
local magic="$(get_magic_long "$1")"
|
||||
if [ "$magic" = "53444d4d" ]; then
|
||||
mtk_mmc_full_upgrade "$1"
|
||||
else # Old partial image starting with uImage
|
||||
# Keep the persistent random mac address (if it exists)
|
||||
recoverydev=mmcblk0p1
|
||||
mkdir -p /tmp/recovery
|
||||
mount -o rw,noatime /dev/$recoverydev /tmp/recovery
|
||||
[ -f "/tmp/recovery/mac_addr" ] && \
|
||||
mv -f /tmp/recovery/mac_addr /tmp/
|
||||
umount /tmp/recovery
|
||||
|
||||
# 1310720 is the offset in bytes from the start of eMMC and to
|
||||
# the location of the kernel (2560 512 byte sectors)
|
||||
get_image "$1" | dd of=/dev/mmcblk0 bs=1310720 seek=1 conv=fsync
|
||||
|
||||
mount -o rw,noatime /dev/$recoverydev /tmp/recovery
|
||||
[ -f "/tmp/mac_addr" ] && mv -f /tmp/mac_addr /tmp/recovery
|
||||
sync
|
||||
umount /tmp/recovery
|
||||
fi
|
||||
;;
|
||||
*)
|
||||
default_do_upgrade "$1"
|
||||
;;
|
||||
esac
|
||||
}
|
||||
|
||||
PART_NAME=firmware
|
||||
|
||||
platform_check_image() {
|
||||
local board=$(board_name)
|
||||
local magic="$(get_magic_long "$1")"
|
||||
local diskdev partdev diff
|
||||
|
||||
[ "$#" -gt 1 ] && return 1
|
||||
|
||||
case "$board" in
|
||||
bananapi,bpi-r2)
|
||||
[ "$magic" != "53444d4d" ] && {
|
||||
echo "Invalid image type."
|
||||
return 1
|
||||
}
|
||||
export_bootdevice && export_partdevice diskdev 0 || {
|
||||
echo "Unable to determine upgrade device"
|
||||
return 1
|
||||
}
|
||||
|
||||
get_partitions "/dev/$diskdev" bootdisk
|
||||
|
||||
#extract the boot sector from the image
|
||||
get_image "$@" | dd of=/tmp/image.bs count=1 bs=512b 2>/dev/null
|
||||
|
||||
get_partitions /tmp/image.bs image
|
||||
|
||||
#compare tables
|
||||
diff="$(grep -F -x -v -f /tmp/partmap.bootdisk /tmp/partmap.image)"
|
||||
|
||||
rm -f /tmp/image.bs /tmp/partmap.bootdisk /tmp/partmap.image
|
||||
|
||||
if [ -n "$diff" ]; then
|
||||
echo "Partition layout has changed. Full image will be written."
|
||||
ask_bool 0 "Abort" && exit 1
|
||||
return 0
|
||||
fi
|
||||
;;
|
||||
unielec,u7623-02-emmc-512m)
|
||||
# Can always upgrade to the new-style full image
|
||||
[ "$magic" = "53444d4d" ] && return 0
|
||||
|
||||
# Legacy uImage directly at 0xA00 on the eMMC.
|
||||
[ "$magic" != "27051956" ] && {
|
||||
echo "Invalid image type."
|
||||
return 1
|
||||
}
|
||||
rootpart=$(cat /proc/cmdline)
|
||||
rootpart="${rootpart##*root=}"
|
||||
rootpart="${rootpart%% *}"
|
||||
[ "$rootpart" != "/dev/mmcblk0p2" ] && {
|
||||
echo "Cannot downgrade to legacy image."
|
||||
return 1
|
||||
}
|
||||
return 0
|
||||
;;
|
||||
*)
|
||||
echo "Sysupgrade is not supported on your board yet."
|
||||
return 1
|
||||
;;
|
||||
esac
|
||||
|
||||
return 0
|
||||
}
|
||||
|
||||
platform_copy_config() {
|
||||
case "$(board_name)" in
|
||||
bananapi,bpi-r2|\
|
||||
unielec,u7623-02-emmc-512m)
|
||||
# platform_do_upgrade() will have set $recoverydev
|
||||
if [ -n "$recoverydev" ]; then
|
||||
mkdir -p /tmp/recovery
|
||||
mount -o rw,noatime "/dev/$recoverydev" -t vfat /tmp/recovery
|
||||
cp -af "$UPGRADE_BACKUP" "/tmp/recovery/$BACKUP_FILE"
|
||||
sync
|
||||
umount /tmp/recovery
|
||||
fi
|
||||
;;
|
||||
esac
|
||||
}
|
||||
@ -1,523 +0,0 @@
|
||||
# CONFIG_AIO is not set
|
||||
CONFIG_ALIGNMENT_TRAP=y
|
||||
CONFIG_ARCH_32BIT_OFF_T=y
|
||||
CONFIG_ARCH_CLOCKSOURCE_DATA=y
|
||||
CONFIG_ARCH_HAS_BINFMT_FLAT=y
|
||||
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
|
||||
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
|
||||
CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
|
||||
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
|
||||
CONFIG_ARCH_HAS_KCOV=y
|
||||
CONFIG_ARCH_HAS_KEEPINITRD=y
|
||||
CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
|
||||
CONFIG_ARCH_HAS_PHYS_TO_DMA=y
|
||||
CONFIG_ARCH_HAS_SETUP_DMA_OPS=y
|
||||
CONFIG_ARCH_HAS_SET_MEMORY=y
|
||||
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
|
||||
CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
|
||||
CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y
|
||||
CONFIG_ARCH_HAS_TICK_BROADCAST=y
|
||||
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
|
||||
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
|
||||
CONFIG_ARCH_KEEP_MEMBLOCK=y
|
||||
CONFIG_ARCH_MEDIATEK=y
|
||||
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
|
||||
CONFIG_ARCH_MULTIPLATFORM=y
|
||||
CONFIG_ARCH_MULTI_V6_V7=y
|
||||
CONFIG_ARCH_MULTI_V7=y
|
||||
CONFIG_ARCH_NR_GPIO=0
|
||||
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
|
||||
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
|
||||
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
|
||||
CONFIG_ARCH_SUPPORTS_UPROBES=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
|
||||
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
|
||||
CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
|
||||
CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
|
||||
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARM_APPENDED_DTB=y
|
||||
CONFIG_ARM_ARCH_TIMER=y
|
||||
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
|
||||
# CONFIG_ARM_ATAG_DTB_COMPAT is not set
|
||||
CONFIG_ARM_CPU_SUSPEND=y
|
||||
# CONFIG_ARM_CPU_TOPOLOGY is not set
|
||||
CONFIG_ARM_GIC=y
|
||||
CONFIG_ARM_HAS_SG_CHAIN=y
|
||||
CONFIG_ARM_L1_CACHE_SHIFT=6
|
||||
CONFIG_ARM_L1_CACHE_SHIFT_6=y
|
||||
CONFIG_ARM_MEDIATEK_CPUFREQ=y
|
||||
CONFIG_ARM_PATCH_IDIV=y
|
||||
CONFIG_ARM_PATCH_PHYS_VIRT=y
|
||||
# CONFIG_ARM_SMMU is not set
|
||||
CONFIG_ARM_THUMB=y
|
||||
CONFIG_ARM_THUMBEE=y
|
||||
CONFIG_ARM_UNWIND=y
|
||||
CONFIG_ARM_VIRT_EXT=y
|
||||
CONFIG_ATAGS=y
|
||||
CONFIG_AUTO_ZRELADDR=y
|
||||
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_MQ_PCI=y
|
||||
CONFIG_BLK_PM=y
|
||||
CONFIG_BOUNCE=y
|
||||
# CONFIG_CACHE_L2X0 is not set
|
||||
CONFIG_CC_HAS_KASAN_GENERIC=y
|
||||
CONFIG_CLEANCACHE=y
|
||||
CONFIG_CLKDEV_LOOKUP=y
|
||||
CONFIG_CLKSRC_MMIO=y
|
||||
CONFIG_CLONE_BACKWARDS=y
|
||||
CONFIG_CMDLINE="earlyprintk console=ttyS0,115200 rootfstype=squashfs,jffs2"
|
||||
CONFIG_CMDLINE_FROM_BOOTLOADER=y
|
||||
CONFIG_CMDLINE_PARTITION=y
|
||||
CONFIG_COMMON_CLK=y
|
||||
CONFIG_COMMON_CLK_MEDIATEK=y
|
||||
CONFIG_COMMON_CLK_MT2701=y
|
||||
# CONFIG_COMMON_CLK_MT2701_AUDSYS is not set
|
||||
CONFIG_COMMON_CLK_MT2701_BDPSYS=y
|
||||
CONFIG_COMMON_CLK_MT2701_ETHSYS=y
|
||||
# CONFIG_COMMON_CLK_MT2701_G3DSYS is not set
|
||||
CONFIG_COMMON_CLK_MT2701_HIFSYS=y
|
||||
CONFIG_COMMON_CLK_MT2701_IMGSYS=y
|
||||
CONFIG_COMMON_CLK_MT2701_MMSYS=y
|
||||
CONFIG_COMMON_CLK_MT2701_VDECSYS=y
|
||||
# CONFIG_COMMON_CLK_MT7622 is not set
|
||||
# CONFIG_COMMON_CLK_MT7629 is not set
|
||||
# CONFIG_COMMON_CLK_MT8135 is not set
|
||||
# CONFIG_COMMON_CLK_MT8173 is not set
|
||||
CONFIG_COMMON_CLK_MT8516=y
|
||||
# CONFIG_COMMON_CLK_MT8516_AUDSYS is not set
|
||||
CONFIG_COMPAT_32BIT_TIME=y
|
||||
CONFIG_COREDUMP=y
|
||||
# CONFIG_CPUFREQ_DT is not set
|
||||
CONFIG_CPU_32v6K=y
|
||||
CONFIG_CPU_32v7=y
|
||||
CONFIG_CPU_ABRT_EV7=y
|
||||
CONFIG_CPU_CACHE_V7=y
|
||||
CONFIG_CPU_CACHE_VIPT=y
|
||||
CONFIG_CPU_COPY_V6=y
|
||||
CONFIG_CPU_CP15=y
|
||||
CONFIG_CPU_CP15_MMU=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
|
||||
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
|
||||
CONFIG_CPU_FREQ_GOV_COMMON=y
|
||||
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
|
||||
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
|
||||
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
|
||||
# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
|
||||
CONFIG_CPU_FREQ_STAT=y
|
||||
CONFIG_CPU_HAS_ASID=y
|
||||
CONFIG_CPU_PABRT_V7=y
|
||||
CONFIG_CPU_PM=y
|
||||
CONFIG_CPU_RMAP=y
|
||||
CONFIG_CPU_SPECTRE=y
|
||||
# CONFIG_CPU_THERMAL is not set
|
||||
CONFIG_CPU_THUMB_CAPABLE=y
|
||||
CONFIG_CPU_TLB_V7=y
|
||||
CONFIG_CPU_V7=y
|
||||
CONFIG_CRC16=y
|
||||
# CONFIG_CRC32_SARWATE is not set
|
||||
CONFIG_CRC32_SLICEBY8=y
|
||||
CONFIG_CROSS_MEMORY_ATTACH=y
|
||||
CONFIG_CRYPTO_ACOMP2=y
|
||||
CONFIG_CRYPTO_AEAD=y
|
||||
CONFIG_CRYPTO_AEAD2=y
|
||||
CONFIG_CRYPTO_CRC32=y
|
||||
CONFIG_CRYPTO_CRC32C=y
|
||||
CONFIG_CRYPTO_CTR=y
|
||||
CONFIG_CRYPTO_DEFLATE=y
|
||||
CONFIG_CRYPTO_DEV_SAFEXCEL=y
|
||||
CONFIG_CRYPTO_DRBG=y
|
||||
CONFIG_CRYPTO_DRBG_HMAC=y
|
||||
CONFIG_CRYPTO_DRBG_MENU=y
|
||||
CONFIG_CRYPTO_HASH=y
|
||||
CONFIG_CRYPTO_HASH2=y
|
||||
CONFIG_CRYPTO_HASH_INFO=y
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_HW=y
|
||||
CONFIG_CRYPTO_JITTERENTROPY=y
|
||||
CONFIG_CRYPTO_LIB_SHA256=y
|
||||
CONFIG_CRYPTO_LZO=y
|
||||
CONFIG_CRYPTO_MANAGER=y
|
||||
CONFIG_CRYPTO_MANAGER2=y
|
||||
CONFIG_CRYPTO_NULL=y
|
||||
CONFIG_CRYPTO_NULL2=y
|
||||
CONFIG_CRYPTO_RNG=y
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CRYPTO_RNG_DEFAULT=y
|
||||
CONFIG_CRYPTO_SEQIV=y
|
||||
CONFIG_CRYPTO_SHA1=y
|
||||
CONFIG_CRYPTO_SHA256=y
|
||||
CONFIG_CRYPTO_SHA512=y
|
||||
CONFIG_CRYPTO_ZSTD=y
|
||||
CONFIG_DCACHE_WORD_ACCESS=y
|
||||
CONFIG_DEBUG_ALIGN_RODATA=y
|
||||
CONFIG_DEBUG_BUGVERBOSE=y
|
||||
CONFIG_DEBUG_GPIO=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEBUG_LL=y
|
||||
CONFIG_DEBUG_LL_INCLUDE="debug/8250.S"
|
||||
CONFIG_DEBUG_MISC=y
|
||||
CONFIG_DEBUG_MT6589_UART0=y
|
||||
# CONFIG_DEBUG_MT8127_UART0 is not set
|
||||
# CONFIG_DEBUG_MT8135_UART3 is not set
|
||||
CONFIG_DEBUG_PREEMPT=y
|
||||
CONFIG_DEBUG_UART_8250=y
|
||||
# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set
|
||||
CONFIG_DEBUG_UART_8250_SHIFT=2
|
||||
# CONFIG_DEBUG_UART_8250_WORD is not set
|
||||
CONFIG_DEBUG_UART_PHYS=0x11004000
|
||||
CONFIG_DEBUG_UART_VIRT=0xf1004000
|
||||
CONFIG_DEBUG_UNCOMPRESS=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_DMA_ENGINE=y
|
||||
CONFIG_DMA_OF=y
|
||||
CONFIG_DMA_REMAP=y
|
||||
CONFIG_DTC=y
|
||||
CONFIG_EARLY_PRINTK=y
|
||||
CONFIG_EDAC_ATOMIC_SCRUB=y
|
||||
CONFIG_EDAC_SUPPORT=y
|
||||
CONFIG_EINT_MTK=y
|
||||
CONFIG_ELF_CORE=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_F2FS_FS=y
|
||||
CONFIG_FIXED_PHY=y
|
||||
CONFIG_FIX_EARLYCON_MEM=y
|
||||
CONFIG_FREEZER=y
|
||||
CONFIG_FS_IOMAP=y
|
||||
CONFIG_FS_MBCACHE=y
|
||||
CONFIG_FW_LOADER_PAGED_BUF=y
|
||||
CONFIG_GENERIC_ALLOCATOR=y
|
||||
CONFIG_GENERIC_BUG=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
|
||||
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
||||
CONFIG_GENERIC_EARLY_IOREMAP=y
|
||||
CONFIG_GENERIC_IDLE_POLL_SETUP=y
|
||||
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
|
||||
CONFIG_GENERIC_IRQ_MIGRATION=y
|
||||
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
|
||||
CONFIG_GENERIC_IRQ_SHOW=y
|
||||
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
|
||||
CONFIG_GENERIC_MSI_IRQ=y
|
||||
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
|
||||
CONFIG_GENERIC_PCI_IOMAP=y
|
||||
CONFIG_GENERIC_PHY=y
|
||||
CONFIG_GENERIC_PINCONF=y
|
||||
CONFIG_GENERIC_PINCTRL_GROUPS=y
|
||||
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
|
||||
CONFIG_GENERIC_SCHED_CLOCK=y
|
||||
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
||||
CONFIG_GENERIC_STRNCPY_FROM_USER=y
|
||||
CONFIG_GENERIC_STRNLEN_USER=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_HANDLE_DOMAIN_IRQ=y
|
||||
CONFIG_HARDEN_BRANCH_PREDICTOR=y
|
||||
CONFIG_HARDIRQS_SW_RESEND=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT_MAP=y
|
||||
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
|
||||
CONFIG_HAVE_ARCH_BITREVERSE=y
|
||||
CONFIG_HAVE_ARCH_JUMP_LABEL=y
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
CONFIG_HAVE_ARCH_PFN_VALID=y
|
||||
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
|
||||
CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
|
||||
CONFIG_HAVE_ARCH_TRACEHOOK=y
|
||||
CONFIG_HAVE_ARM_ARCH_TIMER=y
|
||||
CONFIG_HAVE_ARM_SMCCC=y
|
||||
CONFIG_HAVE_CLK=y
|
||||
CONFIG_HAVE_CLK_PREPARE=y
|
||||
CONFIG_HAVE_CONTEXT_TRACKING=y
|
||||
CONFIG_HAVE_COPY_THREAD_TLS=y
|
||||
CONFIG_HAVE_C_RECORDMCOUNT=y
|
||||
CONFIG_HAVE_DEBUG_KMEMLEAK=y
|
||||
CONFIG_HAVE_DMA_CONTIGUOUS=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
|
||||
CONFIG_HAVE_EBPF_JIT=y
|
||||
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_HAVE_IDE=y
|
||||
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
|
||||
CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
|
||||
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
|
||||
CONFIG_HAVE_NET_DSA=y
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
CONFIG_HAVE_OPTPROBES=y
|
||||
CONFIG_HAVE_PCI=y
|
||||
CONFIG_HAVE_PERF_EVENTS=y
|
||||
CONFIG_HAVE_PERF_REGS=y
|
||||
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
|
||||
CONFIG_HAVE_PROC_CPU=y
|
||||
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
|
||||
CONFIG_HAVE_RSEQ=y
|
||||
CONFIG_HAVE_SMP=y
|
||||
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
|
||||
CONFIG_HAVE_UID16=y
|
||||
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
|
||||
CONFIG_HIGHMEM=y
|
||||
# CONFIG_HIGHPTE is not set
|
||||
CONFIG_HOTPLUG_CPU=y
|
||||
CONFIG_HWMON=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_HW_RANDOM_MTK=y
|
||||
CONFIG_HZ=100
|
||||
CONFIG_HZ_100=y
|
||||
CONFIG_HZ_FIXED=0
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_BOARDINFO=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_MT65XX=y
|
||||
CONFIG_ICPLUS_PHY=y
|
||||
CONFIG_IIO=y
|
||||
CONFIG_INITRAMFS_COMPRESSION=""
|
||||
CONFIG_INITRAMFS_ROOT_GID=1000
|
||||
CONFIG_INITRAMFS_ROOT_UID=1000
|
||||
CONFIG_INITRAMFS_SOURCE="/openwrt/trunk/build_dir/target-arm_cortex-a7_musl-1.1.14_eabi/root-mediatek /openwrt/trunk/target/linux/generic/image/initramfs-base-files.txt"
|
||||
# CONFIG_IOMMU_DEBUGFS is not set
|
||||
# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
|
||||
# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
|
||||
CONFIG_IOMMU_SUPPORT=y
|
||||
CONFIG_IO_URING=y
|
||||
CONFIG_IRQCHIP=y
|
||||
CONFIG_IRQ_DOMAIN=y
|
||||
CONFIG_IRQ_DOMAIN_HIERARCHY=y
|
||||
CONFIG_IRQ_FORCED_THREADING=y
|
||||
CONFIG_IRQ_WORK=y
|
||||
CONFIG_JBD2=y
|
||||
CONFIG_KALLSYMS=y
|
||||
# CONFIG_KEYBOARD_MTK_PMIC is not set
|
||||
CONFIG_LEDS_MT6323=y
|
||||
# CONFIG_LEDS_UBNT_LEDBAR is not set
|
||||
CONFIG_LIBFDT=y
|
||||
CONFIG_LOCK_DEBUGGING_SUPPORT=y
|
||||
CONFIG_LOCK_SPIN_ON_OWNER=y
|
||||
CONFIG_LZO_COMPRESS=y
|
||||
CONFIG_LZO_DECOMPRESS=y
|
||||
# CONFIG_MACH_MT2701 is not set
|
||||
# CONFIG_MACH_MT6589 is not set
|
||||
# CONFIG_MACH_MT6592 is not set
|
||||
CONFIG_MACH_MT7623=y
|
||||
# CONFIG_MACH_MT7629 is not set
|
||||
# CONFIG_MACH_MT8127 is not set
|
||||
# CONFIG_MACH_MT8135 is not set
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_MDIO_BITBANG=y
|
||||
CONFIG_MDIO_BUS=y
|
||||
CONFIG_MDIO_DEVICE=y
|
||||
CONFIG_MDIO_GPIO=y
|
||||
CONFIG_MEDIATEK_MT6577_AUXADC=y
|
||||
CONFIG_MEDIATEK_WATCHDOG=y
|
||||
CONFIG_MEMFD_CREATE=y
|
||||
CONFIG_MFD_CORE=y
|
||||
CONFIG_MFD_MT6397=y
|
||||
CONFIG_MFD_SYSCON=y
|
||||
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
|
||||
CONFIG_MIGRATION=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_BLOCK=y
|
||||
CONFIG_MMC_MTK=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
# CONFIG_MMC_SDHCI_PCI is not set
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
CONFIG_MODULES_USE_ELF_REL=y
|
||||
# CONFIG_MT753X_GSW is not set
|
||||
CONFIG_MTD_BLOCK2MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_SPI_NOR=y
|
||||
CONFIG_MTD_SPLIT_FIRMWARE=y
|
||||
CONFIG_MTD_SPLIT_UIMAGE_FW=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_MTD_UBI_BEB_LIMIT=20
|
||||
CONFIG_MTD_UBI_BLOCK=y
|
||||
CONFIG_MTD_UBI_WL_THRESHOLD=4096
|
||||
# CONFIG_MTK_CMDQ is not set
|
||||
# CONFIG_MTK_CQDMA is not set
|
||||
CONFIG_MTK_EFUSE=y
|
||||
# CONFIG_MTK_HSDMA is not set
|
||||
CONFIG_MTK_INFRACFG=y
|
||||
# CONFIG_MTK_IOMMU is not set
|
||||
# CONFIG_MTK_IOMMU_V1 is not set
|
||||
CONFIG_MTK_PMIC_WRAP=y
|
||||
CONFIG_MTK_SCPSYS=y
|
||||
CONFIG_MTK_THERMAL=y
|
||||
CONFIG_MTK_TIMER=y
|
||||
# CONFIG_MTK_UART_APDMA is not set
|
||||
CONFIG_MUTEX_SPIN_ON_OWNER=y
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_NEON=y
|
||||
CONFIG_NET_DEVLINK=y
|
||||
CONFIG_NET_DSA=y
|
||||
CONFIG_NET_DSA_MT7530=y
|
||||
CONFIG_NET_DSA_TAG_MTK=y
|
||||
CONFIG_NET_FLOW_LIMIT=y
|
||||
CONFIG_NET_MEDIATEK_OFFLOAD=y
|
||||
CONFIG_NET_MEDIATEK_SOC=y
|
||||
CONFIG_NET_SWITCHDEV=y
|
||||
# CONFIG_NET_VENDOR_AURORA is not set
|
||||
CONFIG_NET_VENDOR_MEDIATEK=y
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_NO_HZ_COMMON=y
|
||||
CONFIG_NO_HZ_IDLE=y
|
||||
CONFIG_NR_CPUS=4
|
||||
CONFIG_NVMEM=y
|
||||
CONFIG_NVMEM_SYSFS=y
|
||||
CONFIG_OF=y
|
||||
CONFIG_OF_ADDRESS=y
|
||||
CONFIG_OF_EARLY_FLATTREE=y
|
||||
CONFIG_OF_FLATTREE=y
|
||||
CONFIG_OF_GPIO=y
|
||||
CONFIG_OF_IRQ=y
|
||||
CONFIG_OF_KOBJ=y
|
||||
CONFIG_OF_MDIO=y
|
||||
CONFIG_OF_NET=y
|
||||
CONFIG_OLD_SIGACTION=y
|
||||
CONFIG_OLD_SIGSUSPEND3=y
|
||||
CONFIG_PADATA=y
|
||||
CONFIG_PAGE_OFFSET=0xC0000000
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIEAER=y
|
||||
CONFIG_PCIEPORTBUS=y
|
||||
CONFIG_PCIE_MEDIATEK=y
|
||||
CONFIG_PCIE_PME=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
CONFIG_PCI_DOMAINS_GENERIC=y
|
||||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCI_MSI_IRQ_DOMAIN=y
|
||||
CONFIG_PERF_USE_VMALLOC=y
|
||||
CONFIG_PGTABLE_LEVELS=2
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHYLINK=y
|
||||
CONFIG_PHY_MTK_TPHY=y
|
||||
# CONFIG_PHY_MTK_UFS is not set
|
||||
# CONFIG_PHY_MTK_XSPHY is not set
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_MT2701=y
|
||||
CONFIG_PINCTRL_MT6397=y
|
||||
CONFIG_PINCTRL_MT7623=y
|
||||
CONFIG_PINCTRL_MTK=y
|
||||
CONFIG_PINCTRL_MTK_MOORE=y
|
||||
CONFIG_PM=y
|
||||
CONFIG_PM_CLK=y
|
||||
CONFIG_PM_GENERIC_DOMAINS=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_OF=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
|
||||
CONFIG_PM_OPP=y
|
||||
CONFIG_PM_SLEEP=y
|
||||
CONFIG_PM_SLEEP_SMP=y
|
||||
CONFIG_POWER_RESET=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_POWER_SUPPLY_HWMON=y
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_PREEMPTION=y
|
||||
CONFIG_PREEMPT_COUNT=y
|
||||
# CONFIG_PREEMPT_NONE is not set
|
||||
CONFIG_PREEMPT_RCU=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_MEDIATEK=y
|
||||
# CONFIG_PWM_MTK_DISP is not set
|
||||
CONFIG_PWM_SYSFS=y
|
||||
CONFIG_RAS=y
|
||||
CONFIG_RATIONAL=y
|
||||
CONFIG_RCU_CPU_STALL_TIMEOUT=21
|
||||
# CONFIG_RCU_EXPERT is not set
|
||||
CONFIG_RCU_NEED_SEGCBLIST=y
|
||||
CONFIG_RCU_STALL_COMMON=y
|
||||
CONFIG_REFCOUNT_FULL=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_REGMAP_MMIO=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_REGULATOR_GPIO=y
|
||||
CONFIG_REGULATOR_MT6323=y
|
||||
# CONFIG_REGULATOR_MT6380 is not set
|
||||
# CONFIG_REGULATOR_MT6397 is not set
|
||||
# CONFIG_REGULATOR_QCOM_SPMI is not set
|
||||
CONFIG_RESET_CONTROLLER=y
|
||||
CONFIG_RFS_ACCEL=y
|
||||
CONFIG_RPS=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
# CONFIG_RTC_DRV_MT6397 is not set
|
||||
# CONFIG_RTC_DRV_MT7622 is not set
|
||||
CONFIG_RTC_I2C_AND_SPI=y
|
||||
CONFIG_RTC_MC146818_LIB=y
|
||||
# CONFIG_RTL8367S_GSW is not set
|
||||
CONFIG_RWSEM_SPIN_ON_OWNER=y
|
||||
# CONFIG_SERIAL_8250_DMA is not set
|
||||
CONFIG_SERIAL_8250_FSL=y
|
||||
CONFIG_SERIAL_8250_MT6577=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=4
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
|
||||
CONFIG_SERIAL_MCTRL_GPIO=y
|
||||
CONFIG_SGL_ALLOC=y
|
||||
CONFIG_SMP=y
|
||||
# CONFIG_SMP_ON_UP is not set
|
||||
# CONFIG_SND_SOC_MT6797 is not set
|
||||
# CONFIG_SND_SOC_MT8183 is not set
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_BITBANG=y
|
||||
CONFIG_SPI_MASTER=y
|
||||
CONFIG_SPI_MEM=y
|
||||
CONFIG_SPI_MT65XX=y
|
||||
# CONFIG_SPI_MTK_NOR is not set
|
||||
# CONFIG_SPI_MTK_SNFI is not set
|
||||
CONFIG_SPMI=y
|
||||
CONFIG_SRCU=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
CONFIG_SUSPEND=y
|
||||
CONFIG_SUSPEND_FREEZER=y
|
||||
CONFIG_SWCONFIG=y
|
||||
CONFIG_SWPHY=y
|
||||
CONFIG_SWP_EMULATE=y
|
||||
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
|
||||
CONFIG_TASKS_RCU=y
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
|
||||
CONFIG_THERMAL_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_OF=y
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
CONFIG_TREE_SRCU=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
|
||||
CONFIG_UBIFS_FS_LZO=y
|
||||
CONFIG_UBIFS_FS_ZLIB=y
|
||||
CONFIG_UBIFS_FS_ZSTD=y
|
||||
CONFIG_UEVENT_HELPER_PATH=""
|
||||
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
|
||||
CONFIG_UNINLINE_SPIN_UNLOCK=y
|
||||
CONFIG_UNWINDER_ARM=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_COMMON=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_MTK=y
|
||||
CONFIG_USB_XHCI_PLATFORM=y
|
||||
CONFIG_USE_OF=y
|
||||
CONFIG_VFP=y
|
||||
CONFIG_VFPv3=y
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_WATCHDOG_CORE=y
|
||||
CONFIG_XPS=y
|
||||
CONFIG_XXHASH=y
|
||||
CONFIG_XZ_DEC_ARM=y
|
||||
CONFIG_XZ_DEC_BCJ=y
|
||||
CONFIG_ZBOOT_ROM_BSS=0
|
||||
CONFIG_ZBOOT_ROM_TEXT=0
|
||||
CONFIG_ZLIB_DEFLATE=y
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_ZSTD_COMPRESS=y
|
||||
CONFIG_ZSTD_DECOMPRESS=y
|
||||
@ -1,16 +0,0 @@
|
||||
#
|
||||
# Copyright (C) 2009 OpenWrt.org
|
||||
#
|
||||
|
||||
ARCH:=arm
|
||||
SUBTARGET:=mt7623
|
||||
BOARDNAME:=MT7623
|
||||
CPU_TYPE:=cortex-a7
|
||||
CPU_SUBTYPE:=neon-vfpv4
|
||||
KERNELNAME:=Image dtbs zImage
|
||||
FEATURES+=ext4 usb
|
||||
|
||||
define Target/Description
|
||||
Build firmware images for MediaTek mt7623 ARM based boards.
|
||||
endef
|
||||
|
||||
@ -1,34 +0,0 @@
|
||||
#!/bin/sh
|
||||
|
||||
. /lib/functions.sh
|
||||
. /lib/functions/uci-defaults.sh
|
||||
. /lib/functions/system.sh
|
||||
|
||||
mediatek_setup_interfaces()
|
||||
{
|
||||
local board="$1"
|
||||
|
||||
case $board in
|
||||
mediatek,mt7629-rfb)
|
||||
ucidef_set_interface_wan "eth1"
|
||||
ucidef_add_switch "switch0" \
|
||||
"0:lan" "1:lan" "2:lan" "3:lan" "6@eth0"
|
||||
;;
|
||||
esac
|
||||
}
|
||||
|
||||
mediatek_setup_macs()
|
||||
{
|
||||
local board="$1"
|
||||
|
||||
case $board in
|
||||
esac
|
||||
}
|
||||
|
||||
board_config_update
|
||||
board=$(board_name)
|
||||
mediatek_setup_interfaces $board
|
||||
mediatek_setup_macs $board
|
||||
board_config_flush
|
||||
|
||||
exit 0
|
||||
@ -1,16 +0,0 @@
|
||||
PART_NAME=firmware
|
||||
REQUIRE_IMAGE_METADATA=1
|
||||
|
||||
platform_check_image() {
|
||||
return 0
|
||||
}
|
||||
|
||||
platform_do_upgrade() {
|
||||
local board=$(board_name)
|
||||
|
||||
case "$board" in
|
||||
*)
|
||||
default_do_upgrade "$1"
|
||||
;;
|
||||
esac
|
||||
}
|
||||
@ -1,379 +0,0 @@
|
||||
CONFIG_ALIGNMENT_TRAP=y
|
||||
CONFIG_ARCH_32BIT_OFF_T=y
|
||||
CONFIG_ARCH_CLOCKSOURCE_DATA=y
|
||||
CONFIG_ARCH_HAS_BINFMT_FLAT=y
|
||||
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
|
||||
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
|
||||
CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
|
||||
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
|
||||
CONFIG_ARCH_HAS_KCOV=y
|
||||
CONFIG_ARCH_HAS_KEEPINITRD=y
|
||||
CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
|
||||
CONFIG_ARCH_HAS_PHYS_TO_DMA=y
|
||||
CONFIG_ARCH_HAS_SETUP_DMA_OPS=y
|
||||
CONFIG_ARCH_HAS_SET_MEMORY=y
|
||||
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
|
||||
CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
|
||||
CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y
|
||||
CONFIG_ARCH_HAS_TICK_BROADCAST=y
|
||||
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
|
||||
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
|
||||
CONFIG_ARCH_KEEP_MEMBLOCK=y
|
||||
CONFIG_ARCH_MEDIATEK=y
|
||||
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
|
||||
CONFIG_ARCH_MULTIPLATFORM=y
|
||||
CONFIG_ARCH_MULTI_V6_V7=y
|
||||
CONFIG_ARCH_MULTI_V7=y
|
||||
CONFIG_ARCH_NR_GPIO=0
|
||||
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
|
||||
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
|
||||
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
|
||||
CONFIG_ARCH_SUPPORTS_UPROBES=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
|
||||
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
|
||||
CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
|
||||
CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
|
||||
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARM_ARCH_TIMER=y
|
||||
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
|
||||
CONFIG_ARM_GIC=y
|
||||
CONFIG_ARM_HAS_SG_CHAIN=y
|
||||
CONFIG_ARM_HEAVY_MB=y
|
||||
CONFIG_ARM_L1_CACHE_SHIFT=6
|
||||
CONFIG_ARM_L1_CACHE_SHIFT_6=y
|
||||
CONFIG_ARM_PATCH_IDIV=y
|
||||
CONFIG_ARM_PATCH_PHYS_VIRT=y
|
||||
CONFIG_ARM_PMU=y
|
||||
CONFIG_ARM_THUMB=y
|
||||
CONFIG_ARM_UNWIND=y
|
||||
CONFIG_ARM_VIRT_EXT=y
|
||||
CONFIG_ATAGS=y
|
||||
CONFIG_AUTO_ZRELADDR=y
|
||||
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_BLK_MQ_PCI=y
|
||||
CONFIG_BLK_PM=y
|
||||
CONFIG_BLK_SCSI_REQUEST=y
|
||||
CONFIG_BSD_PROCESS_ACCT=y
|
||||
CONFIG_BSD_PROCESS_ACCT_V3=y
|
||||
CONFIG_CACHE_L2X0=y
|
||||
CONFIG_CC_DISABLE_WARN_MAYBE_UNINITIALIZED=y
|
||||
CONFIG_CC_HAS_KASAN_GENERIC=y
|
||||
# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_CHR_DEV_SCH=y
|
||||
CONFIG_CLKDEV_LOOKUP=y
|
||||
CONFIG_CLKSRC_MMIO=y
|
||||
CONFIG_CLONE_BACKWARDS=y
|
||||
CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
|
||||
CONFIG_CMDLINE_FROM_BOOTLOADER=y
|
||||
CONFIG_COMMON_CLK=y
|
||||
CONFIG_COMMON_CLK_MEDIATEK=y
|
||||
# CONFIG_COMMON_CLK_MT2701 is not set
|
||||
# CONFIG_COMMON_CLK_MT7622 is not set
|
||||
CONFIG_COMMON_CLK_MT7629=y
|
||||
CONFIG_COMMON_CLK_MT7629_ETHSYS=y
|
||||
CONFIG_COMMON_CLK_MT7629_HIFSYS=y
|
||||
# CONFIG_COMMON_CLK_MT8135 is not set
|
||||
# CONFIG_COMMON_CLK_MT8173 is not set
|
||||
CONFIG_COMMON_CLK_MT8516=y
|
||||
# CONFIG_COMMON_CLK_MT8516_AUDSYS is not set
|
||||
CONFIG_COMPAT_32BIT_TIME=y
|
||||
CONFIG_CPU_32v6K=y
|
||||
CONFIG_CPU_32v7=y
|
||||
CONFIG_CPU_ABRT_EV7=y
|
||||
CONFIG_CPU_CACHE_V7=y
|
||||
CONFIG_CPU_CACHE_VIPT=y
|
||||
CONFIG_CPU_COPY_V6=y
|
||||
CONFIG_CPU_CP15=y
|
||||
CONFIG_CPU_CP15_MMU=y
|
||||
CONFIG_CPU_HAS_ASID=y
|
||||
CONFIG_CPU_IDLE=y
|
||||
CONFIG_CPU_IDLE_GOV_MENU=y
|
||||
CONFIG_CPU_PABRT_V7=y
|
||||
CONFIG_CPU_PM=y
|
||||
CONFIG_CPU_RMAP=y
|
||||
CONFIG_CPU_SPECTRE=y
|
||||
CONFIG_CPU_THUMB_CAPABLE=y
|
||||
CONFIG_CPU_TLB_V7=y
|
||||
CONFIG_CPU_V7=y
|
||||
CONFIG_CRC16=y
|
||||
CONFIG_CRYPTO_ACOMP2=y
|
||||
CONFIG_CRYPTO_AEAD=y
|
||||
CONFIG_CRYPTO_AEAD2=y
|
||||
CONFIG_CRYPTO_DEFLATE=y
|
||||
CONFIG_CRYPTO_HASH2=y
|
||||
CONFIG_CRYPTO_HASH_INFO=y
|
||||
CONFIG_CRYPTO_LZO=y
|
||||
CONFIG_CRYPTO_MANAGER=y
|
||||
CONFIG_CRYPTO_MANAGER2=y
|
||||
CONFIG_CRYPTO_NULL2=y
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CRYPTO_ZSTD=y
|
||||
CONFIG_DCACHE_WORD_ACCESS=y
|
||||
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
|
||||
CONFIG_DEBUG_MISC=y
|
||||
CONFIG_DEFAULT_HOSTNAME="(mt7629)"
|
||||
CONFIG_DMA_REMAP=y
|
||||
CONFIG_DTC=y
|
||||
CONFIG_EDAC_ATOMIC_SCRUB=y
|
||||
CONFIG_EDAC_SUPPORT=y
|
||||
CONFIG_EINT_MTK=y
|
||||
CONFIG_FIXED_PHY=y
|
||||
CONFIG_FIX_EARLYCON_MEM=y
|
||||
CONFIG_FW_LOADER_PAGED_BUF=y
|
||||
CONFIG_GENERIC_ALLOCATOR=y
|
||||
CONFIG_GENERIC_ARCH_TOPOLOGY=y
|
||||
CONFIG_GENERIC_BUG=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
|
||||
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
||||
CONFIG_GENERIC_EARLY_IOREMAP=y
|
||||
CONFIG_GENERIC_IDLE_POLL_SETUP=y
|
||||
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
|
||||
CONFIG_GENERIC_IRQ_MIGRATION=y
|
||||
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
|
||||
CONFIG_GENERIC_IRQ_SHOW=y
|
||||
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
|
||||
CONFIG_GENERIC_MSI_IRQ=y
|
||||
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
|
||||
CONFIG_GENERIC_PCI_IOMAP=y
|
||||
CONFIG_GENERIC_PHY=y
|
||||
CONFIG_GENERIC_PINCONF=y
|
||||
CONFIG_GENERIC_PINCTRL_GROUPS=y
|
||||
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
|
||||
CONFIG_GENERIC_SCHED_CLOCK=y
|
||||
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
||||
CONFIG_GENERIC_STRNCPY_FROM_USER=y
|
||||
CONFIG_GENERIC_STRNLEN_USER=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_HANDLE_DOMAIN_IRQ=y
|
||||
# CONFIG_HARDENED_USERCOPY is not set
|
||||
CONFIG_HARDEN_BRANCH_PREDICTOR=y
|
||||
CONFIG_HARDIRQS_SW_RESEND=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT_MAP=y
|
||||
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
|
||||
CONFIG_HAVE_ARCH_BITREVERSE=y
|
||||
CONFIG_HAVE_ARCH_JUMP_LABEL=y
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
CONFIG_HAVE_ARCH_PFN_VALID=y
|
||||
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
|
||||
CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
|
||||
CONFIG_HAVE_ARCH_TRACEHOOK=y
|
||||
CONFIG_HAVE_ARM_ARCH_TIMER=y
|
||||
CONFIG_HAVE_ARM_SMCCC=y
|
||||
CONFIG_HAVE_CLK=y
|
||||
CONFIG_HAVE_CLK_PREPARE=y
|
||||
CONFIG_HAVE_CONTEXT_TRACKING=y
|
||||
CONFIG_HAVE_COPY_THREAD_TLS=y
|
||||
CONFIG_HAVE_C_RECORDMCOUNT=y
|
||||
CONFIG_HAVE_DEBUG_KMEMLEAK=y
|
||||
CONFIG_HAVE_DMA_CONTIGUOUS=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
|
||||
CONFIG_HAVE_EBPF_JIT=y
|
||||
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_HAVE_HW_BREAKPOINT=y
|
||||
CONFIG_HAVE_IDE=y
|
||||
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
|
||||
CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
|
||||
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
|
||||
CONFIG_HAVE_NET_DSA=y
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
CONFIG_HAVE_OPTPROBES=y
|
||||
CONFIG_HAVE_PCI=y
|
||||
CONFIG_HAVE_PERF_EVENTS=y
|
||||
CONFIG_HAVE_PERF_REGS=y
|
||||
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
|
||||
CONFIG_HAVE_PROC_CPU=y
|
||||
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
|
||||
CONFIG_HAVE_RSEQ=y
|
||||
CONFIG_HAVE_SCHED_AVG_IRQ=y
|
||||
CONFIG_HAVE_SMP=y
|
||||
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
|
||||
CONFIG_HAVE_UID16=y
|
||||
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
|
||||
CONFIG_HOTPLUG_CPU=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_HW_RANDOM_MTK=y
|
||||
CONFIG_HZ_FIXED=0
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
CONFIG_IO_URING=y
|
||||
CONFIG_IRQCHIP=y
|
||||
CONFIG_IRQ_DOMAIN=y
|
||||
CONFIG_IRQ_DOMAIN_HIERARCHY=y
|
||||
CONFIG_IRQ_FORCED_THREADING=y
|
||||
CONFIG_IRQ_TIME_ACCOUNTING=y
|
||||
CONFIG_IRQ_WORK=y
|
||||
# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set
|
||||
# CONFIG_LEDS_UBNT_LEDBAR is not set
|
||||
CONFIG_LIBFDT=y
|
||||
CONFIG_LOCK_DEBUGGING_SUPPORT=y
|
||||
CONFIG_LOCK_SPIN_ON_OWNER=y
|
||||
CONFIG_LZO_COMPRESS=y
|
||||
CONFIG_LZO_DECOMPRESS=y
|
||||
# CONFIG_MACH_MT2701 is not set
|
||||
# CONFIG_MACH_MT6589 is not set
|
||||
# CONFIG_MACH_MT6592 is not set
|
||||
# CONFIG_MACH_MT7623 is not set
|
||||
CONFIG_MACH_MT7629=y
|
||||
# CONFIG_MACH_MT8127 is not set
|
||||
# CONFIG_MACH_MT8135 is not set
|
||||
CONFIG_MDIO_BUS=y
|
||||
CONFIG_MDIO_DEVICE=y
|
||||
CONFIG_MEDIATEK_WATCHDOG=y
|
||||
CONFIG_MEMFD_CREATE=y
|
||||
CONFIG_MFD_SYSCON=y
|
||||
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
|
||||
CONFIG_MIGRATION=y
|
||||
CONFIG_MODULES_TREE_LOOKUP=y
|
||||
CONFIG_MODULES_USE_ELF_REL=y
|
||||
CONFIG_MT753X_GSW=y
|
||||
CONFIG_MTD_NAND_CORE=y
|
||||
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
|
||||
CONFIG_MTD_NAND_MTK=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_MTD_SPI_NAND=y
|
||||
CONFIG_MTD_SPI_NOR=y
|
||||
CONFIG_MTD_SPLIT_FIRMWARE=y
|
||||
CONFIG_MTD_SPLIT_FIT_FW=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_MTD_UBI_BEB_LIMIT=20
|
||||
CONFIG_MTD_UBI_BLOCK=y
|
||||
CONFIG_MTD_UBI_WL_THRESHOLD=4096
|
||||
# CONFIG_MTK_CMDQ is not set
|
||||
# CONFIG_MTK_EFUSE is not set
|
||||
CONFIG_MTK_INFRACFG=y
|
||||
# CONFIG_MTK_PMIC_WRAP is not set
|
||||
CONFIG_MTK_SCPSYS=y
|
||||
CONFIG_MTK_TIMER=y
|
||||
CONFIG_MUTEX_SPIN_ON_OWNER=y
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_NETFILTER=y
|
||||
CONFIG_NET_FLOW_LIMIT=y
|
||||
CONFIG_NET_MEDIATEK_SOC=y
|
||||
CONFIG_NET_VENDOR_MEDIATEK=y
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NO_HZ_COMMON=y
|
||||
CONFIG_NO_HZ_IDLE=y
|
||||
CONFIG_NR_CPUS=2
|
||||
CONFIG_NVMEM=y
|
||||
CONFIG_NVMEM_SYSFS=y
|
||||
CONFIG_OF=y
|
||||
CONFIG_OF_ADDRESS=y
|
||||
CONFIG_OF_EARLY_FLATTREE=y
|
||||
CONFIG_OF_FLATTREE=y
|
||||
CONFIG_OF_GPIO=y
|
||||
CONFIG_OF_IRQ=y
|
||||
CONFIG_OF_KOBJ=y
|
||||
CONFIG_OF_MDIO=y
|
||||
CONFIG_OF_NET=y
|
||||
CONFIG_OLD_SIGACTION=y
|
||||
CONFIG_OLD_SIGSUSPEND3=y
|
||||
CONFIG_OUTER_CACHE=y
|
||||
CONFIG_OUTER_CACHE_SYNC=y
|
||||
CONFIG_PADATA=y
|
||||
CONFIG_PAGE_OFFSET=0xC0000000
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIEAER=y
|
||||
CONFIG_PCIEPORTBUS=y
|
||||
CONFIG_PCIE_MEDIATEK=y
|
||||
CONFIG_PCIE_PME=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
CONFIG_PCI_DOMAINS_GENERIC=y
|
||||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCI_MSI_IRQ_DOMAIN=y
|
||||
CONFIG_PERF_USE_VMALLOC=y
|
||||
CONFIG_PGTABLE_LEVELS=2
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHYLINK=y
|
||||
CONFIG_PHY_MTK_TPHY=y
|
||||
# CONFIG_PHY_MTK_UFS is not set
|
||||
# CONFIG_PHY_MTK_XSPHY is not set
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_MT7629=y
|
||||
CONFIG_PINCTRL_MTK_MOORE=y
|
||||
CONFIG_PM=y
|
||||
CONFIG_PM_CLK=y
|
||||
CONFIG_PM_GENERIC_DOMAINS=y
|
||||
CONFIG_PM_GENERIC_DOMAINS_OF=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_MEDIATEK=y
|
||||
# CONFIG_PWM_MTK_DISP is not set
|
||||
CONFIG_PWM_SYSFS=y
|
||||
CONFIG_RAS=y
|
||||
CONFIG_RATIONAL=y
|
||||
CONFIG_RCU_NEED_SEGCBLIST=y
|
||||
CONFIG_RCU_STALL_COMMON=y
|
||||
CONFIG_REFCOUNT_FULL=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_REGMAP_MMIO=y
|
||||
CONFIG_RESET_CONTROLLER=y
|
||||
CONFIG_RFS_ACCEL=y
|
||||
CONFIG_RPS=y
|
||||
# CONFIG_RTL8367S_GSW is not set
|
||||
CONFIG_RWSEM_SPIN_ON_OWNER=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_SERIAL_8250_FSL=y
|
||||
CONFIG_SERIAL_8250_MT6577=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=3
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=3
|
||||
CONFIG_SERIAL_MCTRL_GPIO=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_SGL_ALLOC=y
|
||||
CONFIG_SG_POOL=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_SMP_ON_UP=y
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_MASTER=y
|
||||
CONFIG_SPI_MEM=y
|
||||
CONFIG_SPI_MT65XX=y
|
||||
# CONFIG_SPI_MTK_NOR is not set
|
||||
CONFIG_SPI_MTK_SNFI=y
|
||||
CONFIG_SRCU=y
|
||||
CONFIG_STACKTRACE=y
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SWCONFIG=y
|
||||
CONFIG_SWPHY=y
|
||||
CONFIG_SWP_EMULATE=y
|
||||
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
CONFIG_TREE_RCU=y
|
||||
CONFIG_TREE_SRCU=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
|
||||
CONFIG_UBIFS_FS_LZO=y
|
||||
CONFIG_UBIFS_FS_ZLIB=y
|
||||
CONFIG_UBIFS_FS_ZSTD=y
|
||||
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
|
||||
CONFIG_UNWINDER_ARM=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_COMMON=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_MTK=y
|
||||
# CONFIG_USB_XHCI_PLATFORM is not set
|
||||
CONFIG_USE_OF=y
|
||||
# CONFIG_VFP is not set
|
||||
CONFIG_WATCHDOG_CORE=y
|
||||
# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
|
||||
CONFIG_XPS=y
|
||||
CONFIG_XXHASH=y
|
||||
CONFIG_XZ_DEC_ARM=y
|
||||
CONFIG_XZ_DEC_BCJ=y
|
||||
CONFIG_ZBOOT_ROM_BSS=0
|
||||
CONFIG_ZBOOT_ROM_TEXT=0
|
||||
CONFIG_ZLIB_DEFLATE=y
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_ZSTD_COMPRESS=y
|
||||
CONFIG_ZSTD_DECOMPRESS=y
|
||||
@ -1,16 +0,0 @@
|
||||
#
|
||||
# Copyright (C) 2009 OpenWrt.org
|
||||
#
|
||||
|
||||
ARCH:=arm
|
||||
SUBTARGET:=mt7629
|
||||
BOARDNAME:=MT7629
|
||||
CPU_TYPE:=cortex-a7
|
||||
FEATURES:=squashfs nand ramdisk
|
||||
|
||||
KERNELNAME:=Image dtbs
|
||||
|
||||
define Target/Description
|
||||
Build firmware images for MediaTek mt7629 ARM based boards.
|
||||
endef
|
||||
|
||||
@ -1,258 +0,0 @@
|
||||
--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
|
||||
+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
|
||||
@@ -53,6 +53,13 @@
|
||||
};
|
||||
};
|
||||
|
||||
+ gsw: gsw@0 {
|
||||
+ compatible = "mediatek,mt753x";
|
||||
+ mediatek,ethsys = <ðsys>;
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ };
|
||||
+
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
@@ -146,6 +153,36 @@
|
||||
};
|
||||
};
|
||||
|
||||
+&gsw {
|
||||
+ mediatek,mdio = <&mdio>;
|
||||
+ mediatek,portmap = "wllll";
|
||||
+ mediatek,mdio_master_pinmux = <0>;
|
||||
+ reset-gpios = <&pio 54 0>;
|
||||
+ interrupt-parent = <&pio>;
|
||||
+ interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ port5: port@5 {
|
||||
+ compatible = "mediatek,mt753x-port";
|
||||
+ reg = <5>;
|
||||
+ phy-mode = "rgmii";
|
||||
+ fixed-link {
|
||||
+ speed = <1000>;
|
||||
+ full-duplex;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ port6: port@6 {
|
||||
+ compatible = "mediatek,mt753x-port";
|
||||
+ reg = <6>;
|
||||
+ phy-mode = "sgmii";
|
||||
+ fixed-link {
|
||||
+ speed = <2500>;
|
||||
+ full-duplex;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
|
||||
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
|
||||
@@ -1,7 +1,6 @@
|
||||
/*
|
||||
- * Copyright (c) 2017 MediaTek Inc.
|
||||
- * Author: Ming Huang <ming.huang@mediatek.com>
|
||||
- * Sean Wang <sean.wang@mediatek.com>
|
||||
+ * Copyright (c) 2018 MediaTek Inc.
|
||||
+ * Author: Ryder Lee <ryder.lee@mediatek.com>
|
||||
*
|
||||
* SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
||||
*/
|
||||
@@ -14,7 +13,7 @@
|
||||
#include "mt6380.dtsi"
|
||||
|
||||
/ {
|
||||
- model = "MediaTek MT7622 RFB1 board";
|
||||
+ model = "MT7622_MT7531 RFB";
|
||||
compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
|
||||
|
||||
aliases {
|
||||
@@ -23,7 +22,7 @@
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
- bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512";
|
||||
+ bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
|
||||
};
|
||||
|
||||
cpus {
|
||||
@@ -40,23 +39,36 @@
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
- poll-interval = <100>;
|
||||
|
||||
factory {
|
||||
label = "factory";
|
||||
linux,code = <BTN_0>;
|
||||
- gpios = <&pio 0 0>;
|
||||
+ gpios = <&pio 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
wps {
|
||||
label = "wps";
|
||||
linux,code = <KEY_WPS_BUTTON>;
|
||||
- gpios = <&pio 102 0>;
|
||||
+ gpios = <&pio 102 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+
|
||||
+ green {
|
||||
+ label = "bpi-r64:pio:green";
|
||||
+ gpios = <&pio 89 GPIO_ACTIVE_HIGH>;
|
||||
+ };
|
||||
+
|
||||
+ red {
|
||||
+ label = "bpi-r64:pio:red";
|
||||
+ gpios = <&pio 88 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
- reg = <0 0x40000000 0 0x20000000>;
|
||||
+ reg = <0 0x40000000 0 0x40000000>;
|
||||
};
|
||||
|
||||
reg_1p8v: regulator-1p8v {
|
||||
@@ -101,23 +113,82 @@
|
||||
};
|
||||
|
||||
ð {
|
||||
- pinctrl-names = "default";
|
||||
- pinctrl-0 = <ð_pins>;
|
||||
status = "okay";
|
||||
+ gmac0: mac@0 {
|
||||
+ compatible = "mediatek,eth-mac";
|
||||
+ reg = <0>;
|
||||
+ phy-mode = "2500base-x";
|
||||
+
|
||||
+ fixed-link {
|
||||
+ speed = <2500>;
|
||||
+ full-duplex;
|
||||
+ pause;
|
||||
+ };
|
||||
+ };
|
||||
|
||||
gmac1: mac@1 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <1>;
|
||||
- phy-handle = <&phy5>;
|
||||
+ phy-mode = "rgmii";
|
||||
+
|
||||
+ fixed-link {
|
||||
+ speed = <1000>;
|
||||
+ full-duplex;
|
||||
+ pause;
|
||||
+ };
|
||||
};
|
||||
|
||||
- mdio-bus {
|
||||
+ mdio: mdio-bus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
- phy5: ethernet-phy@5 {
|
||||
- reg = <5>;
|
||||
- phy-mode = "sgmii";
|
||||
+ switch@0 {
|
||||
+ compatible = "mediatek,mt7531";
|
||||
+ reg = <0>;
|
||||
+ reset-gpios = <&pio 54 0>;
|
||||
+
|
||||
+ ports {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ port@0 {
|
||||
+ reg = <0>;
|
||||
+ label = "lan1";
|
||||
+ };
|
||||
+
|
||||
+ port@1 {
|
||||
+ reg = <1>;
|
||||
+ label = "lan2";
|
||||
+ };
|
||||
+
|
||||
+ port@2 {
|
||||
+ reg = <2>;
|
||||
+ label = "lan3";
|
||||
+ };
|
||||
+
|
||||
+ port@3 {
|
||||
+ reg = <3>;
|
||||
+ label = "lan4";
|
||||
+ };
|
||||
+
|
||||
+ port@4 {
|
||||
+ reg = <4>;
|
||||
+ label = "wan";
|
||||
+ };
|
||||
+
|
||||
+ port@6 {
|
||||
+ reg = <6>;
|
||||
+ label = "cpu";
|
||||
+ ethernet = <&gmac0>;
|
||||
+ phy-mode = "2500base-x";
|
||||
+
|
||||
+ fixed-link {
|
||||
+ speed = <2500>;
|
||||
+ full-duplex;
|
||||
+ pause;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -185,15 +256,28 @@
|
||||
|
||||
&pcie {
|
||||
pinctrl-names = "default";
|
||||
- pinctrl-0 = <&pcie0_pins>;
|
||||
+ pinctrl-0 = <&pcie0_pins>, <&pcie1_pins>;
|
||||
status = "okay";
|
||||
|
||||
pcie@0,0 {
|
||||
status = "okay";
|
||||
};
|
||||
+
|
||||
+ pcie@1,0 {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
};
|
||||
|
||||
&pio {
|
||||
+ /* Attention: GPIO 90 is used to switch between PCIe@1,0 and
|
||||
+ * SATA functions. i.e. output-high: PCIe, output-low: SATA
|
||||
+ */
|
||||
+ asm_sel {
|
||||
+ gpio-hog;
|
||||
+ gpios = <90 GPIO_ACTIVE_HIGH>;
|
||||
+ output-high;
|
||||
+ };
|
||||
+
|
||||
/* eMMC is shared pin with parallel NAND */
|
||||
emmc_pins_default: emmc-pins-default {
|
||||
mux {
|
||||
@@ -460,11 +544,11 @@
|
||||
};
|
||||
|
||||
&sata {
|
||||
- status = "okay";
|
||||
+ status = "disable";
|
||||
};
|
||||
|
||||
&sata_phy {
|
||||
- status = "okay";
|
||||
+ status = "disable";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
@ -1,67 +0,0 @@
|
||||
--- a/arch/arm/boot/dts/mt7629-rfb.dts
|
||||
+++ b/arch/arm/boot/dts/mt7629-rfb.dts
|
||||
@@ -18,6 +18,7 @@
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
+ bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8";
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
@@ -36,6 +37,13 @@
|
||||
};
|
||||
};
|
||||
|
||||
+ gsw: gsw@0 {
|
||||
+ compatible = "mediatek,mt753x";
|
||||
+ mediatek,ethsys = <ðsys>;
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ };
|
||||
+
|
||||
memory@40000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x40000000 0x10000000>;
|
||||
@@ -69,6 +77,7 @@
|
||||
gmac0: mac@0 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <0>;
|
||||
+ mtd-mac-address = <&factory 0x2a>;
|
||||
phy-mode = "2500base-x";
|
||||
fixed-link {
|
||||
speed = <2500>;
|
||||
@@ -80,6 +89,7 @@
|
||||
gmac1: mac@1 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <1>;
|
||||
+ mtd-mac-address = <&factory 0x24>;
|
||||
phy-mode = "gmii";
|
||||
phy-handle = <&phy0>;
|
||||
};
|
||||
@@ -93,6 +103,26 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
+
|
||||
+&gsw {
|
||||
+ mediatek,mdio = <&mdio>;
|
||||
+ mediatek,portmap = "llllw";
|
||||
+ mediatek,mdio_master_pinmux = <0>;
|
||||
+ reset-gpios = <&pio 28 0>;
|
||||
+ interrupt-parent = <&pio>;
|
||||
+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ port6: port@6 {
|
||||
+ compatible = "mediatek,mt753x-port";
|
||||
+ reg = <6>;
|
||||
+ phy-mode = "sgmii";
|
||||
+ fixed-link {
|
||||
+ speed = <2500>;
|
||||
+ full-duplex;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
|
||||
&i2c {
|
||||
pinctrl-names = "default";
|
||||
@ -1,10 +0,0 @@
|
||||
--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
|
||||
@@ -19,6 +19,7 @@
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial2:115200n8";
|
||||
+ bootargs = "console=ttyS2,115200n8";
|
||||
};
|
||||
|
||||
cpus {
|
||||
@ -1,11 +0,0 @@
|
||||
--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
|
||||
+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
|
||||
@@ -22,7 +22,7 @@
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
- bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512";
|
||||
+ bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
|
||||
};
|
||||
|
||||
cpus {
|
||||
@ -1,13 +0,0 @@
|
||||
--- a/arch/arm/boot/dts/mt7629-rfb.dts
|
||||
+++ b/arch/arm/boot/dts/mt7629-rfb.dts
|
||||
@@ -163,8 +163,9 @@
|
||||
};
|
||||
|
||||
partition@b0000 {
|
||||
- label = "kernel";
|
||||
+ label = "firmware";
|
||||
reg = <0xb0000 0xb50000>;
|
||||
+ compatible = "denx,fit";
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -1,23 +0,0 @@
|
||||
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
|
||||
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
|
||||
@@ -567,6 +567,20 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
+ snand: snfi@1100d000 {
|
||||
+ compatible = "mediatek,mt7622-snand";
|
||||
+ reg = <0 0x1100d000 0 0x1000>, <0 0x1100e000 0 0x1000>;
|
||||
+ reg-names = "nfi", "ecc";
|
||||
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ clocks = <&pericfg CLK_PERI_NFI_PD>,
|
||||
+ <&pericfg CLK_PERI_SNFI_PD>,
|
||||
+ <&pericfg CLK_PERI_NFIECC_PD>;
|
||||
+ clock-names = "nfi_clk", "pad_clk", "ecc_clk";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
nor_flash: spi@11014000 {
|
||||
compatible = "mediatek,mt7622-nor",
|
||||
"mediatek,mt8173-nor";
|
||||
@ -1,31 +0,0 @@
|
||||
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
|
||||
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
|
||||
@@ -167,25 +167,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
- cooling-maps {
|
||||
- map0 {
|
||||
- trip = <&cpu_passive>;
|
||||
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
- };
|
||||
-
|
||||
- map1 {
|
||||
- trip = <&cpu_active>;
|
||||
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
- };
|
||||
-
|
||||
- map2 {
|
||||
- trip = <&cpu_hot>;
|
||||
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
- };
|
||||
- };
|
||||
};
|
||||
};
|
||||
|
||||
--
|
||||
2.29.2
|
||||
|
||||
@ -1,387 +0,0 @@
|
||||
From 004eb24e939b5b31f828333f37fb5cb2a877d6f2 Mon Sep 17 00:00:00 2001
|
||||
From: Kristian Evensen <kristian.evensen@gmail.com>
|
||||
Date: Sun, 17 Jun 2018 14:41:47 +0200
|
||||
Subject: [PATCH] arm: dts: Add Unielec U7623 DTS
|
||||
|
||||
---
|
||||
arch/arm/boot/dts/Makefile | 1 +
|
||||
.../dts/mt7623a-unielec-u7623-02-emmc-512m.dts | 18 +
|
||||
.../boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi | 366 +++++++++++++++++++++
|
||||
3 files changed, 385 insertions(+)
|
||||
create mode 100644 arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc-512m.dts
|
||||
create mode 100644 arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi
|
||||
|
||||
--- a/arch/arm/boot/dts/Makefile
|
||||
+++ b/arch/arm/boot/dts/Makefile
|
||||
@@ -1272,6 +1272,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
|
||||
mt7623a-rfb-nand.dtb \
|
||||
mt7623n-rfb-emmc.dtb \
|
||||
mt7623n-bananapi-bpi-r2.dtb \
|
||||
+ mt7623a-unielec-u7623-02-emmc-512m.dtb \
|
||||
mt7629-rfb.dtb \
|
||||
mt8127-moose.dtb \
|
||||
mt8135-evbp1.dtb
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc-512m.dts
|
||||
@@ -0,0 +1,18 @@
|
||||
+/*
|
||||
+ * Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
|
||||
+ *
|
||||
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+#include "mt7623a-unielec-u7623-02-emmc.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "UniElec U7623-02 eMMC (512M RAM)";
|
||||
+ compatible = "unielec,u7623-02-emmc-512m", "unielec,u7623-02-emmc", "mediatek,mt7623";
|
||||
+
|
||||
+ memory@80000000 {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0 0x80000000 0 0x20000000>;
|
||||
+ };
|
||||
+};
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi
|
||||
@@ -0,0 +1,340 @@
|
||||
+/*
|
||||
+ * Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
|
||||
+ *
|
||||
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+ */
|
||||
+
|
||||
+#include <dt-bindings/input/input.h>
|
||||
+#include "mt7623.dtsi"
|
||||
+#include "mt6323.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ compatible = "unielec,u7623-02-emmc", "mediatek,mt7623";
|
||||
+
|
||||
+ aliases {
|
||||
+ serial2 = &uart2;
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
+ bootargs = "root=/dev/mmcblk0p2 rootfstype=squashfs,f2fs console=ttyS0,115200 blkdevparts=mmcblk0:3M@6M(recovery),256M@9M(root)";
|
||||
+ stdout-path = "serial2:115200n8";
|
||||
+ };
|
||||
+
|
||||
+ cpus {
|
||||
+ cpu@0 {
|
||||
+ proc-supply = <&mt6323_vproc_reg>;
|
||||
+ };
|
||||
+
|
||||
+ cpu@1 {
|
||||
+ proc-supply = <&mt6323_vproc_reg>;
|
||||
+ };
|
||||
+
|
||||
+ cpu@2 {
|
||||
+ proc-supply = <&mt6323_vproc_reg>;
|
||||
+ };
|
||||
+
|
||||
+ cpu@3 {
|
||||
+ proc-supply = <&mt6323_vproc_reg>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ reg_1p8v: regulator-1p8v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "fixed-1.8V";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ reg_3p3v: regulator-3p3v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "fixed-3.3V";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ reg_5v: regulator-5v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "fixed-5V";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ gpio-keys {
|
||||
+ compatible = "gpio-keys";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&key_pins_a>;
|
||||
+
|
||||
+ factory {
|
||||
+ label = "factory";
|
||||
+ linux,code = <KEY_RESTART>;
|
||||
+ gpios = <&pio 256 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&led_pins_unielec>;
|
||||
+
|
||||
+ led3 {
|
||||
+ label = "u7623-01:green:led3";
|
||||
+ gpios = <&pio 14 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+
|
||||
+ led4 {
|
||||
+ label = "u7623-01:green:led4";
|
||||
+ gpios = <&pio 15 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&crypto {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+ð {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ gmac0: mac@0 {
|
||||
+ compatible = "mediatek,eth-mac";
|
||||
+ reg = <0>;
|
||||
+ phy-mode = "trgmii";
|
||||
+
|
||||
+ fixed-link {
|
||||
+ speed = <1000>;
|
||||
+ full-duplex;
|
||||
+ pause;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ mdio: mdio-bus {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ mt7530: switch@0 {
|
||||
+ compatible = "mediatek,mt7530";
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&mt7530 {
|
||||
+ compatible = "mediatek,mt7530";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ reg = <0>;
|
||||
+ pinctrl-names = "default";
|
||||
+ mediatek,mcm;
|
||||
+ resets = <ðsys 2>;
|
||||
+ reset-names = "mcm";
|
||||
+ core-supply = <&mt6323_vpa_reg>;
|
||||
+ io-supply = <&mt6323_vemc3v3_reg>;
|
||||
+
|
||||
+ dsa,mii-bus = <&mdio>;
|
||||
+
|
||||
+ ports {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ reg = <0>;
|
||||
+
|
||||
+ port@0 {
|
||||
+ reg = <0>;
|
||||
+ label = "lan0";
|
||||
+ cpu = <&cpu_port0>;
|
||||
+ };
|
||||
+
|
||||
+ port@1 {
|
||||
+ reg = <1>;
|
||||
+ label = "lan1";
|
||||
+ cpu = <&cpu_port0>;
|
||||
+ };
|
||||
+
|
||||
+ port@2 {
|
||||
+ reg = <2>;
|
||||
+ label = "lan2";
|
||||
+ cpu = <&cpu_port0>;
|
||||
+ };
|
||||
+
|
||||
+ port@3 {
|
||||
+ reg = <3>;
|
||||
+ label = "lan3";
|
||||
+ cpu = <&cpu_port0>;
|
||||
+ };
|
||||
+
|
||||
+ port@4 {
|
||||
+ reg = <4>;
|
||||
+ label = "wan";
|
||||
+ cpu = <&cpu_port0>;
|
||||
+ };
|
||||
+
|
||||
+ cpu_port0: port@6 {
|
||||
+ reg = <6>;
|
||||
+ label = "cpu";
|
||||
+ ethernet = <&gmac0>;
|
||||
+ phy-mode = "trgmii";
|
||||
+
|
||||
+ fixed-link {
|
||||
+ speed = <1000>;
|
||||
+ full-duplex;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&mmc0 {
|
||||
+ pinctrl-names = "default", "state_uhs";
|
||||
+ pinctrl-0 = <&mmc0_pins_default>;
|
||||
+ pinctrl-1 = <&mmc0_pins_uhs>;
|
||||
+ status = "okay";
|
||||
+ bus-width = <8>;
|
||||
+ max-frequency = <50000000>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ vmmc-supply = <®_3p3v>;
|
||||
+ vqmmc-supply = <®_1p8v>;
|
||||
+ non-removable;
|
||||
+};
|
||||
+
|
||||
+&pio {
|
||||
+ key_pins_a: keys-alt {
|
||||
+ pins-keys {
|
||||
+ pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
|
||||
+ <MT7623_PIN_257_GPIO257_FUNC_GPIO257>;
|
||||
+ input-enable;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ led_pins_unielec: leds-unielec {
|
||||
+ pins-leds {
|
||||
+ pinmux = <MT7623_PIN_14_GPIO14_FUNC_GPIO14>,
|
||||
+ <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ mmc0_pins_default: mmc0default {
|
||||
+ pins_cmd_dat {
|
||||
+ pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
|
||||
+ <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
|
||||
+ <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
|
||||
+ <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
|
||||
+ <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
|
||||
+ <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
|
||||
+ <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
|
||||
+ <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
|
||||
+ <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
|
||||
+ input-enable;
|
||||
+ bias-pull-up;
|
||||
+ };
|
||||
+
|
||||
+ pins_clk {
|
||||
+ pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
|
||||
+ bias-pull-down;
|
||||
+ };
|
||||
+
|
||||
+ pins_rst {
|
||||
+ pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
|
||||
+ bias-pull-up;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ mmc0_pins_uhs: mmc0 {
|
||||
+ pins_cmd_dat {
|
||||
+ pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
|
||||
+ <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
|
||||
+ <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
|
||||
+ <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
|
||||
+ <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
|
||||
+ <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
|
||||
+ <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
|
||||
+ <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
|
||||
+ <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
|
||||
+ input-enable;
|
||||
+ drive-strength = <MTK_DRIVE_2mA>;
|
||||
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
|
||||
+ };
|
||||
+
|
||||
+ pins_clk {
|
||||
+ pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
|
||||
+ drive-strength = <MTK_DRIVE_2mA>;
|
||||
+ bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
|
||||
+ };
|
||||
+
|
||||
+ pins_rst {
|
||||
+ pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
|
||||
+ bias-pull-up;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pcie_default: pcie_pin_default {
|
||||
+ pins_cmd_dat {
|
||||
+ pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
|
||||
+ <MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
|
||||
+ bias-disable;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pwm {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pwm_pins_a>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pwrap {
|
||||
+ mt6323 {
|
||||
+ mt6323led: led {
|
||||
+ compatible = "mediatek,mt6323-led";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ led@0 {
|
||||
+ reg = <0>;
|
||||
+ label = "led0";
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&uart2_pins_b>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb1 {
|
||||
+ vusb33-supply = <®_3p3v>;
|
||||
+ vbus-supply = <®_3p3v>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u3phy1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u3phy2 {
|
||||
+ status = "okay";
|
||||
+ mediatek,phy-switch = <&hifsys>;
|
||||
+};
|
||||
+
|
||||
+&pcie {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pcie_default>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ pcie@1,0 {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ pcie@2,0 {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pcie1_phy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
@ -1,97 +0,0 @@
|
||||
From c813fbe806257c574240770ef716fbee19f7dbfa Mon Sep 17 00:00:00 2001
|
||||
From: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
|
||||
Date: Thu, 6 Jun 2019 16:29:04 +0800
|
||||
Subject: [PATCH] spi: spi-mem: Mediatek: Add SPI Nand support for MT7629
|
||||
|
||||
Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
|
||||
---
|
||||
arch/arm/boot/dts/mt7629-rfb.dts | 45 ++++++++++++++++++++++++++++++++
|
||||
arch/arm/boot/dts/mt7629.dtsi | 22 ++++++++++++++++
|
||||
3 files changed, 79 insertions(+)
|
||||
|
||||
--- a/arch/arm/boot/dts/mt7629.dtsi
|
||||
+++ b/arch/arm/boot/dts/mt7629.dtsi
|
||||
@@ -258,6 +258,28 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
+ bch: ecc@1100e000 {
|
||||
+ compatible = "mediatek,mt7622-ecc";
|
||||
+ reg = <0x1100e000 0x1000>;
|
||||
+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ clocks = <&pericfg CLK_PERI_NFIECC_PD>;
|
||||
+ clock-names = "nfiecc_clk";
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ snfi: spi@1100d000 {
|
||||
+ compatible = "mediatek,mt7629-snfi";
|
||||
+ reg = <0x1100d000 0x1000>;
|
||||
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ clocks = <&pericfg CLK_PERI_NFI_PD>,
|
||||
+ <&pericfg CLK_PERI_SNFI_PD>;
|
||||
+ clock-names = "nfi_clk", "spi_clk";
|
||||
+ ecc-engine = <&bch>;
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
spi: spi@1100a000 {
|
||||
compatible = "mediatek,mt7629-spi",
|
||||
"mediatek,mt7622-spi";
|
||||
--- a/arch/arm/boot/dts/mt7629-rfb.dts
|
||||
+++ b/arch/arm/boot/dts/mt7629-rfb.dts
|
||||
@@ -276,6 +276,52 @@
|
||||
};
|
||||
};
|
||||
|
||||
+&bch {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&snfi {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&serial_nand_pins>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ spi_nand@0 {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <1>;
|
||||
+ compatible = "spi-nand";
|
||||
+ spi-max-frequency = <104000000>;
|
||||
+ reg = <0>;
|
||||
+
|
||||
+ partitions {
|
||||
+ compatible = "fixed-partitions";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <1>;
|
||||
+
|
||||
+ partition@0 {
|
||||
+ label = "Bootloader";
|
||||
+ reg = <0x00000 0x0100000>;
|
||||
+ read-only;
|
||||
+ };
|
||||
+
|
||||
+ partition@100000 {
|
||||
+ label = "Config";
|
||||
+ reg = <0x100000 0x0040000>;
|
||||
+ };
|
||||
+
|
||||
+ partition@140000 {
|
||||
+ label = "factory";
|
||||
+ reg = <0x140000 0x0080000>;
|
||||
+ };
|
||||
+
|
||||
+ partition@1c0000 {
|
||||
+ label = "firmware";
|
||||
+ reg = <0x1c0000 0x1000000>;
|
||||
+ };
|
||||
+
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&spi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi_pins>;
|
||||
@ -1,96 +0,0 @@
|
||||
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
|
||||
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
|
||||
@@ -555,6 +555,19 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
+ snfi: spi@1100d000 {
|
||||
+ compatible = "mediatek,mt7622-snfi";
|
||||
+ reg = <0 0x1100d000 0 0x1000>;
|
||||
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ clocks = <&pericfg CLK_PERI_NFI_PD>,
|
||||
+ <&pericfg CLK_PERI_SNFI_PD>;
|
||||
+ clock-names = "nfi_clk", "spi_clk";
|
||||
+ ecc-engine = <&bch>;
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
nor_flash: spi@11014000 {
|
||||
compatible = "mediatek,mt7622-nor",
|
||||
"mediatek,mt8173-nor";
|
||||
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
|
||||
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
|
||||
@@ -99,7 +99,7 @@
|
||||
};
|
||||
|
||||
&bch {
|
||||
- status = "disabled";
|
||||
+ status = "okay";
|
||||
};
|
||||
|
||||
&btif {
|
||||
@@ -551,6 +551,62 @@
|
||||
status = "disable";
|
||||
};
|
||||
|
||||
+&snfi {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&serial_nand_pins>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ spi_nand@0 {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <1>;
|
||||
+ compatible = "spi-nand";
|
||||
+ spi-max-frequency = <104000000>;
|
||||
+ reg = <0>;
|
||||
+
|
||||
+ partitions {
|
||||
+ compatible = "fixed-partitions";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <1>;
|
||||
+
|
||||
+ partition@0 {
|
||||
+ label = "Preloader";
|
||||
+ reg = <0x00000 0x0080000>;
|
||||
+ read-only;
|
||||
+ };
|
||||
+
|
||||
+ partition@80000 {
|
||||
+ label = "ATF";
|
||||
+ reg = <0x80000 0x0040000>;
|
||||
+ };
|
||||
+
|
||||
+ partition@c0000 {
|
||||
+ label = "Bootloader";
|
||||
+ reg = <0xc0000 0x0080000>;
|
||||
+ };
|
||||
+
|
||||
+ partition@140000 {
|
||||
+ label = "Config";
|
||||
+ reg = <0x140000 0x0080000>;
|
||||
+ };
|
||||
+
|
||||
+ partition@1c0000 {
|
||||
+ label = "Factory";
|
||||
+ reg = <0x1c0000 0x0040000>;
|
||||
+ };
|
||||
+
|
||||
+ partition@200000 {
|
||||
+ label = "firmware";
|
||||
+ reg = <0x200000 0x2000000>;
|
||||
+ };
|
||||
+
|
||||
+ partition@2200000 {
|
||||
+ label = "User_data";
|
||||
+ reg = <0x2200000 0x4000000>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&spi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spic0_pins>;
|
||||
@ -1,40 +0,0 @@
|
||||
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
|
||||
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
|
||||
@@ -717,6 +717,17 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
+ wmac: wmac@18000000 {
|
||||
+ compatible = "mediatek,mt7622-wmac";
|
||||
+ reg = <0 0x18000000 0 0x100000>;
|
||||
+ interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_LOW>;
|
||||
+
|
||||
+ mediatek,infracfg = <&infracfg>;
|
||||
+ status = "disabled";
|
||||
+
|
||||
+ power-domains = <&scpsys MT7622_POWER_DOMAIN_WB>;
|
||||
+ };
|
||||
+
|
||||
ssusbsys: ssusbsys@1a000000 {
|
||||
compatible = "mediatek,mt7622-ssusbsys",
|
||||
"syscon";
|
||||
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
|
||||
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
|
||||
@@ -589,7 +589,7 @@
|
||||
reg = <0x140000 0x0080000>;
|
||||
};
|
||||
|
||||
- partition@1c0000 {
|
||||
+ factory: partition@1c0000 {
|
||||
label = "Factory";
|
||||
reg = <0x1c0000 0x0040000>;
|
||||
};
|
||||
@@ -646,3 +646,8 @@
|
||||
pinctrl-0 = <&watchdog_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
+
|
||||
+&wmac {
|
||||
+ mediatek,mtd-eeprom = <&factory 0x0000>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
@ -1,23 +0,0 @@
|
||||
--- a/arch/arm/boot/dts/mt7623.dtsi
|
||||
+++ b/arch/arm/boot/dts/mt7623.dtsi
|
||||
@@ -1047,17 +1047,14 @@
|
||||
};
|
||||
|
||||
crypto: crypto@1b240000 {
|
||||
- compatible = "mediatek,eip97-crypto";
|
||||
+ compatible = "inside-secure,safexcel-eip97";
|
||||
reg = <0 0x1b240000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_LOW>,
|
||||
<GIC_SPI 83 IRQ_TYPE_LEVEL_LOW>,
|
||||
<GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>,
|
||||
- <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>,
|
||||
- <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ interrupt-names = "ring0", "ring1", "ring2", "ring3";
|
||||
clocks = <ðsys CLK_ETHSYS_CRYPTO>;
|
||||
- clock-names = "cryp";
|
||||
- power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
|
||||
- status = "disabled";
|
||||
};
|
||||
|
||||
bdpsys: syscon@1c000000 {
|
||||
@ -1,71 +0,0 @@
|
||||
From: Landen Chao <landen.chao@mediatek.com>
|
||||
Subject: [PATCH net-next 6/6] arm64: dts: mt7622: add mt7531 dsa to
|
||||
bananapi-bpi-r64 board
|
||||
Date: Tue, 10 Dec 2019 16:14:42 +0800
|
||||
|
||||
Add mt7531 dsa to bananapi-bpi-r64 board for 5 giga Ethernet ports support.
|
||||
|
||||
Signed-off-by: Landen Chao <landen.chao@mediatek.com>
|
||||
---
|
||||
.../dts/mediatek/mt7622-bananapi-bpi-r64.dts | 50 +++++++++++++++++++
|
||||
1 file changed, 50 insertions(+)
|
||||
|
||||
--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
|
||||
+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
|
||||
@@ -150,6 +150,56 @@
|
||||
mdio: mdio-bus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
+
|
||||
+ switch@0 {
|
||||
+ compatible = "mediatek,mt7531";
|
||||
+ reg = <0>;
|
||||
+ reset-gpios = <&pio 54 0>;
|
||||
+
|
||||
+ ports {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ port@0 {
|
||||
+ reg = <0>;
|
||||
+ label = "wan";
|
||||
+ };
|
||||
+
|
||||
+ port@1 {
|
||||
+ reg = <1>;
|
||||
+ label = "lan0";
|
||||
+ };
|
||||
+
|
||||
+ port@2 {
|
||||
+ reg = <2>;
|
||||
+ label = "lan1";
|
||||
+ };
|
||||
+
|
||||
+ port@3 {
|
||||
+ reg = <3>;
|
||||
+ label = "lan2";
|
||||
+ };
|
||||
+
|
||||
+ port@4 {
|
||||
+ reg = <4>;
|
||||
+ label = "lan3";
|
||||
+ };
|
||||
+
|
||||
+ port@6 {
|
||||
+ reg = <6>;
|
||||
+ label = "cpu";
|
||||
+ ethernet = <&gmac0>;
|
||||
+ phy-mode = "2500base-x";
|
||||
+
|
||||
+ fixed-link {
|
||||
+ speed = <2500>;
|
||||
+ full-duplex;
|
||||
+ pause;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
};
|
||||
};
|
||||
|
||||
@ -1,417 +0,0 @@
|
||||
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|
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X-Patchwork-Id: 11574785
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|
||||
Transport; Thu, 28 May 2020 14:18:51 +0800
|
||||
From: <chuanjia.liu@mediatek.com>
|
||||
To: <robh+dt@kernel.org>, <ryder.lee@mediatek.com>, <matthias.bgg@gmail.com>
|
||||
Subject: [PATCH v2 3/4] arm64: dts: mediatek: Split PCIe node for
|
||||
MT2712/MT7622
|
||||
Date: Thu, 28 May 2020 14:16:47 +0800
|
||||
Message-ID: <20200528061648.32078-4-chuanjia.liu@mediatek.com>
|
||||
X-Mailer: git-send-email 2.18.0
|
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In-Reply-To: <20200528061648.32078-1-chuanjia.liu@mediatek.com>
|
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References: <20200528061648.32078-1-chuanjia.liu@mediatek.com>
|
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MIME-Version: 1.0
|
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|
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Cc: devicetree@vger.kernel.org, lorenzo.pieralisi@arm.com,
|
||||
srv_heupstream@mediatek.com, "chuanjia.liu" <Chuanjia.Liu@mediatek.com>,
|
||||
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
|
||||
jianjun.wang@mediatek.com, linux-mediatek@lists.infradead.org,
|
||||
yong.wu@mediatek.com, bhelgaas@google.com,
|
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|
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linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org
|
||||
|
||||
From: "chuanjia.liu" <Chuanjia.Liu@mediatek.com>
|
||||
|
||||
There are two independent PCIe controllers in MT2712/MT7622 platform,
|
||||
and each of them should contain an independent MSI domain.
|
||||
|
||||
In current architecture, MSI domain will be inherited from the root
|
||||
bridge, and all of the devices will share the same MSI domain.
|
||||
Hence that, the PCIe devices will not work properly if the irq number
|
||||
which required is more than 32.
|
||||
|
||||
Split the PCIe node for MT2712/MT7622 platform to fix MSI issue and
|
||||
comply with the hardware design.
|
||||
|
||||
Signed-off-by: chuanjia.liu <Chuanjia.Liu@mediatek.com>
|
||||
---
|
||||
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 75 +++++++++++--------
|
||||
.../dts/mediatek/mt7622-bananapi-bpi-r64.dts | 16 ++--
|
||||
arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 6 +-
|
||||
arch/arm64/boot/dts/mediatek/mt7622.dtsi | 68 +++++++++++------
|
||||
4 files changed, 96 insertions(+), 69 deletions(-)
|
||||
|
||||
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
|
||||
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
|
||||
@@ -791,60 +791,73 @@
|
||||
};
|
||||
};
|
||||
|
||||
- pcie: pcie@11700000 {
|
||||
+ pcie1: pcie@112ff000 {
|
||||
compatible = "mediatek,mt2712-pcie";
|
||||
device_type = "pci";
|
||||
- reg = <0 0x11700000 0 0x1000>,
|
||||
- <0 0x112ff000 0 0x1000>;
|
||||
- reg-names = "port0", "port1";
|
||||
+ reg = <0 0x112ff000 0 0x1000>;
|
||||
+ reg-names = "port1";
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
- interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
|
||||
- <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
||||
- clocks = <&topckgen CLK_TOP_PE2_MAC_P0_SEL>,
|
||||
- <&topckgen CLK_TOP_PE2_MAC_P1_SEL>,
|
||||
- <&pericfg CLK_PERI_PCIE0>,
|
||||
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ interrupt-names = "pcie_irq";
|
||||
+ clocks = <&topckgen CLK_TOP_PE2_MAC_P1_SEL>,
|
||||
<&pericfg CLK_PERI_PCIE1>;
|
||||
- clock-names = "sys_ck0", "sys_ck1", "ahb_ck0", "ahb_ck1";
|
||||
- phys = <&u3port0 PHY_TYPE_PCIE>, <&u3port1 PHY_TYPE_PCIE>;
|
||||
- phy-names = "pcie-phy0", "pcie-phy1";
|
||||
+ clock-names = "sys_ck1", "ahb_ck1";
|
||||
+ phys = <&u3port1 PHY_TYPE_PCIE>;
|
||||
+ phy-names = "pcie-phy1";
|
||||
bus-range = <0x00 0xff>;
|
||||
- ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x10000000>;
|
||||
+ ranges = <0x82000000 0 0x11400000 0x0 0x11400000 0 0x300000>;
|
||||
+ status = "disabled";
|
||||
|
||||
- pcie0: pcie@0,0 {
|
||||
- device_type = "pci";
|
||||
- status = "disabled";
|
||||
- reg = <0x0000 0 0 0 0>;
|
||||
+ slot1: pcie@1,0 {
|
||||
+ reg = <0x0800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
- interrupt-map = <0 0 0 1 &pcie_intc0 0>,
|
||||
- <0 0 0 2 &pcie_intc0 1>,
|
||||
- <0 0 0 3 &pcie_intc0 2>,
|
||||
- <0 0 0 4 &pcie_intc0 3>;
|
||||
- pcie_intc0: interrupt-controller {
|
||||
+ interrupt-map = <0 0 0 1 &pcie_intc1 0>,
|
||||
+ <0 0 0 2 &pcie_intc1 1>,
|
||||
+ <0 0 0 3 &pcie_intc1 2>,
|
||||
+ <0 0 0 4 &pcie_intc1 3>;
|
||||
+ pcie_intc1: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
+ };
|
||||
|
||||
- pcie1: pcie@1,0 {
|
||||
- device_type = "pci";
|
||||
- status = "disabled";
|
||||
- reg = <0x0800 0 0 0 0>;
|
||||
+ pcie0: pcie@11700000 {
|
||||
+ compatible = "mediatek,mt2712-pcie";
|
||||
+ device_type = "pci";
|
||||
+ reg = <0 0x11700000 0 0x1000>;
|
||||
+ reg-names = "port0";
|
||||
+ #address-cells = <3>;
|
||||
+ #size-cells = <2>;
|
||||
+ interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ interrupt-names = "pcie_irq";
|
||||
+ clocks = <&topckgen CLK_TOP_PE2_MAC_P0_SEL>,
|
||||
+ <&pericfg CLK_PERI_PCIE0>;
|
||||
+ clock-names = "sys_ck0", "ahb_ck0";
|
||||
+ phys = <&u3port0 PHY_TYPE_PCIE>;
|
||||
+ phy-names = "pcie-phy0";
|
||||
+ bus-range = <0x00 0xff>;
|
||||
+ ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x10000000>;
|
||||
+ status = "disabled";
|
||||
+
|
||||
+ slot0: pcie@0,0 {
|
||||
+ reg = <0x0000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
- interrupt-map = <0 0 0 1 &pcie_intc1 0>,
|
||||
- <0 0 0 2 &pcie_intc1 1>,
|
||||
- <0 0 0 3 &pcie_intc1 2>,
|
||||
- <0 0 0 4 &pcie_intc1 3>;
|
||||
- pcie_intc1: interrupt-controller {
|
||||
+ interrupt-map = <0 0 0 1 &pcie_intc0 0>,
|
||||
+ <0 0 0 2 &pcie_intc0 1>,
|
||||
+ <0 0 0 3 &pcie_intc0 2>,
|
||||
+ <0 0 0 4 &pcie_intc0 3>;
|
||||
+ pcie_intc0: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
|
||||
+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
|
||||
@@ -294,18 +294,16 @@
|
||||
};
|
||||
};
|
||||
|
||||
-&pcie {
|
||||
+&pcie0 {
|
||||
pinctrl-names = "default";
|
||||
- pinctrl-0 = <&pcie0_pins>, <&pcie1_pins>;
|
||||
+ pinctrl-0 = <&pcie0_pins>;
|
||||
status = "okay";
|
||||
+};
|
||||
|
||||
- pcie@0,0 {
|
||||
- status = "okay";
|
||||
- };
|
||||
-
|
||||
- pcie@1,0 {
|
||||
- status = "okay";
|
||||
- };
|
||||
+&pcie1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pcie1_pins>;
|
||||
+ status = "okay";
|
||||
};
|
||||
|
||||
&pio {
|
||||
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
|
||||
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
|
||||
@@ -795,45 +795,41 @@
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
- pcie: pcie@1a140000 {
|
||||
+ pciecfg: pciecfg@1a140000 {
|
||||
+ compatible = "mediatek,mt7622-pciecfg", "syscon";
|
||||
+ reg = <0 0x1a140000 0 0x1000>;
|
||||
+ };
|
||||
+
|
||||
+ pcie0: pcie@1a143000 {
|
||||
compatible = "mediatek,mt7622-pcie";
|
||||
device_type = "pci";
|
||||
- reg = <0 0x1a140000 0 0x1000>,
|
||||
- <0 0x1a143000 0 0x1000>,
|
||||
- <0 0x1a145000 0 0x1000>;
|
||||
- reg-names = "subsys", "port0", "port1";
|
||||
+ reg = <0 0x1a143000 0 0x1000>;
|
||||
+ reg-names = "port0";
|
||||
+ mediatek,pcie-cfg = <&pciecfg>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
- interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_LOW>,
|
||||
- <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ interrupt-names = "pcie_irq";
|
||||
clocks = <&pciesys CLK_PCIE_P0_MAC_EN>,
|
||||
- <&pciesys CLK_PCIE_P1_MAC_EN>,
|
||||
- <&pciesys CLK_PCIE_P0_AHB_EN>,
|
||||
<&pciesys CLK_PCIE_P0_AHB_EN>,
|
||||
<&pciesys CLK_PCIE_P0_AUX_EN>,
|
||||
- <&pciesys CLK_PCIE_P1_AUX_EN>,
|
||||
<&pciesys CLK_PCIE_P0_AXI_EN>,
|
||||
- <&pciesys CLK_PCIE_P1_AXI_EN>,
|
||||
<&pciesys CLK_PCIE_P0_OBFF_EN>,
|
||||
- <&pciesys CLK_PCIE_P1_OBFF_EN>,
|
||||
- <&pciesys CLK_PCIE_P0_PIPE_EN>,
|
||||
- <&pciesys CLK_PCIE_P1_PIPE_EN>;
|
||||
- clock-names = "sys_ck0", "sys_ck1", "ahb_ck0", "ahb_ck1",
|
||||
- "aux_ck0", "aux_ck1", "axi_ck0", "axi_ck1",
|
||||
- "obff_ck0", "obff_ck1", "pipe_ck0", "pipe_ck1";
|
||||
+ <&pciesys CLK_PCIE_P0_PIPE_EN>;
|
||||
+ clock-names = "sys_ck0", "ahb_ck0", "aux_ck0",
|
||||
+ "axi_ck0", "obff_ck0", "pipe_ck0";
|
||||
+
|
||||
power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
- ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x10000000>;
|
||||
+ ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x8000000>;
|
||||
status = "disabled";
|
||||
|
||||
- pcie0: pcie@0,0 {
|
||||
+ slot0: pcie@0,0 {
|
||||
reg = <0x0000 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges;
|
||||
- status = "disabled";
|
||||
-
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie_intc0 0>,
|
||||
<0 0 0 2 &pcie_intc0 1>,
|
||||
@@ -845,15 +841,39 @@
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
};
|
||||
+ };
|
||||
|
||||
- pcie1: pcie@1,0 {
|
||||
+ pcie1: pcie@1a145000 {
|
||||
+ compatible = "mediatek,mt7622-pcie";
|
||||
+ device_type = "pci";
|
||||
+ reg = <0 0x1a145000 0 0x1000>;
|
||||
+ reg-names = "port1";
|
||||
+ mediatek,pcie-cfg = <&pciecfg>;
|
||||
+ #address-cells = <3>;
|
||||
+ #size-cells = <2>;
|
||||
+ interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ interrupt-names = "pcie_irq";
|
||||
+ clocks = <&pciesys CLK_PCIE_P1_MAC_EN>,
|
||||
+ /* designer has connect RC1 with p0_ahb clock */
|
||||
+ <&pciesys CLK_PCIE_P0_AHB_EN>,
|
||||
+ <&pciesys CLK_PCIE_P1_AUX_EN>,
|
||||
+ <&pciesys CLK_PCIE_P1_AXI_EN>,
|
||||
+ <&pciesys CLK_PCIE_P1_OBFF_EN>,
|
||||
+ <&pciesys CLK_PCIE_P1_PIPE_EN>;
|
||||
+ clock-names = "sys_ck1", "ahb_ck1", "aux_ck1",
|
||||
+ "axi_ck1", "obff_ck1", "pipe_ck1";
|
||||
+
|
||||
+ power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>;
|
||||
+ bus-range = <0x00 0xff>;
|
||||
+ ranges = <0x82000000 0 0x28000000 0x0 0x28000000 0 0x8000000>;
|
||||
+ status = "disabled";
|
||||
+
|
||||
+ slot1: pcie@1,0 {
|
||||
reg = <0x0800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges;
|
||||
- status = "disabled";
|
||||
-
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie_intc1 0>,
|
||||
<0 0 0 2 &pcie_intc1 1>,
|
||||
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
|
||||
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
|
||||
@@ -254,18 +254,16 @@
|
||||
};
|
||||
};
|
||||
|
||||
-&pcie {
|
||||
+&pcie0 {
|
||||
pinctrl-names = "default";
|
||||
- pinctrl-0 = <&pcie0_pins>, <&pcie1_pins>;
|
||||
+ pinctrl-0 = <&pcie0_pins>;
|
||||
status = "okay";
|
||||
+};
|
||||
|
||||
- pcie@0,0 {
|
||||
- status = "okay";
|
||||
- };
|
||||
-
|
||||
- pcie@1,0 {
|
||||
- status = "okay";
|
||||
- };
|
||||
+&pcie1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pcie1_pins>;
|
||||
+ status = "okay";
|
||||
};
|
||||
|
||||
&pio {
|
||||
@ -1,203 +0,0 @@
|
||||
From patchwork Thu May 28 06:16:48 2020
|
||||
Content-Type: text/plain; charset="utf-8"
|
||||
MIME-Version: 1.0
|
||||
Content-Transfer-Encoding: 7bit
|
||||
X-Patchwork-Submitter: Chuanjia Liu <chuanjia.liu@mediatek.com>
|
||||
X-Patchwork-Id: 11574797
|
||||
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To: <robh+dt@kernel.org>, <ryder.lee@mediatek.com>, <matthias.bgg@gmail.com>
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Subject: [PATCH v2 4/4] ARM: dts: mediatek: Update mt7629 PCIe node
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Date: Thu, 28 May 2020 14:16:48 +0800
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Cc: devicetree@vger.kernel.org, lorenzo.pieralisi@arm.com,
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srv_heupstream@mediatek.com, "chuanjia.liu" <Chuanjia.Liu@mediatek.com>,
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From: "chuanjia.liu" <Chuanjia.Liu@mediatek.com>
|
||||
|
||||
Remove unused property and add pciecfg node.
|
||||
|
||||
Signed-off-by: chuanjia.liu <Chuanjia.Liu@mediatek.com>
|
||||
---
|
||||
arch/arm/boot/dts/mt7629-rfb.dts | 3 ++-
|
||||
arch/arm/boot/dts/mt7629.dtsi | 23 +++++++++++++----------
|
||||
2 files changed, 15 insertions(+), 11 deletions(-)
|
||||
|
||||
--- a/arch/arm/boot/dts/mt7629-rfb.dts
|
||||
+++ b/arch/arm/boot/dts/mt7629-rfb.dts
|
||||
@@ -171,9 +171,10 @@
|
||||
};
|
||||
};
|
||||
|
||||
-&pcie {
|
||||
+&pcie1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie_pins>;
|
||||
+ status = "okay";
|
||||
};
|
||||
|
||||
&pciephy1 {
|
||||
--- a/arch/arm/boot/dts/mt7629.dtsi
|
||||
+++ b/arch/arm/boot/dts/mt7629.dtsi
|
||||
@@ -368,16 +368,21 @@
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
- pcie: pcie@1a140000 {
|
||||
+ pciecfg: pciecfg@1a140000 {
|
||||
+ compatible = "mediatek,mt7629-pciecfg", "syscon";
|
||||
+ reg = <0x1a140000 0x1000>;
|
||||
+ };
|
||||
+
|
||||
+ pcie1: pcie@1a145000 {
|
||||
compatible = "mediatek,mt7629-pcie";
|
||||
device_type = "pci";
|
||||
- reg = <0x1a140000 0x1000>,
|
||||
- <0x1a145000 0x1000>;
|
||||
- reg-names = "subsys","port1";
|
||||
+ reg = <0x1a145000 0x1000>;
|
||||
+ reg-names = "port1";
|
||||
+ mediatek,pcie-cfg = <&pciecfg>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
- interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_LOW>,
|
||||
- <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ interrupt-names = "pcie_irq";
|
||||
clocks = <&pciesys CLK_PCIE_P1_MAC_EN>,
|
||||
<&pciesys CLK_PCIE_P0_AHB_EN>,
|
||||
<&pciesys CLK_PCIE_P1_AUX_EN>,
|
||||
@@ -398,21 +403,19 @@
|
||||
power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
ranges = <0x82000000 0 0x20000000 0x20000000 0 0x10000000>;
|
||||
+ status = "disabled";
|
||||
|
||||
- pcie1: pcie@1,0 {
|
||||
- device_type = "pci";
|
||||
+ slot1: pcie@1,0 {
|
||||
reg = <0x0800 0 0 0 0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
ranges;
|
||||
- num-lanes = <1>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie_intc1 0>,
|
||||
<0 0 0 2 &pcie_intc1 1>,
|
||||
<0 0 0 3 &pcie_intc1 2>,
|
||||
<0 0 0 4 &pcie_intc1 3>;
|
||||
-
|
||||
pcie_intc1: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
@ -1,23 +0,0 @@
|
||||
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
|
||||
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
|
||||
@@ -589,17 +589,17 @@
|
||||
|
||||
factory: partition@1c0000 {
|
||||
label = "Factory";
|
||||
- reg = <0x1c0000 0x0040000>;
|
||||
+ reg = <0x1c0000 0x0100000>;
|
||||
};
|
||||
|
||||
partition@200000 {
|
||||
label = "firmware";
|
||||
- reg = <0x200000 0x2000000>;
|
||||
+ reg = <0x2c0000 0x2000000>;
|
||||
};
|
||||
|
||||
partition@2200000 {
|
||||
label = "User_data";
|
||||
- reg = <0x2200000 0x4000000>;
|
||||
+ reg = <0x22c0000 0x4000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
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