mirror of
https://github.com/hanwckf/immortalwrt-mt798x.git
synced 2025-01-10 11:09:57 +08:00
ipq806x: use mdio dedicated driver
Enable kernel config flag Convert all dts to use the new mdio driver Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
This commit is contained in:
parent
92da53b12d
commit
0d8098548e
@ -29,12 +29,17 @@
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};
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soc {
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mdio0: mdio {
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compatible = "virtual,mdio-gpio";
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mdio0: mdio@37000000 {
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#address-cells = <1>;
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#size-cells = <0>;
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gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
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<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
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compatible = "qcom,ipq8064-mdio", "syscon";
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reg = <0x37000000 0x200000>;
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resets = <&gcc GMAC_CORE1_RESET>;
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reset-names = "stmmaceth";
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clocks = <&gcc GMAC_CORE1_CLK>;
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clock-names = "stmmaceth";
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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@ -94,7 +99,7 @@
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mdio0_pins: mdio0_pins {
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mux {
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pins = "gpio0", "gpio1";
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function = "gpio";
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function = "mdio";
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drive-strength = <8>;
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bias-disable;
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};
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@ -73,7 +73,7 @@
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mdio0_pins: mdio0_pins {
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mux {
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pins = "gpio0", "gpio1";
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function = "gpio";
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function = "mdio";
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drive-strength = <8>;
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bias-disable;
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};
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@ -184,11 +184,17 @@
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};
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};
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mdio0: mdio {
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compatible = "virtual,mdio-gpio";
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mdio0: mdio@37000000 {
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#address-cells = <1>;
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#size-cells = <0>;
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gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
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compatible = "qcom,ipq8064-mdio", "syscon";
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reg = <0x37000000 0x200000>;
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resets = <&gcc GMAC_CORE1_RESET>;
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reset-names = "stmmaceth";
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clocks = <&gcc GMAC_CORE1_CLK>;
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clock-names = "stmmaceth";
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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@ -94,7 +94,7 @@
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mdio0_pins: mdio0_pins {
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mux {
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pins = "gpio0", "gpio1";
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function = "gpio";
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function = "mdio";
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drive-strength = <8>;
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bias-disable;
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};
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@ -338,12 +338,17 @@
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force_gen1 = <1>;
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};
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mdio0: mdio {
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compatible = "virtual,mdio-gpio";
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mdio0: mdio@37000000 {
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#address-cells = <1>;
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#size-cells = <0>;
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gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
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<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
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compatible = "qcom,ipq8064-mdio", "syscon";
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reg = <0x37000000 0x200000>;
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resets = <&gcc GMAC_CORE1_RESET>;
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reset-names = "stmmaceth";
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clocks = <&gcc GMAC_CORE1_CLK>;
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clock-names = "stmmaceth";
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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@ -69,7 +69,7 @@
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mdio0_pins: mdio0_pins {
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mux {
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pins = "gpio0", "gpio1";
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function = "gpio";
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function = "mdio";
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drive-strength = <8>;
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bias-disable;
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};
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@ -261,12 +261,17 @@
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};
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};
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mdio0: mdio {
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compatible = "virtual,mdio-gpio";
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mdio0: mdio@37000000 {
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#address-cells = <1>;
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#size-cells = <0>;
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gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
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<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
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compatible = "qcom,ipq8064-mdio", "syscon";
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reg = <0x37000000 0x200000>;
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resets = <&gcc GMAC_CORE1_RESET>;
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reset-names = "stmmaceth";
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clocks = <&gcc GMAC_CORE1_CLK>;
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clock-names = "stmmaceth";
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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@ -43,7 +43,7 @@
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mdio0_pins: mdio0_pins {
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mux {
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pins = "gpio0", "gpio1";
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function = "gpio";
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function = "mdio";
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drive-strength = <8>;
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bias-disable;
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};
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@ -143,11 +143,16 @@
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status = "okay";
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};
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mdio0: mdio {
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compatible = "virtual,mdio-gpio";
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mdio0: mdio@37000000 {
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#address-cells = <1>;
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#size-cells = <0>;
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gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
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compatible = "qcom,ipq8064-mdio", "syscon";
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reg = <0x37000000 0x200000>;
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resets = <&gcc GMAC_CORE1_RESET>;
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reset-names = "stmmaceth";
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clocks = <&gcc GMAC_CORE1_CLK>;
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clock-names = "stmmaceth";
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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@ -69,7 +69,7 @@
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mdio0_pins: mdio0_pins {
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mux {
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pins = "gpio0", "gpio1";
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function = "gpio";
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function = "mdio";
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drive-strength = <8>;
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bias-disable;
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};
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@ -277,12 +277,17 @@
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};
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};
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mdio0: mdio {
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compatible = "virtual,mdio-gpio";
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mdio0: mdio@37000000 {
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#address-cells = <1>;
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#size-cells = <0>;
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gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
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<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
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compatible = "qcom,ipq8064-mdio", "syscon";
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reg = <0x37000000 0x200000>;
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resets = <&gcc GMAC_CORE1_RESET>;
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reset-names = "stmmaceth";
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clocks = <&gcc GMAC_CORE1_CLK>;
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clock-names = "stmmaceth";
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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@ -70,7 +70,7 @@
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mdio0_pins: mdio0_pins {
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mux {
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pins = "gpio0", "gpio1";
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function = "gpio";
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function = "mdio";
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drive-strength = <8>;
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bias-disable;
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};
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@ -222,12 +222,17 @@
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};
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};
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mdio0: mdio {
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compatible = "virtual,mdio-gpio";
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mdio0: mdio@37000000 {
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#address-cells = <1>;
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#size-cells = <0>;
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gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
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<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
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compatible = "qcom,ipq8064-mdio", "syscon";
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reg = <0x37000000 0x200000>;
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resets = <&gcc GMAC_CORE1_RESET>;
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reset-names = "stmmaceth";
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clocks = <&gcc GMAC_CORE1_CLK>;
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clock-names = "stmmaceth";
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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@ -74,7 +74,7 @@
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mdio0_pins: mdio0_pins {
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mux {
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pins = "gpio0", "gpio1";
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function = "gpio";
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function = "mdio";
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drive-strength = <8>;
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bias-disable;
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};
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@ -256,12 +256,17 @@
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};
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};
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mdio0: mdio {
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compatible = "virtual,mdio-gpio";
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mdio0: mdio@37000000 {
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#address-cells = <1>;
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#size-cells = <0>;
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gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
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<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
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compatible = "qcom,ipq8064-mdio", "syscon";
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reg = <0x37000000 0x200000>;
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resets = <&gcc GMAC_CORE1_RESET>;
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reset-names = "stmmaceth";
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clocks = <&gcc GMAC_CORE1_CLK>;
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clock-names = "stmmaceth";
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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@ -92,7 +92,7 @@
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mdio0_pins: mdio0_pins {
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mux {
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pins = "gpio0", "gpio1";
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function = "gpio";
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function = "mdio";
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drive-strength = <8>;
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bias-disable;
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};
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@ -250,12 +250,17 @@
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force_gen1 = <1>;
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};
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mdio0: mdio {
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compatible = "virtual,mdio-gpio";
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mdio0: mdio@37000000 {
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#address-cells = <1>;
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#size-cells = <0>;
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gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
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<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
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compatible = "qcom,ipq8064-mdio", "syscon";
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reg = <0x37000000 0x200000>;
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resets = <&gcc GMAC_CORE1_RESET>;
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reset-names = "stmmaceth";
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clocks = <&gcc GMAC_CORE1_CLK>;
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clock-names = "stmmaceth";
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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@ -36,12 +36,17 @@
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};
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soc {
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mdio0: mdio {
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compatible = "virtual,mdio-gpio";
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mdio0: mdio@37000000 {
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#address-cells = <1>;
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#size-cells = <0>;
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gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
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<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
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compatible = "qcom,ipq8064-mdio", "syscon";
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reg = <0x37000000 0x200000>;
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resets = <&gcc GMAC_CORE1_RESET>;
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reset-names = "stmmaceth";
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clocks = <&gcc GMAC_CORE1_CLK>;
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clock-names = "stmmaceth";
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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@ -399,7 +404,7 @@
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mdio0_pins: mdio0_pins {
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mux {
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pins = "gpio0", "gpio1";
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function = "gpio";
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function = "mdio";
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drive-strength = <8>;
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bias-disable;
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};
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@ -217,18 +217,20 @@
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};
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};
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mdio0: mdio {
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mdio0: mdio@37000000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "virtual,mdio-gpio";
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compatible = "qcom,ipq8064-mdio", "syscon";
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reg = <0x37000000 0x200000>;
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resets = <&gcc GMAC_CORE1_RESET>;
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reset-names = "stmmaceth";
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clocks = <&gcc GMAC_CORE1_CLK>;
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clock-names = "stmmaceth";
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
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<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
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ethernet-phy@0 {
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reg = <0>;
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qca,ar8327-initvals = <
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@ -531,7 +533,7 @@
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mdio0_pins: mdio0_pins {
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mux {
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pins = "gpio0", "gpio1";
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function = "gpio";
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function = "mdio";
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drive-strength = <8>;
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bias-disable;
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};
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@ -70,12 +70,17 @@
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};
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};
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mdio {
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compatible = "virtual,mdio-gpio";
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mdio0: mdio@37000000 {
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#address-cells = <1>;
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#size-cells = <0>;
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gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
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<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
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compatible = "qcom,ipq8064-mdio", "syscon";
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reg = <0x37000000 0x200000>;
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resets = <&gcc GMAC_CORE1_RESET>;
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reset-names = "stmmaceth";
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clocks = <&gcc GMAC_CORE1_CLK>;
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clock-names = "stmmaceth";
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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@ -466,7 +471,7 @@
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mdio0_pins: mdio0_pins {
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mux {
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pins = "gpio0", "gpio1";
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function = "gpio";
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function = "mdio";
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drive-strength = <8>;
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bias-disable;
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};
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@ -70,7 +70,7 @@
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mdio0_pins: mdio0_pins {
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mux {
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pins = "gpio0", "gpio1";
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function = "gpio";
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function = "mdio";
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drive-strength = <8>;
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bias-disable;
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};
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@ -218,12 +218,17 @@
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force_gen1 = <1>;
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};
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mdio0: mdio {
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compatible = "virtual,mdio-gpio";
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mdio0: mdio@37000000 {
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#address-cells = <1>;
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#size-cells = <0>;
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gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
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<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
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compatible = "qcom,ipq8064-mdio", "syscon";
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reg = <0x37000000 0x200000>;
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resets = <&gcc GMAC_CORE1_RESET>;
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reset-names = "stmmaceth";
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clocks = <&gcc GMAC_CORE1_CLK>;
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clock-names = "stmmaceth";
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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@ -100,7 +100,7 @@
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mdio0_pins: mdio0_pins {
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mux {
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pins = "gpio0", "gpio1";
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function = "gpio";
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function = "mdio";
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drive-strength = <8>;
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bias-disable;
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};
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@ -351,16 +351,20 @@
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};
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};
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mdio0: mdio {
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compatible = "virtual,mdio-gpio";
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mdio0: mdio@37000000 {
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#address-cells = <1>;
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#size-cells = <0>;
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gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
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<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
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compatible = "qcom,ipq8064-mdio", "syscon";
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reg = <0x37000000 0x200000>;
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resets = <&gcc GMAC_CORE1_RESET>;
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reset-names = "stmmaceth";
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clocks = <&gcc GMAC_CORE1_CLK>;
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clock-names = "stmmaceth";
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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phy0: ethernet-phy@0 {
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reg = <0>;
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qca,ar8327-initvals = <
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