mirror of
https://github.com/hanwckf/immortalwrt-mt798x.git
synced 2025-01-10 11:09:57 +08:00
upgrade to 3.0-rc6 and optimize for armv5te again
SVN-Revision: 27592
This commit is contained in:
parent
1e395abc80
commit
0321740a62
@ -10,10 +10,10 @@ ARCH:=arm
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BOARD:=orion
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BOARD:=orion
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BOARDNAME:=Marvell Orion
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BOARDNAME:=Marvell Orion
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SUBTARGETS:=generic harddisk
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SUBTARGETS:=generic harddisk
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CFLAGS=-Os -pipe -march=armv5t -mtune=xscale -fno-caller-saves
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CFLAGS=-Os -pipe -march=armv5te -mtune=xscale -fno-caller-saves
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MAINTAINER:=Imre Kaloz <kaloz@openwrt.org>
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MAINTAINER:=Imre Kaloz <kaloz@openwrt.org>
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LINUX_VERSION:=2.6.37.6
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LINUX_VERSION:=3.0-rc6
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include $(INCLUDE_DIR)/target.mk
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include $(INCLUDE_DIR)/target.mk
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@ -119,11 +119,11 @@ void __init dt2_pci_preinit(void)
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if (gpio_request(pin, "PCI IntA") == 0) {
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if (gpio_request(pin, "PCI IntA") == 0) {
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if (gpio_direction_input(pin) == 0) {
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if (gpio_direction_input(pin) == 0) {
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irq = gpio_to_irq(pin);
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irq = gpio_to_irq(pin);
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set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
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printk (KERN_INFO "PCI IntA IRQ: %d\n", irq);
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printk (KERN_INFO "PCI IntA IRQ: %d\n", irq);
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} else {
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} else {
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printk(KERN_ERR "dt2_pci_preinit failed to "
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printk(KERN_ERR "dt2_pci_preinit failed to "
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"set_irq_type pin %d\n", pin);
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"irq_set_irq_type pin %d\n", pin);
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gpio_free(pin);
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gpio_free(pin);
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}
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}
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} else {
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} else {
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@ -134,11 +134,11 @@ void __init dt2_pci_preinit(void)
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if (gpio_request(pin, "PCI IntB") == 0) {
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if (gpio_request(pin, "PCI IntB") == 0) {
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if (gpio_direction_input(pin) == 0) {
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if (gpio_direction_input(pin) == 0) {
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irq = gpio_to_irq(pin);
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irq = gpio_to_irq(pin);
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set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
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printk (KERN_INFO "PCI IntB IRQ: %d\n", irq);
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printk (KERN_INFO "PCI IntB IRQ: %d\n", irq);
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} else {
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} else {
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printk(KERN_ERR "dt2_pci_preinit failed to "
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printk(KERN_ERR "dt2_pci_preinit failed to "
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"set_irq_type pin %d\n", pin);
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"irq_set_irq_type pin %d\n", pin);
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gpio_free(pin);
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gpio_free(pin);
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}
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}
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} else {
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} else {
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@ -240,28 +240,28 @@ static struct mv_sata_platform_data dt2_sata_data = {
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/*****************************************************************************
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/*****************************************************************************
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* General Setup
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* General Setup
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****************************************************************************/
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****************************************************************************/
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static struct orion5x_mpp_mode dt2_mpp_modes[] __initdata = {
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static unsigned int dt2_mpp_modes[] __initdata = {
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{ 0, MPP_GPIO }, // RTC interrupt
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MPP0_GPIO, // RTC interrupt
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{ 1, MPP_GPIO }, // 88e6131 interrupt
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MPP1_GPIO, // 88e6131 interrupt
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{ 2, MPP_GPIO }, // PCI_intB
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MPP2_GPIO, // PCI_intB
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{ 3, MPP_GPIO }, // PCI_intA
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MPP3_GPIO, // PCI_intA
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{ 4, MPP_GPIO }, // reset button switch
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MPP4_GPIO, // reset button switch
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{ 5, MPP_GPIO },
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MPP5_GPIO,
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{ 6, MPP_GPIO },
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MPP6_GPIO,
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{ 7, MPP_GPIO },
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MPP7_GPIO,
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{ 8, MPP_GPIO },
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MPP8_GPIO,
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{ 9, MPP_GIGE }, /* GE_RXERR */
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MPP9_GIGE, /* GE_RXERR */
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{ 10, MPP_GPIO }, // usb
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MPP10_GPIO, // usb
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{ 11, MPP_GPIO }, // usb
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MPP11_GPIO, // usb
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{ 12, MPP_GIGE }, // GE_TXD[4]
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MPP12_GIGE, // GE_TXD[4]
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{ 13, MPP_GIGE }, // GE_TXD[5]
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MPP13_GIGE, // GE_TXD[5]
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{ 14, MPP_GIGE }, // GE_TXD[6]
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MPP14_GIGE, // GE_TXD[6]
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{ 15, MPP_GIGE }, // GE_TXD[7]
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MPP15_GIGE, // GE_TXD[7]
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{ 16, MPP_GIGE }, // GE_RXD[4]
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MPP16_GIGE, // GE_RXD[4]
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{ 17, MPP_GIGE }, // GE_RXD[5]
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MPP17_GIGE, // GE_RXD[5]
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{ 18, MPP_GIGE }, // GE_RXD[6]
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MPP18_GIGE, // GE_RXD[6]
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{ 19, MPP_GIGE }, // GE_RXD[7]
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MPP19_GIGE, // GE_RXD[7]
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{ -1 },
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0,
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};
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};
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/*****************************************************************************
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/*****************************************************************************
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